1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 12:33:33 +02:00
Commit Graph

143985 Commits

Author SHA1 Message Date
Tom Stellard
ca8f087f31 AMDGPU/GlobalISel: Add support for simple shaders
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

llvm-svn: 293503
2017-01-30 17:09:15 +00:00
Daniel Berlin
74ee9aa416 Update pr31758.ll for unreachable revert
llvm-svn: 293502
2017-01-30 17:08:06 +00:00
Daniel Berlin
4b56b2ec94 Revert "NewGVN: Make unreachable blocks be marked with unreachable"
This reverts commit r293196

Besides making things look nicer, ATM, we'd like to preserve analysis
more than we'd like to destroy the CFG.  We'll probably revisit in the future

llvm-svn: 293501
2017-01-30 17:06:55 +00:00
Simon Pilgrim
87d65866ed [X86][SSE] Add support for combining PINSRW+ASSERTZEXT+PEXTRW patterns with target shuffles
llvm-svn: 293500
2017-01-30 16:58:34 +00:00
Matt Arsenault
c4ccc9b791 DAG: Constant fold fp16_to_fp/fp16_to_fp
This fixes emitting conversions of constants on targets
without legal f16 that need to use these for legalization.

llvm-svn: 293499
2017-01-30 16:57:41 +00:00
Sanjay Patel
dd64889b0b [InstCombine] fixed to propagate 'exact' on lshr
The original shift is bigger, so this may qualify as 'obvious', 
but here's an attempt at an Alive-based proof:

Name: exact
Pre: (C1 u< C2)
%a = shl i8 %x, C1
%b = lshr exact i8 %a, C2 
  =>
%c = lshr exact i8 %x, C2 - C1
%b = and i8 %c, ((1 << width(C1)) - 1) u>> C2

Optimization is correct!

llvm-svn: 293498
2017-01-30 16:53:03 +00:00
Sanjay Patel
d8b4f45a76 [InstCombine] add 'exact' to lshr to show that it got dropped; NFC
llvm-svn: 293496
2017-01-30 16:38:49 +00:00
Benjamin Kramer
de9926e55a [Coroutines] Add header guard to header that's missing one.
llvm-svn: 293494
2017-01-30 16:32:20 +00:00
Adam Nemet
9dcc59e9f5 [Inliner] Fold analysis remarks into missed remarks
This significantly reduces the noise level of these messages.

llvm-svn: 293492
2017-01-30 16:22:45 +00:00
Krzysztof Parzyszek
eefef160f3 [RDF] Add phis for entry block live-ins (in addition to function live-ins)
llvm-svn: 293491
2017-01-30 16:20:30 +00:00
Haicheng Wu
9c2489b510 [Inliner] Fix a comment to match the code. NFC.
TotalAltCost => TotalSecondaryCost

Differential Revision: https://reviews.llvm.org/D29231

llvm-svn: 293490
2017-01-30 16:15:14 +00:00
Sanjay Patel
20af4c5918 [InstCombine] enable lshr(shl X, C1), C2 folds for vectors with splat constants
llvm-svn: 293489
2017-01-30 16:11:40 +00:00
Sanjay Patel
3c39c77f98 [InstCombine] add tests for shift-shift patterns; NFC
llvm-svn: 293487
2017-01-30 15:54:50 +00:00
Rafael Espindola
74029e1a4e Bring back r293480. It is safe now.
Original message:

    Fix the values of two xcore ELF flags.

    The values in llvm grew from a pre-MC day when they would not show up
    in .o files and are outside of the SHF_MASKPROC.

    Fortunately the MC output is not currently used as xcore has its own
    assemble and that assembler uses valid values. This updates llvm to
    use the same values as the xmos assembler.

llvm-svn: 293486
2017-01-30 15:49:20 +00:00
Rafael Espindola
4b47b4e687 Only print architecture dependent flags for that architecture.
Different architectures can have different meaning for flags in the
SHF_MASKPROC mask, so we should always check what the architecture use
before checking the flag.

NFC for now, but will allow fixing the value of an xmos flag.

llvm-svn: 293484
2017-01-30 15:38:43 +00:00
Tom Stellard
5383871f8b TableGen: Fix infinite recursion in RegisterBankEmitter
Summary:
AMDGPU has two register classes with the same set of registers, and this
was causing this tablegen backend would get stuck in infinite recursion.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: tpr, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D29049

llvm-svn: 293483
2017-01-30 15:07:01 +00:00
Benjamin Kramer
9ed5c3e48a [Hexagon] Make header self-contained.
llvm-svn: 293482
2017-01-30 14:55:33 +00:00
Rafael Espindola
93b3f3ebf1 Revert "Fix the values of two xcore ELF flags."
This reverts commit r293480.

The patch is correct, but found bugs in other areas that need to be fixed.

llvm-svn: 293481
2017-01-30 14:39:48 +00:00
Rafael Espindola
51b0b3682c Fix the values of two xcore ELF flags.
The values in llvm grew from a pre-MC day when they would not show up
in .o files and are outside of the SHF_MASKPROC.

Fortunately the MC output is not currently used as xcore has its own
assemble and that assembler uses valid values. This updates llvm to
use the same values as the xmos assembler.

llvm-svn: 293480
2017-01-30 14:07:43 +00:00
Asaf Badouh
3f20ae7ff5 [X86][MCU] Minor bug fix for r293469 + test case
llvm-svn: 293478
2017-01-30 13:14:37 +00:00
Marek Olsak
a557dbdaf4 AMDGPU: Remove a useless VI SMRD pattern
Summary: already covered by complex patterns

Reviewers: arsenm, nhaehnle, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28995

llvm-svn: 293477
2017-01-30 12:25:14 +00:00
Marek Olsak
2e4174c34a AMDGPU: Fix assembler encoding for EXP instructions on VI
Reviewers: arsenm, tstellarAMD

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28992

llvm-svn: 293476
2017-01-30 12:25:03 +00:00
Daniel Berlin
39077e1d87 Revert "[MemorySSA] Revert r293361 and r293363, as the tests fail under asan."
This reverts commit r293471, reapplying r293361 and r293363 with a fix
for an out-of-bounds read.

llvm-svn: 293474
2017-01-30 11:35:39 +00:00
Sam McCall
f48206b9c8 [MemorySSA] Revert r293361 and r293363, as the tests fail under asan.
llvm-svn: 293471
2017-01-30 09:19:50 +00:00
Kristof Beyls
942514e271 [GlobalISel] Add support for indirectbr
Differential Revision: https://reviews.llvm.org/D28079

llvm-svn: 293470
2017-01-30 09:13:18 +00:00
Asaf Badouh
47c6fb27f5 [X86][MCU] replace select with bit manipulation instead of branches
Differential Revision: https://reviews.llvm.org/D28354


 

llvm-svn: 293469
2017-01-30 08:16:59 +00:00
Alexey Bader
06714d2f18 [LanRef] Fix typo in getelementptr example.
Summary: Change B type from double to pointer to double.

Reviewers: delena, sanjoy

Reviewed By: sanjoy

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D29009

llvm-svn: 293467
2017-01-30 07:38:58 +00:00
Craig Topper
cc9b3bb6e4 [AVX-512] Remove duplicate CodeGenOnly patterns for scalar register broadcast. We can use COPY_TO_REGCLASS like AVX does.
This causes stack spill slots be oversized sometimes, but the same should already be happening with AVX.

llvm-svn: 293464
2017-01-30 06:59:06 +00:00
Sam McCall
68789f144b Include LLVMDumpValue in release builds.
This part of the C API is still used in language bindings.

llvm-svn: 293460
2017-01-30 05:40:52 +00:00
Jonas Paulsson
9835ab8af4 [LoopVectorize] Improve getVectorCallCost() getScalarizationOverhead() call.
By calling getScalarizationOverhead with the CallInst instead of the types of
its arguments, we make sure that only unique call arguments are added to the
scalarization cost.

getScalarizationOverhead() is extended to handle calls by only passing on the
actual call arguments (which is not all the operands).

This also eliminates a wrapper function with the same name.

review: Hal Finkel
llvm-svn: 293459
2017-01-30 05:38:05 +00:00
Craig Topper
6e2f398822 [AVX-512] Remove KSET0B/KSET1B in favor of the patterns that select KSET0W/KSET1W for v8i1.
llvm-svn: 293458
2017-01-30 05:37:47 +00:00
Davide Italiano
cdd18faef7 [MemorySSA] Correct an assertion surrounding with parentheses.
llvm-svn: 293453
2017-01-30 03:16:43 +00:00
Will Dietz
21250da05e Test RuntimeDyld doesn't crash with R_X86_64_NONE (r293388).
Largely based on LLD test for dtrace.

llvm-svn: 293451
2017-01-30 01:28:42 +00:00
Craig Topper
8f052b2fcd [AVX-512] Don't reuse VSHLI/VSRLI for mask register shifts. VSHLI/VSHRI shift within elements while KSHIFT moves whole elements.
llvm-svn: 293448
2017-01-30 00:06:01 +00:00
Chris Ray
c72cdede75 [X86][Disassembler] Added SALC instruction
Reviewers: joe.abbey, craig.topper

Reviewed By: craig.topper

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D29201

llvm-svn: 293447
2017-01-29 23:02:47 +00:00
Craig Topper
f455f0ffda [AVX-512] Fix lowering for mask register concatenation with undef in the lower half.
Previously this test case fired an assertion in getNode because we tried to create an insert_subvector with both input types the same size and the index pointing to half the vector width.

llvm-svn: 293446
2017-01-29 22:53:33 +00:00
Chris Ray
a76ba55906 [X86] Fixing flag usage for RCL and RCR
Summary: The RCL and RCR instructions use the carry flag.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29237

llvm-svn: 293441
2017-01-29 20:05:30 +00:00
Matthias Braun
7adfbb9eae MachineInstr: Remove parameter from dump()
The primary use of the dump() functions in LLVM is for use in a
debugger. Unfortunately lldb does not seem to handle default arguments
so using `p SomeMI.dump()` fails and you have to type the longer `p
SomeMI.dump(nullptr)`. Remove the paramter to make the most common use
easy. (You can always construct something like `p
SomeMI.print(dbgs(),MyTII)` if you need more features).

Differential Revision: https://reviews.llvm.org/D29241

llvm-svn: 293440
2017-01-29 18:20:42 +00:00
Simon Pilgrim
9d757d239f [X86][SSE] Lower scalar_to_vector(0) to zero vector
Replaces an xor+movd/movq with an xorps which will be shorter in codesize, avoid an int-fpu transfer, allow modern cores to fast path the result during decode and helps other combines recognise an all-zero vector.

The only reason I can think of that we'd want to keep scalar_to_vector in this case is to help recognise the upper elts are undef but this doesn't seem to be a problem.

Differential Revision: https://reviews.llvm.org/D29097

llvm-svn: 293438
2017-01-29 18:13:37 +00:00
Zvi Rackover
c0ab0a6c7c [X86] Reproducer for pr31719. NFC
llvm-svn: 293437
2017-01-29 17:57:26 +00:00
Matthias Braun
e219baa1b2 llvm-c: Keep LLVMDumpModule() even in release builds
While this probably should be considered a dump debugger utility, the C
API currently has no other ways to print a module to stderr for error
reporting purposes, so keep it even in release builds.

llvm-svn: 293436
2017-01-29 17:52:03 +00:00
Sanjay Patel
25491b6e66 [InstCombine] enable (X >>?,exact C1) << C2 --> X << (C2 - C1) for vectors with splats
llvm-svn: 293435
2017-01-29 17:11:18 +00:00
Sanjay Patel
a2a34d3386 [InstCombine] add tests for shl(shr X, C1), C2 transforms; NFC
llvm-svn: 293434
2017-01-29 16:52:59 +00:00
Saleem Abdulrasool
f4a03e0903 ARM: support -mlong-calls with AEABI TLS on ELF
Support lowering AEABI TLS access (__aeabi_read_tp) with long calls.
This requires adjusting the call sequence to use an indirect call to get
full addressability.

Resolves PR31769!

llvm-svn: 293433
2017-01-29 16:46:22 +00:00
Sanjay Patel
4eb6691ce0 [ValueTracking] clean up lookThroughCast; NFCI
1. Use auto with dyn_cast.
2. Don't use else after return.
3. Convert chain of 'else if' to switch.
4. Improve variable names.

llvm-svn: 293432
2017-01-29 16:34:57 +00:00
Elena Demikhovsky
d9f46a497c [X86 Codegen] Fixed a bug in unsigned saturation
PACKUSWB converts Signed word to Unsigned byte, (the same about DW) and it can't be used for umin+truncate pattern.
AVX-512 VPMOVUS* instructions fit the pattern since they convert Unsigned to Unsigned.

See https://llvm.org/bugs/show_bug.cgi?id=31773

Differential Revision: https://reviews.llvm.org/D29196

llvm-svn: 293431
2017-01-29 13:18:30 +00:00
NAKAMURA Takumi
04feb3f011 Add -mtriple=aarch64-unknown to llvm/test/CodeGen/AArch64/GlobalISel/gisel-abort.ll.
Unsupported target might be induced if default target is neither macho nor elf. (e.g. *-win32)

llvm-svn: 293430
2017-01-29 11:10:34 +00:00
Daniel Berlin
9ac3b40058 NewGVN: Fix where newline is printed in debug printing of memory equivalence
llvm-svn: 293428
2017-01-29 10:26:03 +00:00
Igor Breger
704eff8858 [X86][GlobalISel] Add limited argument lowering support to the IRTranslator.
Summary:
Add limited (i8/i16/i32/i64)  argument lowering support to the IRTranslator.
Inspired by commit 289940.

Reviewers: t.p.northover, qcolombet, ab, zvi, rovka

Reviewed By: rovka

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D28987

llvm-svn: 293427
2017-01-29 08:35:42 +00:00
Chandler Carruth
71f68d4a4e [ArgPromote] Move static helpers to modern LLVM naming conventions while
here. NFC.

Simple refactoring while prepping a port to the new PM.

Differential Revision: https://reviews.llvm.org/D29249

llvm-svn: 293426
2017-01-29 08:03:21 +00:00