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Commit Graph

120123 Commits

Author SHA1 Message Date
Frederic Riss
ca9c0a8909 [dsymutil] Split some logic into a helper function. NFC
llvm-svn: 244085
2015-08-05 18:27:34 +00:00
Kostya Serebryany
897a5553b1 [libFuzzer] use data-flow feedback from strcmp
llvm-svn: 244084
2015-08-05 18:23:01 +00:00
Alex Lorenz
32764a9d0f MIR Parser: Report an error when parsing duplicate register flags.
llvm-svn: 244081
2015-08-05 18:09:03 +00:00
Chandler Carruth
98500f2974 [TTI] Make the cost APIs in TargetTransformInfo consistently use 'int'
rather than 'unsigned' for their costs.

For something like costs in particular there is a natural "negative"
value, that of savings or saved cost. As a consequence, there is a lot
of code that subtracts or creates negative values based on cost, all of
which is prone to awkwardness or bugs when dealing with an unsigned
type. Similarly, we *never* want these values to wrap, as that would
cause Very Bad code generation (likely percieved as an infinite loop as
we try to emit over 2^32 instructions or some such insanity).

All around 'int' seems a much better fit for these basic metrics. I've
added asserts to ensure that at least the TTI interface never returns
negative numbers here. If we ever have a use case for negative numbers,
we can remove this, but this way a bug where someone used '-1' to
produce a 'very large' cost will be caught by the assert.

This passes all tests, and is also UBSan clean.

No functional change intended.

Differential Revision: http://reviews.llvm.org/D11741

llvm-svn: 244080
2015-08-05 18:08:10 +00:00
Chandler Carruth
9d06f58b97 [GMR] Teach the conservative path of GMR to catch even more easy cases.
In PR24288 it was pointed out that the easy case of a non-escaping
global and something that *obviously* required an escape sometimes is
hidden behind PHIs (or selects in theory). Because we have this binary
test, we can easily just check that all possible input values satisfy
the requirement. This is done with a (very small) recursion through PHIs
and selects. With this, the specific example from the PR is correctly
folded by GVN.

Differential Revision: http://reviews.llvm.org/D11707

llvm-svn: 244078
2015-08-05 17:58:30 +00:00
Alex Lorenz
6b0071372b MIR Serialization: Serialize the 'early-clobber' register operand flag.
llvm-svn: 244075
2015-08-05 17:49:03 +00:00
Pete Cooper
9eafc11c34 Move BB succ_iterator to be inside TerminatorInst. NFC.
To get the successors of a BB we currently do successors(BB) which
ultimately walks the successors of the BB's terminator.

This moves the iterator to TerminatorInst as thats what we're actually
using to do the iteration, and adds a member function to TerminatorInst
to allow us to iterate directly over successors given an instruction.

For example, we can now do

  for (auto *Succ : BI->successors())

instead of

  for (unsigned i = 0, e = BI->getNumSuccessors(); i != e; ++i)

Reviewed by Tobias Grosser.

llvm-svn: 244074
2015-08-05 17:43:01 +00:00
Alex Lorenz
5058149b87 MIR Serialization: Serialize the 'debug-use' register operand flag.
llvm-svn: 244071
2015-08-05 17:41:17 +00:00
Alex Lorenz
aab548425e MIR Parser: Simplify the handling of quoted tokens. NFC.
The machine instructions lexer should not expose the difference between quoted
and unquoted tokens to the parser.

llvm-svn: 244068
2015-08-05 17:35:55 +00:00
Chad Rosier
fd7eb25756 [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager.
llvm-svn: 244067
2015-08-05 17:35:34 +00:00
James Y Knight
fd955f3e15 [Sparc] Fix disassembly of popc instruction.
And add tests.

Patch by David Wiberg!

llvm-svn: 244064
2015-08-05 17:00:30 +00:00
Matt Arsenault
5da7c5df39 AMDGPU/SI: Remove EXECReg
For the same reasons as the other physical registers.

llvm-svn: 244062
2015-08-05 16:42:57 +00:00
Matt Arsenault
1bf5500e99 AMDGPU: Remove SCCReg.
These should be handled as a physical register rather
than a virtual register class with one member.

llvm-svn: 244061
2015-08-05 16:42:54 +00:00
Chad Rosier
5c604328b9 [AArch64] Register (existing) AArch64BranchRelaxation pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

llvm-svn: 244060
2015-08-05 16:12:10 +00:00
Steven Wu
315fa847c3 Force the MachO generated for Darwin to have VERSION_MIN load command
On Darwin, it is required to stamp the object file with VERSION_MIN load
command. This commit will provide a VERSRION_MIN load command to the
MachO file that doesn't specify the version itself by inferring from
Target Triple.

llvm-svn: 244059
2015-08-05 15:36:38 +00:00
Hans Wennborg
83e7f1e0e9 test-release.sh: Fix naming of OpenMP runtime tarball
llvm-svn: 244058
2015-08-05 15:36:07 +00:00
Chad Rosier
0277edcae5 [AArch64] Make the naming of the Address Type Promotion pass consistent.
llvm-svn: 244057
2015-08-05 15:32:23 +00:00
Chad Rosier
61c3c88319 [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

IIRC, this pass is off by default, but it's still helpful when debugging.

llvm-svn: 244056
2015-08-05 15:18:58 +00:00
Sanjay Patel
ac82517d0a revert r243687: enable fast-math-flag propagation to DAG nodes
We can't propagate FMF partially without breaking DAG-level CSE. We either need to
relax CSE to account for mismatched FMF as a temporary work-around or fully propagate
FMF throughout the DAG.

Surprisingly, there are no existing regression tests for this, but here's an example:

  define float @fmf(float %a, float %b) {
    %mul1 = fmul fast float %a, %b
    %nega = fsub fast float 0.0, %a
    %mul2 = fmul fast float %nega, %b
    %abx2 = fsub fast float %mul1, %mul2
    ret float %abx2
  }


$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=0
...
    vmulss    %xmm1, %xmm0, %xmm0
    vaddss    %xmm0, %xmm0, %xmm0
    retq

$ llc -o - badflags.ll -march=x86-64 -mattr=fma -enable-unsafe-fp-math -enable-fmf-dag=1
...
    vmulss    %xmm1, %xmm0, %xmm2
    vfmadd213ss    %xmm2, %xmm1, %xmm0  <--- failed to recognize that (a * b) was already calculated
    retq

llvm-svn: 244053
2015-08-05 15:12:03 +00:00
Chad Rosier
e395d10aee Make this less error prone by using a #define. NFC.
llvm-svn: 244048
2015-08-05 14:48:44 +00:00
Chad Rosier
0d05649130 [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

llvm-svn: 244046
2015-08-05 14:22:53 +00:00
Benjamin Kramer
21b192d068 [AA] Use CallSite cast idiom. No functionality change.
llvm-svn: 244045
2015-08-05 14:16:44 +00:00
Benjamin Kramer
9b4abc7772 [YAMLTraits] Use StringRef::copy. No functionality change.
llvm-svn: 244044
2015-08-05 14:16:38 +00:00
Benjamin Kramer
185618a9e7 [IR] Simplify code with ArrayRef::copy. No functionality change.
llvm-svn: 244043
2015-08-05 14:16:28 +00:00
Chad Rosier
55180cfb2f [AArch64] Register (existing) AArch64LoadStoreOpt pass with LLVM pass manager.
Summary: Among other things, this allows -print-after-all/-print-before-all to
dump IR around this pass.

This is the AArch64 version of r243052.

llvm-svn: 244041
2015-08-05 13:44:51 +00:00
Chad Rosier
4a69d9e381 Update comment. NFC.
llvm-svn: 244038
2015-08-05 12:40:13 +00:00
Rafael Espindola
5eade55227 Drop unnecessary static_cast.
ELFT::TargetEndianness already has the correct type.

llvm-svn: 244032
2015-08-05 11:53:59 +00:00
Artyom Skrobov
b497a0eb34 ARMISelDAGToDAG.cpp had this self-contradictory code:
return StringSwitch<int>(Flags)
          .Case("g", 0x1)
          .Case("nzcvq", 0x2)
          .Case("nzcvqg", 0x3)
          .Default(-1);
...

  // The _g and _nzcvqg versions are only valid if the DSP extension is
  // available.
  if (!Subtarget->hasThumb2DSP() && (Mask & 0x2))
    return -1;

ARMARM confirms that the comment is right, and the code was wrong.

llvm-svn: 244029
2015-08-05 11:02:14 +00:00
Benjamin Kramer
214753cf47 [ArrayRefTest] Work around a GCC 4.8 internal compiler error.
llvm-svn: 244023
2015-08-05 09:39:41 +00:00
Simon Pilgrim
99b0393ce0 [InstCombine] Added more specific SSE2/AVX2 vector shift tests.
llvm-svn: 244022
2015-08-05 08:21:38 +00:00
Simon Pilgrim
ca06990ca7 Fixed line endings.
llvm-svn: 244021
2015-08-05 08:18:00 +00:00
Hal Finkel
58e66c2716 [MachineCombiner] Don't use the opcode-only form of computeInstrLatency
In r242277, I updated the MachineCombiner to work with itineraries, but I
missed a call that is scheduling-model-only (the opcode-only form of
computeInstrLatency). Using the form that takes an MI* allows this to work with
itineraries (and should be NFC for subtargets with scheduling models).

llvm-svn: 244020
2015-08-05 07:45:28 +00:00
Davide Italiano
4ad598d142 [llvm-objdump] Call exit(1) on error, i.e. fail early.
Previously we kept going on partly corrupted input, which might result
in garbage being printed, or even worse, random crashes.
Rafael mentioned that this is the GNU behavior as well, but after some
discussion we both agreed it's probably better to emit a reasonable
error message and exit. As a side-effect of this commit, now we don't
rely on global state for error codes anymore. objdump was the last tool
in the toolchain which needed to be converted. Hopefully the old behavior
won't sneak into the tree again.

llvm-svn: 244019
2015-08-05 07:18:31 +00:00
NAKAMURA Takumi
84cfaa9d50 unittests/ADT/ArrayRefTest.cpp: Suppress r243995 on g++-4.8 for now to unbreak bots.
For example of mingw-w64-g++-4.8.1,

  llvm/unittests/ADT/ArrayRefTest.cpp: In member function 'virtual void {anonymous}::ArrayRefTest_AllocatorCopy_Test::TestBody()':
  llvm/unittests/ADT/ArrayRefTest.cpp:56:40: internal compiler error: in count_type_elements, at expr.c:5523
     } Array3Src[] = {{"hello"}, {"world"}};
                                          ^
  Please submit a full bug report,
  with preprocessed source if appropriate.

llvm-svn: 244017
2015-08-05 06:11:23 +00:00
NAKAMURA Takumi
889a574aab Windows/COM.inc: Fix emacs mode in the first line.
llvm-svn: 244016
2015-08-05 06:11:08 +00:00
Eric Christopher
12a34eefb1 Temporarily revert r244012 while we see if it's really necessary.
Add a comment explaining the current theory as to why we'd need
the -lole32 on the link line.

llvm-svn: 244015
2015-08-05 05:32:22 +00:00
Eric Christopher
fe25184afe Remove autoconf checks for sigsetjmp and siglongjmp as they appear to
be unused.

llvm-svn: 244014
2015-08-05 04:50:46 +00:00
Eric Christopher
98111e15b5 Remove the apparently unused rand48 configure checks and associated m4.
llvm-svn: 244013
2015-08-05 04:50:43 +00:00
Eric Christopher
1fb8e354bb Remove obsolete configure check for libole32 as we don't appear to use
it anymore.

llvm-svn: 244012
2015-08-05 04:50:40 +00:00
Eric Christopher
7987af1493 Remove the unused header check for utime.h.
llvm-svn: 244011
2015-08-05 04:50:37 +00:00
Tanya Lattner
a72d000c61 Rename all references to old mailing lists to new lists.llvm.org address.
llvm-svn: 243999
2015-08-05 03:51:17 +00:00
Yaron Keren
858a8b769a Avoid passing nullptr to std::equal.
As documented in the LLVM Coding Standards, indeed MSVC incorrectly asserts 
on this in Debug mode. This happens when building clang with Visual C++ and
-triple i686-pc-windows-gnu on these clang regression tests:

 clang/test/CodeGen/2011-03-08-ZeroFieldUnionInitializer.c
 clang/test/CodeGen/empty-union-init.c

llvm-svn: 243996
2015-08-04 15:57:04 +00:00
Benjamin Kramer
73b65dd362 [ArrayRef] Make copy use std::uninitialized_copy.
std::copy does not work for non-trivially copyable classes when we're
copying into uninitialized memory.

llvm-svn: 243995
2015-08-04 15:52:56 +00:00
Sanjay Patel
83e1c48540 wrap OptSize and MinSize attributes for easier and consistent access (NFCI)
Create wrapper methods in the Function class for the OptimizeForSize and MinSize
attributes. We want to hide the logic of "or'ing" them together when optimizing
just for size (-Os).

Currently, we are not consistent about this and rely on a front-end to always set
OptimizeForSize (-Os) if MinSize (-Oz) is on. Thus, there are 18 FIXME changes here
that should be added as follow-on patches with regression tests.

This patch is NFC-intended: it just replaces existing direct accesses of the attributes
by the equivalent wrapper call.

Differential Revision: http://reviews.llvm.org/D11734

llvm-svn: 243994
2015-08-04 15:49:57 +00:00
Hal Finkel
c014d42921 [RuntimeDyld] Adapt PPC64 relocations to PPC32
Begin adapting some of the implemented PPC64 relocations for PPC32 (with a
test case).

Patch by Pierre-Andre Saulais!

llvm-svn: 243991
2015-08-04 15:29:00 +00:00
Sanjay Patel
c7b58da814 [x86] machine combiner reassociation: mark EFLAGS operand as 'dead'
In the commentary for D11660, I wasn't sure if it was alright to create new
integer machine instructions without also creating the implicit EFLAGS operand. 
From what I can see, the implicit operand is always created by the MachineInstrBuilder
based on the instruction type, so we don't have to do that explicitly. However, in
reviewing the debug output, I noticed that the operand was not marked as 'dead'. 
The machine combiner should do that to preserve future optimization opportunities 
that may be checking for that dead EFLAGS operand themselves.

Differential Revision: http://reviews.llvm.org/D11696

llvm-svn: 243990
2015-08-04 15:21:56 +00:00
Vasileios Kalintiris
0bf0cc7af7 [mips][FastISel] Disable code generation for unsupported targets through FastISel.
Summary:
Previously, we would check whether the target is supported or not, only in
fastSelectInstruction(). This means that 64-bit targets could use FastISel too.
We fix this by checking every overridden method of the FastISel class and
by falling back to SelectionDAG if the target isn't supported. This change
should have been committed along with r243638, but somehow I missed it.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11755

llvm-svn: 243986
2015-08-04 14:35:50 +00:00
Vasileios Kalintiris
e8da6d9454 Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.
It introduced two regressions on 64-bit big-endian targets running under N32
(MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4, and
MultiSource/Applications/kimwitu++/kc) The issue is that on 64-bit targets
comparisons such as BEQ compare the whole GPR64 but incorrectly tell the
instruction selector that they operate on GPR32's. This leads to the
elimination of i32->i64 extensions that are actually required by
comparisons to work correctly.

There's currently a patch under review that fixes this problem.

llvm-svn: 243984
2015-08-04 14:26:35 +00:00
Duncan P. N. Exon Smith
bd33d09021 Fix 80-column
llvm-svn: 243977
2015-08-04 13:24:26 +00:00
Duncan P. N. Exon Smith
ad4314c88a Linker: Fix ASan failure from r243961
r243883 and r243961 made a use-after-free far more likely:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/6041/steps/check-llvm%20asan/logs/stdio

Unresolved nodes get inserted into the `Cycles` array.  If they later
get resolved through RAUW, we need to update the reference.  It's
interesting that this never hit before (maybe an asan-ified clang
bootstrap with `-flto -g` would have hit it, but I admit I haven't tried
anything quite that crazy).

llvm-svn: 243976
2015-08-04 13:23:30 +00:00