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Commit Graph

79376 Commits

Author SHA1 Message Date
Jim Grosbach
cad3205f4c MCJIT handle a few more simple x86 relocations for MachO.
llvm-svn: 148263
2012-01-16 23:50:49 +00:00
David Blaikie
067ad0b263 Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.
(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

llvm-svn: 148262
2012-01-16 23:24:27 +00:00
Hal Finkel
a75b6264a1 Cleanup PPC RLWINM8 vs RLWINM
No test case: output assembly will be identical.

llvm-svn: 148261
2012-01-16 23:22:50 +00:00
Hal Finkel
0c67e8f4d9 AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit
llvm-svn: 148260
2012-01-16 22:53:41 +00:00
Jakob Stoklund Olesen
335d417f27 Extract method for detecting constant unallocatable physregs.
It is safe to move uses of such registers.

llvm-svn: 148259
2012-01-16 22:34:08 +00:00
Jim Grosbach
acbad56e7f MCJIT support for non-function sections.
Move to a by-section allocation and relocation scheme. This allows
better support for sections which do not contain externally visible
symbols.

Flesh out the relocation address vs. local storage address separation a
bit more as well. Remote process JITs use this to tell the relocation
resolution code where the code will live when it executes.

The startFunctionBody/endFunctionBody interfaces to the JIT and the
memory manager are deprecated. They'll stick around for as long as the
old JIT does, but the MCJIT doesn't use them anymore.

llvm-svn: 148258
2012-01-16 22:26:39 +00:00
Stepan Dyatkovskiy
38bc1a8899 Fixed comment in loop-unswitch.
llvm-svn: 148252
2012-01-16 20:48:04 +00:00
Jakob Stoklund Olesen
208476ccd0 Give better scavenger errors by invoking the verifier.
llvm-svn: 148251
2012-01-16 20:38:31 +00:00
Jakob Stoklund Olesen
77ce60119b Add a new kind of MachineOperand: MO_RegisterMask.
Register masks will be used as a compact representation of large clobber
lists.  Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers.  That's more than 1kB of useless
operands per call site.

A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered.  The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().

By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.

This patch introduces the new operand kind.  Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.

llvm-svn: 148250
2012-01-16 19:22:00 +00:00
Eli Friedman
a343d87eac Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
llvm-svn: 148240
2012-01-16 16:42:21 +00:00
Eli Friedman
a2b480b010 Get rid of unused codegen-only instruction.
llvm-svn: 148239
2012-01-16 16:29:35 +00:00
Joe Abbey
f61ffb3134 Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc...
Committed as obvious

llvm-svn: 148237
2012-01-16 13:16:05 +00:00
Craig Topper
d1f51dc860 Give priority to AVX over SSE for 128-bit floating point unpck instructions.
llvm-svn: 148233
2012-01-16 09:56:42 +00:00
Eli Bendersky
ed17ae8c86 A fix for the previous commit: "integer constant is too large for ‘long’ type" error on some 32-bit bots
llvm-svn: 148232
2012-01-16 09:31:10 +00:00
Eli Bendersky
973d44eb7c Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is currently basic and will be enhanced with future patches.
Patch developed by Andy Kaylor and Daniel Malea. Reviewed on llvm-commits.

llvm-svn: 148231
2012-01-16 08:56:09 +00:00
David Blaikie
d828c91e69 Refactor variables unused under non-assert builds (& remove two entirely unused variables).
llvm-svn: 148230
2012-01-16 05:17:39 +00:00
Pete Cooper
a68251aaac Changed intrinsic ID operand to a target constant as its not used in any arithmetic so should not be checked in legalisation
llvm-svn: 148228
2012-01-16 04:08:12 +00:00
Nadav Rotem
b36c029e3b [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.

llvm-svn: 148225
2012-01-15 19:27:55 +00:00
Benjamin Kramer
14443a8cf6 Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through CodeGen.
llvm-svn: 148218
2012-01-15 13:16:05 +00:00
Benjamin Kramer
3db5296619 DAGCombiner: Deduplicate code.
llvm-svn: 148217
2012-01-15 11:50:43 +00:00
Stepan Dyatkovskiy
2e727a1727 Cosmetic patch for r148215.
llvm-svn: 148216
2012-01-15 09:45:11 +00:00
Stepan Dyatkovskiy
d7b16b0e44 Fixup for r148132. Type replacement for LoopsProperties: from DenseMap to std::map, since we need to keep a valid pointer to properties of current loop.
Message for r148132:
LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).

llvm-svn: 148215
2012-01-15 09:44:07 +00:00
Chandler Carruth
7ee4fa971b Relax the FileCheck assertion a bit -- all we really care about is that
we're loading from the global array, not how it is spelled in the asm.
This should fix the MSVC bots.

llvm-svn: 148214
2012-01-15 09:38:59 +00:00
Chandler Carruth
e57b0f2a8b FileCheck-ize a test, make it more specific to directly test the shift
removal desired.

llvm-svn: 148213
2012-01-15 09:32:57 +00:00
Chandler Carruth
d328cc2c87 Remove SetWorkingDirectory from the Process interface. Nothing in LLVM
or Clang is using this, and it would be hard to use it correctly given
the thread hostility of the function. Also, it never checked the return
which is rather dangerous with chdir. If someone was in fact using this,
please let me know, as well as what the usecase actually is so that
I can add it back and make it more correct and secure to use. (That
said, it's never going to be "safe" per-se, but we could at least
document the risks...)

llvm-svn: 148211
2012-01-15 08:41:35 +00:00
David Blaikie
e3b1a7c2d7 Remove dead code.
llvm-svn: 148206
2012-01-15 01:09:13 +00:00
Craig Topper
7380799e4a Truncate of undef is just undef of smaller size.
llvm-svn: 148205
2012-01-15 01:05:11 +00:00
Craig Topper
0c4ab86d2c Fix the memop type on a couple 256-bit AVX instructions that were using f128mem instead of f256mem.
llvm-svn: 148196
2012-01-14 18:29:57 +00:00
Craig Topper
ddc2e1091e Add a bunch of AVX instructions to the folding tables. Also fixed the alignment on 256-bit AVX2 instructions.
llvm-svn: 148194
2012-01-14 18:14:53 +00:00
Duncan Sands
96dee83647 Speculatively revert commit 148175 (rafael), to see if this fixes
non-determinism in the 32 bit dragonegg buildbot.  Original commit
message:
Only emit the Leh_func_endN symbol when needed.

llvm-svn: 148191
2012-01-14 17:16:48 +00:00
Andrew Trick
071cb0a076 Fix a corner case hit by redundant phi elimination running after LSR.
Fixes PR11761: bad IR w/ redundant Phi elim

llvm-svn: 148177
2012-01-14 03:17:23 +00:00
Rafael Espindola
a4e515db51 Only emit the Leh_func_endN symbol when needed.
llvm-svn: 148175
2012-01-14 02:36:51 +00:00
Andrew Trick
4bf8728f07 misched: Initial code for building an MI level scheduling DAG
llvm-svn: 148174
2012-01-14 02:17:18 +00:00
Andrew Trick
dcb9435036 Move physreg dependency generation into aptly named addPhysRegDeps.
llvm-svn: 148173
2012-01-14 02:17:15 +00:00
Andrew Trick
1fd0adb573 misched: Added ScheduleDAGInstrs::IsPostRA
llvm-svn: 148172
2012-01-14 02:17:12 +00:00
Andrew Trick
6b08526310 misched: Invoke the DAG builder on each sequence of schedulable instructions.
llvm-svn: 148171
2012-01-14 02:17:09 +00:00
Andrew Trick
ce507adb56 Move things around to make the file navigable, even though it will probably be split up later.
llvm-svn: 148170
2012-01-14 02:17:06 +00:00
Evan Cheng
c0e7b19ff0 After r147827 and r147902, it's now possible for unallocatable registers to be
live across BBs before register allocation. This miscompiled 197.parser
when a cmp + b are optimized to a cbnz instruction even though the CPSR def
is live-in a successor.
        cbnz    r6, LBB89_12
...
LBB89_12:
        ble     LBB89_1

The fix consists of two parts. 1) Teach LiveVariables that some unallocatable
registers might be liveouts so don't mark their last use as kill if they are.
2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional
branch does not kill CPSR.

rdar://10676853

llvm-svn: 148168
2012-01-14 01:53:46 +00:00
Chad Rosier
4a705ae81a Fix pasto from r146196.
llvm-svn: 148167
2012-01-14 01:50:21 +00:00
Chad Rosier
b4f2ccc1e0 Cleanup test case by adding checks for test names.
llvm-svn: 148166
2012-01-14 01:46:51 +00:00
Jakob Stoklund Olesen
742b6d295b Add TRI::getCallPreservedMask() hook.
The hook returns a bit-mask of call-preserved registers that will
eventually replace the current list of implicit defs on call
instructions.  This will make it possible to support multiple calling
conventions without duplicating call instruction descriptors.

The call-preserved mask is slightly different from the list returned by
the getCalleeSavedRegs() hook, it includes all aliases that are
preserved by calls.

The hook takes a CallingConv::ID argument instead of a MachineFunction
pointer, so it can provide information about calls to extern functions,
and even indirect function calls.

TRI::getCalleeSavedRegs() returns information about the function
currently being compiled. TRI::getCallPreservedMask() returns
information about the functions it is calling.

llvm-svn: 148165
2012-01-14 01:45:25 +00:00
Dan Gohman
4539e2a975 Fix an unused variable warning that Chad noticed.
llvm-svn: 148164
2012-01-14 00:47:44 +00:00
Rafael Espindola
551f422d34 Add a test showing how the Leh_func_endN symbol is used.
llvm-svn: 148161
2012-01-14 00:12:59 +00:00
Rafael Espindola
2b55c13cf1 Remove previous commit while I debug the bot failures.
llvm-svn: 148156
2012-01-13 23:28:50 +00:00
Jakob Stoklund Olesen
b1f7df8d8b Use RegisterTuples to generate pseudo-registers.
The QQ and QQQQ registers are not 'real', they are pseudo-registers used
to model some vld and vst instructions.

This makes the call clobber lists longer, but I intend to get rid of
those soon.

llvm-svn: 148151
2012-01-13 22:55:42 +00:00
Rafael Espindola
3a35eeb0aa Remove label that is not used anymore.
llvm-svn: 148150
2012-01-13 22:41:58 +00:00
Eli Friedman
a70048903b Speculatively revert r148132+r148133 to try and fix a buildbot failure.
llvm-svn: 148149
2012-01-13 22:34:39 +00:00
Jakob Stoklund Olesen
c477c8d35e Skip the NAME field when forming tuples.
llvm-svn: 148147
2012-01-13 22:23:50 +00:00
Andrew Trick
796cca6eff Remove pointless mode line in .cpp file.
llvm-svn: 148143
2012-01-13 22:04:16 +00:00
Duncan Sands
5a44c5a303 Try to clarify a little how exception handling works.
llvm-svn: 148136
2012-01-13 19:59:16 +00:00