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3179 Commits

Author SHA1 Message Date
Jim Grosbach
9939090a14 Add braces for legibility. 
llvm-svn: 115043
 2010-09-29 17:32:29 +00:00
Jim Grosbach
fe21554145 One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)

llvm-svn: 115038
 2010-09-29 15:23:40 +00:00
Gabor Greif
e1de402213 improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2 
added some doxygen on the way

llvm-svn: 115033
 2010-09-29 10:12:08 +00:00
Chris Lattner
cbecb9a4d3 implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015
 2010-09-29 01:50:45 +00:00
Chris Lattner
9b9a847b8c change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.

llvm-svn: 115014
 2010-09-29 01:42:58 +00:00
Eric Christopher
e81be3c669 Rework comparison handling to set a register on true/false. This avoids 
problems with phi-nodes in blocks that have hard and not virtual registers.

Accordingly update branch handling to compensate.

llvm-svn: 115013
 2010-09-29 01:14:47 +00:00
Eric Christopher
0bde6df6a3 Remove unnecessary set ahead of time. 
llvm-svn: 115011
 2010-09-29 00:50:57 +00:00
Evan Cheng
7eb08b1ad9 Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn. 
llvm-svn: 115010
 2010-09-29 00:49:25 +00:00
Eric Christopher
c9ebc75b88 Remove assert, add comment. 
llvm-svn: 115009
 2010-09-29 00:49:09 +00:00
Evan Cheng
7fffe3cf58 Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub. 
llvm-svn: 115008
 2010-09-29 00:27:46 +00:00
Evan Cheng
39c462b4f1 Add support to model pipeline bypass / forwarding. 
llvm-svn: 115005
 2010-09-28 23:50:49 +00:00
Eric Christopher
2803dbc225 32-bit constant ints only for now. 
llvm-svn: 115001
 2010-09-28 22:47:54 +00:00
Oscar Fuentes
eb27a44982 Removed a bunch of unnecessary target_link_libraries. 
llvm-svn: 114999
 2010-09-28 22:39:14 +00:00
Owen Anderson
c34e1296b8 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.

llvm-svn: 114995
 2010-09-28 21:57:50 +00:00
Eric Christopher
3024929d5a Integer materialization needed the same thinko change. 
llvm-svn: 114994
 2010-09-28 21:55:34 +00:00
Nick Lewycky
b9daeb2fd0 Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function

llvm-svn: 114992
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov
f1be021755 User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

llvm-svn: 114991
 2010-09-28 21:39:26 +00:00
Owen Anderson
c0e1200323 Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.

llvm-svn: 114973
 2010-09-28 18:32:13 +00:00
Jim Grosbach
7915d03313 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

llvm-svn: 114964
 2010-09-28 17:05:56 +00:00
Oscar Fuentes
cd481d2723 Add ARM Disassembler to the CMake build. 
llvm-svn: 114949
 2010-09-28 11:48:19 +00:00
Eric Christopher
bff0f1805f 80-col fixups. 
llvm-svn: 114943
 2010-09-28 04:18:29 +00:00
Bob Wilson
dc396388cb Add a command line option "-arm-strict-align" to disallow unaligned memory 
accesses for ARM targets that would otherwise allow it.  Radar 8465431.

llvm-svn: 114941
 2010-09-28 04:09:35 +00:00
Eric Christopher
92ed90ad1a Rework builtin handling and call setup. The builtin handling 
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.

llvm-svn: 114934
 2010-09-28 01:21:42 +00:00
Eric Christopher
7d87a75fa4 Fix typo. 
llvm-svn: 114931
 2010-09-28 00:35:33 +00:00
Eric Christopher
fee68ebd81 Fix fp constant loads to have a destination register. 
llvm-svn: 114930
 2010-09-28 00:35:09 +00:00
Jim Grosbach
ffbf83e49f Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114915
 2010-09-27 22:28:11 +00:00
Jim Grosbach
0d15b006f7 ARM-mode eh.sjlj.longjmp MC lowering 
llvm-svn: 114896
 2010-09-27 21:47:04 +00:00
Jim Grosbach
8cf10ca1cc Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114892
 2010-09-27 21:28:44 +00:00
Daniel Dunbar
1f022a72ba Hard to imagine there are still people using inferior compilers. 
llvm-svn: 114862
 2010-09-27 20:12:58 +00:00
Rafael Espindola
3e325614db Odd additional stub framework for the ARM MC ELF emission. 
llc now recognizes the "intent" to support MC/obj emission for ARM, but
given that they are all stubs, it asserts on --filetype=obj --march=arm

Patch by Jason Kim.

llvm-svn: 114856
 2010-09-27 18:31:37 +00:00
Eric Christopher
d75d39ce4a Insert missing coherency in comment. Add a quick check for hardware 
divide support also.

llvm-svn: 114813
 2010-09-27 06:08:12 +00:00
Eric Christopher
4f8a73aaa5 Mass rename for Jim. 
llvm-svn: 114812
 2010-09-27 06:02:23 +00:00
Evan Cheng
b64d587918 Fix IIC_iEXTAr itinerary class of Cortex-A9. 
llvm-svn: 114784
 2010-09-25 01:09:28 +00:00
Evan Cheng
2279dc1d2a Remove a unused instruction itinerary class. 
llvm-svn: 114782
 2010-09-25 01:06:02 +00:00
Evan Cheng
64a24ab747 Fix zero and sign extension instructions scheduling itineraries. 
llvm-svn: 114780
 2010-09-25 00:49:35 +00:00
Evan Cheng
124ae30ef8 More pseudo instruction scheduling itinerary fixes. 
llvm-svn: 114768
 2010-09-24 22:41:41 +00:00
Evan Cheng
eb81dc39dc Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
llvm-svn: 114766
 2010-09-24 22:03:46 +00:00
Jim Grosbach
f0bbd8c533 Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
llvm-svn: 114758
 2010-09-24 20:47:58 +00:00
Evan Cheng
1d50dccdc5 Enable code placement optimization pass for ARM. 
llvm-svn: 114746
 2010-09-24 19:07:23 +00:00
Evan Cheng
54374c30f9 Fix a potential null dereference bug. 
llvm-svn: 114723
 2010-09-24 05:18:35 +00:00
Owen Anderson
4fc55c0e02 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!

llvm-svn: 114710
 2010-09-23 23:45:25 +00:00
Bob Wilson
ff8139baa0 Set alignment operand for NEON VST instructions. 
llvm-svn: 114709
 2010-09-23 23:42:37 +00:00
Jim Grosbach
66ced0b804 ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
llvm-svn: 114707
 2010-09-23 23:33:56 +00:00
Jim Grosbach
c6efcc192d #+4 --> #4 for consistency with other asm output 
llvm-svn: 114706
 2010-09-23 23:32:38 +00:00
Jim Grosbach
7bd79eb9e8 Fix formatting of output .s code 
llvm-svn: 114705
 2010-09-23 23:03:26 +00:00
Owen Anderson
15c6948d29 Add isConditionalMove bits to X86 and ARM instructions. 
llvm-svn: 114703
 2010-09-23 22:57:01 +00:00
Bob Wilson
026ef4b7f8 Set alignment operand for NEON VLD instructions. 
llvm-svn: 114696
 2010-09-23 21:43:54 +00:00
Jim Grosbach
15096f056a never mind. I can't read, apparently 
llvm-svn: 114689
 2010-09-23 19:42:17 +00:00
Evan Cheng
57ed0f6439 Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted. 
llvm-svn: 114688
 2010-09-23 19:42:03 +00:00
Jim Grosbach
a6816c40db Fix opcode value for the 'trap' instruction, keeping the type suffix on the 
constant. Hopefully the non-Darwin bots will like it...

llvm-svn: 114687
 2010-09-23 19:32:40 +00:00