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Commit Graph

83479 Commits

Author SHA1 Message Date
Richard Barton
cb28956a79 Fix instruction description of VMOV (between two ARM core registers and two single-precision resiters)
llvm-svn: 159938
2012-07-09 16:41:33 +00:00
Richard Barton
58c6ccbb1c Prevent ARM assembler from losing a right shift by #32 applied to a register
llvm-svn: 159937
2012-07-09 16:31:14 +00:00
Richard Barton
957a588c71 Spelling!
llvm-svn: 159936
2012-07-09 16:14:28 +00:00
Richard Barton
2ca50f6513 Teach the assembler to use the narrow thumb encodings of various three-register dp instructions where permissable.
llvm-svn: 159935
2012-07-09 16:12:24 +00:00
Benjamin Kramer
48674fdbd4 Remove some trivial copy ctors so the classes become trivially copyable and get the optimized SmallVector implementation.
llvm-svn: 159916
2012-07-08 19:47:51 +00:00
Benjamin Kramer
abb64d7556 SmallVector: Make use of move semantics to speed up moving objects in erase() and insert()
llvm-svn: 159914
2012-07-08 12:06:35 +00:00
Andrew Trick
b9c8074dcd I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

llvm-svn: 159891
2012-07-07 04:00:00 +00:00
Andrew Trick
39f96ecbe2 whitespace
llvm-svn: 159890
2012-07-07 03:59:51 +00:00
Andrew Trick
eb9b704bb8 Tweak spelling.
llvm-svn: 159889
2012-07-07 03:59:48 +00:00
Manman Ren
eca5886e50 X86: Fix optimizeCompare to correctly check safe condition.
It is safe if EFLAGS is killed or re-defined.
When we are done with the basic block, check whether EFLAGS is live-out.
Do not optimize away cmp if EFLAGS is live-out.

llvm-svn: 159888
2012-07-07 03:34:46 +00:00
NAKAMURA Takumi
84b04442bd LLVMConfig.cmake.in: Quote around @LLVM_INSTALL_PREFIX@, or it would not accept whitespace paths.
Thanks to Kai.

llvm-svn: 159887
2012-07-07 03:12:28 +00:00
Bill Wendling
ef19b7dfb9 Use the DebugInfo wrappers instead of mucking about with the MDNode directly.
llvm-svn: 159881
2012-07-07 00:52:35 +00:00
Bill Wendling
03654fab29 Print the name last.
llvm-svn: 159879
2012-07-06 23:43:12 +00:00
Chad Rosier
a9d216beac Fix the naming of ensureAlignment. Per the coding standard function names
should be camel case, and start with a lower case letter.

llvm-svn: 159877
2012-07-06 23:13:38 +00:00
Nuno Lopes
f3ba9a4d21 teach instcombine to remove allocated buffers even if there are stores, memcpy/memmove/memset, and objectsize users.
This means we can do cheap DSE for heap memory.
Nothing is done if the pointer excapes or has a load.

The churn in the tests is mostly due to objectsize, since we want to make sure we
don't delete the malloc call before evaluating the objectsize (otherwise it becomes -1/0)

llvm-svn: 159876
2012-07-06 23:09:25 +00:00
Dmitri Gribenko
452a9abd15 Since SmallMap was removed in r158644, remove documentation in ProgrammersManual.html.
llvm-svn: 159874
2012-07-06 23:06:47 +00:00
Bill Wendling
5c3e63dca0 Check if it's a scope last, because several things are scopes.
llvm-svn: 159873
2012-07-06 23:06:16 +00:00
Jim Grosbach
b9fd88619e ARM: Add test cleanup entry to the README.
llvm-svn: 159864
2012-07-06 21:52:04 +00:00
Akira Hatanaka
37565e70b6 revert r159851.
llvm-svn: 159854
2012-07-06 20:16:48 +00:00
Akira Hatanaka
4320724cc5 Reapply r158846.
Include file MipsGenRegisterInfo.inc.

llvm-svn: 159851
2012-07-06 19:29:11 +00:00
Bill Wendling
1c238d67b7 Add a print method to the ObjC property object.
llvm-svn: 159848
2012-07-06 19:12:31 +00:00
Bill Wendling
fe7effd5c8 Remove trailing comma in array initialization list.
llvm-svn: 159843
2012-07-06 17:49:19 +00:00
Bill Wendling
094156a2b9 Remove unnecessary 'llvm::'.
llvm-svn: 159842
2012-07-06 17:47:36 +00:00
Bill Wendling
b15d6a0392 Remove unnecessary 'llvm::'.
llvm-svn: 159841
2012-07-06 17:46:28 +00:00
Chad Rosier
9309733543 Whitespace.
llvm-svn: 159839
2012-07-06 17:44:22 +00:00
Manman Ren
8cbff1360f X86: peephole optimization to remove cmp instruction
For each Cmp, we check whether there is an earlier Sub which make Cmp
redundant. We handle the case where SUB operates on the same source operands as
Cmp, including the case where the two source operands are swapped.

llvm-svn: 159838
2012-07-06 17:36:20 +00:00
Chad Rosier
2bffb657ca [fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic.
llvm-svn: 159837
2012-07-06 17:33:39 +00:00
Chad Rosier
e145692d89 Update getFunction parameter documentation. Fixes PR13268.
llvm-svn: 159835
2012-07-06 17:15:03 +00:00
Dmitri Gribenko
817a29123c Revert r159789.
llvm-svn: 159834
2012-07-06 16:42:25 +00:00
NAKAMURA Takumi
5db53aa56b llvm/include/llvm/CMakeLists.txt: Cut dependency to intrinsics_gen.
llvm-svn: 159831
2012-07-06 15:55:39 +00:00
Duncan Sands
ffd9b270f2 Attempt to fix windows buildbots. Patch by James Benton.
llvm-svn: 159826
2012-07-06 14:43:16 +00:00
NAKAMURA Takumi
aac3b7a46a test/CodeGen/X86/sext-setcc-self.ll: Mark it as XFAIL: cygwin,mingw32,win32. Investigating.
llvm-svn: 159820
2012-07-06 12:12:39 +00:00
NAKAMURA Takumi
bd5a31d598 Revert r159804, "[arm-fast-isel] Add support for vararg function calls."
It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts.

llvm-svn: 159817
2012-07-06 11:12:44 +00:00
Alexey Samsonov
195a9e9c55 Fix PR13202 and a regtest.
DwarfDebug class could generate the same (inlined) DIVariable twice:
1) when trying to find abstract debug variable for a concrete inlined instance.
2) when explicitly collecting info for variables that were optimized out.

This change makes sure that this duplication won't happen and makes
Clang pass "gdb.opt/inline-locals" test from gdb testsuite.

Reviewed by Eric Christopher.

llvm-svn: 159811
2012-07-06 08:45:08 +00:00
Bill Wendling
eca6391741 Sphinxify the CMake document.
llvm-svn: 159806
2012-07-06 05:51:50 +00:00
Jush Lu
4fdc23801c [arm-fast-isel] Add support for vararg function calls.
llvm-svn: 159804
2012-07-06 03:02:37 +00:00
Jack Carter
69077073a6 Changes per review of commit 159787
Mips specific inline asm operand modifier D.
   
   Comment changes and predicate change.
   
   

llvm-svn: 159802
2012-07-06 02:44:22 +00:00
Eric Christopher
82c89ee6c9 Untabify and move a function near similar functions dealing with struct
types.

llvm-svn: 159801
2012-07-06 02:35:57 +00:00
Jakob Stoklund Olesen
8f9719a55e Add some comments suggested in code review.
llvm-svn: 159800
2012-07-06 02:31:22 +00:00
Dmitri Gribenko
a072350ac2 Enable new[] on llvm::BumpPtrAllocator.
llvm-svn: 159789
2012-07-06 00:25:39 +00:00
Jack Carter
d22e7550f9 Mips specific inline asm operand modifier D.
Print the second half of a double word operand.
   
   The include list was cleaned up a bit as well.
   
   Also the test case was modified to test for both
   big and little patterns.
   

llvm-svn: 159787
2012-07-05 23:58:21 +00:00
Owen Anderson
754115a947 Fix an overzealous assertion. It is legitimate for a target to have multiple fixups on a single instruction that target the same byte, so long as their bit-offsets are coordinates appropriately.
llvm-svn: 159785
2012-07-05 22:30:42 +00:00
Akira Hatanaka
5b41861c38 test case for r159770.
llvm-svn: 159771
2012-07-05 19:29:31 +00:00
Akira Hatanaka
af5cc4a41d Enclose instruction rdhwr with directives, which are needed when target is
mips32 rev1 (the directives are emitted when target is mips32r2 too).

llvm-svn: 159770
2012-07-05 19:26:38 +00:00
Akira Hatanaka
4ce0c1ffe9 Enable target dependent directive parsing to hook before standard parser in
AsmParser::ParseStatement.

Patch by Vladimir Medic.

llvm-svn: 159768
2012-07-05 19:09:33 +00:00
Nuno Lopes
1304227af1 add @llvm.donothing
llvm-svn: 159758
2012-07-05 17:37:07 +00:00
Chandler Carruth
f23ce020cb Optimize extendIntervalEndTo a tiny bit by saving one call through the
vector erase. No functionality changed.

llvm-svn: 159746
2012-07-05 12:40:45 +00:00
Chandler Carruth
c481f1e53b Remove dead infrastructure for building DenseMaps with a SlotIndex as
the key -- they are now stored in an IntervalMap.

I noticed this while looking into PR12652.

llvm-svn: 159745
2012-07-05 11:40:23 +00:00
Chandler Carruth
fa7806504f Finish fixing the MachineOperand hashing, providing a nice modern
hash_value overload for MachineOperands. This addresses a FIXME
sufficient for me to remove it, and cleans up the code nicely too.

The important changes to the hashing logic:
- TargetFlags are now included in all of the hashes. These were complete
  missed.
- Register operands have their subregisters and whether they are a def
  included in the hash.
- We now actually hash all of the operand types. Previously, many
  operand types were simply *dropped on the floor*. For example:
  - Floating point immediates
  - Large integer immediates (>64-bit)
  - External globals!
  - Register masks
  - Metadata operands
- It removes the offset from the block-address hash; I'm a bit
  suspicious of this, but isIdenticalTo doesn't consider the offset for
  black addresses.

Any patterns involving these entities could have triggered extreme
slowdowns in MachineCSE or PHIElimination. Let me know if there are PRs
you think might be closed now... I'm looking myself, but I may miss
them.

llvm-svn: 159743
2012-07-05 11:06:22 +00:00
Duncan Sands
763b96beb7 All cases are covered, no need for a default. This deals with the
corresponding clang warning.

llvm-svn: 159742
2012-07-05 10:14:33 +00:00