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5 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
4755a27704 Fix a bunch of ARM tests to be register allocation independent. 
llvm-svn: 130800
 2011-05-03 22:31:21 +00:00
Jim Grosbach
8ae5cfffdd Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 
and shift instructions on ARM. Update the tests to match.

llvm-svn: 114230
 2010-09-17 22:36:38 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81293
 2009-09-09 00:09:15 +00:00
Evan Cheng
f18de63563 Enable arm pre-allocation load / store multiple optimization pass. 
llvm-svn: 73791
 2009-06-19 23:17:27 +00:00
Evan Cheng
d0a66e438f Add a ARM specific pre-allocation pass that re-schedule loads / stores from 
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
 2009-06-13 09:12:55 +00:00