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cff96008ac
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45 Commits

Author SHA1 Message Date
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner
8dd97ae338 This is no longer needed 
llvm-svn: 25219
 2006-01-11 19:52:46 +00:00
Chris Lattner
1ffbbc9ebc Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a 
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.

llvm-svn: 25212
 2006-01-11 07:49:38 +00:00
Chris Lattner
c2bd047226 Fix a bug in i32->f64 conversion lowering 
llvm-svn: 25211
 2006-01-11 07:27:40 +00:00
Chris Lattner
88239024ca silence a bogus gcc warning 
llvm-svn: 25129
 2006-01-06 17:56:38 +00:00
Jim Laskey
41b3ee3c4f Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Evan Cheng
0d39dd2664 Remove some dead code. 
llvm-svn: 25102
 2006-01-05 00:26:14 +00:00
Chris Lattner
2e386f9d46 fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Chris Lattner
39b72c3525 remove dead code 
llvm-svn: 24896
 2005-12-21 05:27:51 +00:00
Chris Lattner
7a430ddf61 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.

llvm-svn: 24859
 2005-12-19 07:57:53 +00:00
Chris Lattner
2aeb7fcbb3 Fix calls to functions returning i64 
llvm-svn: 24856
 2005-12-19 02:15:51 +00:00
Chris Lattner
59f1a92c77 mark some unsupported ops as unsupported 
llvm-svn: 24852
 2005-12-19 01:39:40 +00:00
Chris Lattner
bd8b911c46 Keep stack frames 8-byte aligned. This fixes olden/voronoi 
llvm-svn: 24849
 2005-12-19 01:15:13 +00:00
Chris Lattner
be3df4a199 Elimiante SP and FP, which weren't members of the IntRegs register class 
llvm-svn: 24844
 2005-12-19 00:06:52 +00:00
Chris Lattner
e8dad0dcb9 Add support for calls to external symbols 
llvm-svn: 24838
 2005-12-18 23:07:11 +00:00
Chris Lattner
745c88ba10 we have no memcpy 
llvm-svn: 24837
 2005-12-18 23:00:27 +00:00
Chris Lattner
d8c98dcfe0 Fix a crash on a call with no arguments 
llvm-svn: 24836
 2005-12-18 22:57:47 +00:00
Chris Lattner
27357a915a Change return lowering so that we can autogen the matching code. 
llvm-svn: 24832
 2005-12-18 21:03:04 +00:00
Chris Lattner
41ec63f309 Implement Calls for V8. This would be completely autogenerated except for 
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.

llvm-svn: 24830
 2005-12-18 15:55:15 +00:00
Chris Lattner
b82f4641c4 Implement the full V8 ABI for incoming arguments. 
llvm-svn: 24825
 2005-12-18 13:33:06 +00:00
Chris Lattner
11fa3cc8ee Give V8 select_cc, in the spirit of the PPC backend 
llvm-svn: 24823
 2005-12-18 08:13:54 +00:00
Chris Lattner
e0ebaa24f9 V8 doesn't have FP extload 
llvm-svn: 24821
 2005-12-18 07:13:32 +00:00
Chris Lattner
0d0850d22e simplifications, fix typo 
llvm-svn: 24820
 2005-12-18 07:09:06 +00:00
Chris Lattner
941ba22d08 Add frameindex support 
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions

llvm-svn: 24818
 2005-12-18 06:59:57 +00:00
Chris Lattner
2aab8f4471 Add constant pool support, including folding into addresses. 
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

llvm-svn: 24813
 2005-12-18 02:37:35 +00:00
Chris Lattner
cba8a96bd0 Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, 
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24812
 2005-12-18 02:27:00 +00:00
Chris Lattner
5303e59b7a Add initial support for global variables, and fix a bug in addr mode selection 
where we didn't select the operands.

llvm-svn: 24811
 2005-12-18 02:10:39 +00:00
Chris Lattner
47785d8fc3 Add initial conditional branch support. This doesn't actually work yet due 
to a bug in the scheduler.

llvm-svn: 24807
 2005-12-18 01:20:35 +00:00
Chris Lattner
057fbaea0d Implement 64-bit add/sub, make sure to receive and return 64-bit args with 
the right halves in the right regs

llvm-svn: 24799
 2005-12-17 22:55:57 +00:00
Chris Lattner
a4865938dc implement div and rem 
llvm-svn: 24798
 2005-12-17 22:39:19 +00:00
Chris Lattner
88a3754b46 implement MULHU/MULHS for 64-bit multiplies 
llvm-svn: 24797
 2005-12-17 22:30:00 +00:00
Chris Lattner
a4dbacd0d6 Make the addressing modes smarter 
llvm-svn: 24795
 2005-12-17 21:25:27 +00:00
Chris Lattner
3afda7194f Add support for 64-bit arguments 
llvm-svn: 24792
 2005-12-17 20:59:06 +00:00
Chris Lattner
c1ab8a5e42 Sparc doesn't have sext_inreg 
llvm-svn: 24791
 2005-12-17 20:50:42 +00:00
Chris Lattner
3e51b620ec Add basic addressing mode support and one load. 
llvm-svn: 24782
 2005-12-17 20:04:49 +00:00
Chris Lattner
4de7491c52 Implement ret with operand, giving us this: 
int %test(int %A) {
  ret int %A
}

llvm-svn: 24773
 2005-12-17 08:15:09 +00:00
Chris Lattner
3fca9488d2 Implement LowerArguments, at least for the first 6 integer args 
llvm-svn: 24770
 2005-12-17 08:03:24 +00:00
Chris Lattner
62aadddb9d Add the framework for a dag-dag isel 
llvm-svn: 24769
 2005-12-17 07:47:01 +00:00