6 Commits

Author	SHA1	Message	Date
Evan Cheng	ce610bd6b3	Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, ... and xor. The 32-bit move immediates can be hoisted out of loops by machine LICM but the isel hacks were preventing them. Instead, let peephole optimization pass recognize registers that are defined by immediates and the ARM target hook will fold the immediates in. Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ instructions if there are multiple uses. This happens when the 'and' is live out, machine sink would have sinked the computation and that ends up pessimizing code. The peephole pass would recognize situations where the 'and' can be toggled to define CPSR and eliminate the comparison anyway. 2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking important optimizations. rdar://8663787, rdar://8241368 llvm-svn: 119548	2010-11-17 20:13:28 +00:00
Evan Cheng	19f018a1be	Add conditional mvn instructions. ... llvm-svn: 118935	2010-11-12 22:42:47 +00:00
Dan Gohman	142428ce64	Eliminate more uses of llvm-as and llvm-dis. ... llvm-svn: 81293	2009-09-09 00:09:15 +00:00
Chris Lattner	a5368fd283	add no-unwind, remove duplicate run line. ... llvm-svn: 66775	2009-03-12 05:56:37 +00:00
Dan Gohman	794fa1f8f7	Convert tests using "| wc -l | grep ..." to use the count script. ... llvm-svn: 41097	2007-08-15 13:36:28 +00:00
Evan Cheng	56938a1fd8	New tests. ... llvm-svn: 37686	2007-06-21 07:40:00 +00:00