Evan Cheng
d3babfe458
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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llvm-svn: 25158
2006-01-09 18:33:28 +00:00
Evan Cheng
6a9c735e21
* Added integer div / rem.
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* Fixed a load folding bug.
llvm-svn: 25136
2006-01-06 23:19:29 +00:00
Evan Cheng
060b19c708
ISEL code for MULHU, MULHS, and UNDEF.
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llvm-svn: 25132
2006-01-06 20:36:21 +00:00
Chris Lattner
88239024ca
silence a bogus gcc warning
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llvm-svn: 25129
2006-01-06 17:56:38 +00:00
Evan Cheng
66355df170
Addd (shl x, 1) ==> (shl x, x) peepholes.
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llvm-svn: 25123
2006-01-06 02:31:59 +00:00
Evan Cheng
efe621adce
fold (shl x, 1) -> (add x, x)
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llvm-svn: 25120
2006-01-06 01:06:31 +00:00
Evan Cheng
1e0d7b98f3
* Fast call support.
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* FP cmp, setcc, etc.
llvm-svn: 25117
2006-01-06 00:43:03 +00:00
Evan Cheng
6c86cf3a5f
Added ConstantFP patterns.
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llvm-svn: 25108
2006-01-05 02:08:37 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
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llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Evan Cheng
2329411038
DAG based isel call support.
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llvm-svn: 25103
2006-01-05 00:27:02 +00:00
Chris Lattner
cee6093ca8
Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc
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llvm-svn: 25024
2005-12-27 03:02:18 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Evan Cheng
cd69c81c5e
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
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llvm-svn: 25004
2005-12-24 09:48:35 +00:00
Evan Cheng
d87688fe72
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Evan Cheng
995503fc91
More X86 floating point patterns.
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llvm-svn: 24990
2005-12-23 07:31:11 +00:00
Chris Lattner
8e80a247ff
make sure bit_convert's are expanded
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llvm-svn: 24979
2005-12-23 05:15:23 +00:00
Evan Cheng
e458553c73
Bye bye HACKTROCITY.
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llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
fb6413e05a
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Evan Cheng
add305de26
Oops. Accidentally deleted RET pattern. It's still needed for return void;
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llvm-svn: 24920
2005-12-21 22:22:16 +00:00
Jim Laskey
d82881490c
Disengage DEBUG_LOC from non-PPC targets.
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llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Chris Lattner
347c6eedae
This was meant to go in
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llvm-svn: 24900
2005-12-21 07:50:26 +00:00
Chris Lattner
884def40f4
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
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that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
llvm-svn: 24899
2005-12-21 07:47:04 +00:00
Chris Lattner
ee15b5393f
Wrap some long lines: no functionality change
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llvm-svn: 24898
2005-12-21 05:34:58 +00:00
Evan Cheng
cab6710034
Remove ISD::RET select code. Now tblgen'd.
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llvm-svn: 24889
2005-12-21 02:41:57 +00:00
Evan Cheng
0226113ed5
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
ace8f1fafa
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
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llvm-svn: 24886
2005-12-20 22:59:51 +00:00
Evan Cheng
1c3ea75ffc
Added X86 readport patterns.
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llvm-svn: 24879
2005-12-20 07:38:38 +00:00
Evan Cheng
44e4e6a57f
Added a hook to print out names of target specific DAG nodes.
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llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Evan Cheng
bb34a50cb0
X86 conditional branch support.
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llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
c87099506c
It's essential we clear CodeGenMap after isel every basic block!
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llvm-svn: 24867
2005-12-19 22:36:02 +00:00
Chris Lattner
399dfec939
eliminate some redundancy
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llvm-svn: 24781
2005-12-17 19:47:05 +00:00
Evan Cheng
56649f9616
Darwin API issue: indirect load of external and weak symbols.
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llvm-svn: 24775
2005-12-17 09:13:43 +00:00
Evan Cheng
a3ff796fda
Remove a few lines of dead code.
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llvm-svn: 24768
2005-12-17 07:18:44 +00:00
Evan Cheng
de142995a1
Added an idea about any_extend for performance tuning.
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llvm-svn: 24763
2005-12-17 06:54:43 +00:00
Evan Cheng
c308dfb801
Added truncate.
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llvm-svn: 24760
2005-12-17 02:02:50 +00:00
Evan Cheng
6a94c77c55
Added anyext, modelled as zext on X86.
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llvm-svn: 24759
2005-12-17 01:47:57 +00:00
Evan Cheng
19550821d1
Added some isel ideas.
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llvm-svn: 24757
2005-12-17 01:25:19 +00:00
Evan Cheng
5d90b26707
Added support for cmp, test, and conditional move instructions.
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llvm-svn: 24756
2005-12-17 01:24:02 +00:00
Evan Cheng
566600c17d
Only lower SELECT when using DAG based isel.
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llvm-svn: 24755
2005-12-17 01:22:13 +00:00
Evan Cheng
d51da93a03
X86 lowers SELECT to a cmp / test followed by a conditional move.
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llvm-svn: 24754
2005-12-17 01:21:05 +00:00
Chris Lattner
71443a0e36
Don't globalize internal functions
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llvm-svn: 24727
2005-12-16 00:07:30 +00:00
Evan Cheng
43152cb8b6
* Promote all 1 bit entities to 8 bit.
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* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
llvm-svn: 24726
2005-12-15 19:49:23 +00:00
Evan Cheng
f72e7055c0
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
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leaaddr.
llvm-svn: 24724
2005-12-15 08:31:04 +00:00
Evan Cheng
cc6efa8b6f
Handling zero extension of 1 bit value.
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llvm-svn: 24722
2005-12-15 01:02:48 +00:00
Evan Cheng
576b826f71
Use MOV8rm to load 1 bit value.
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llvm-svn: 24721
2005-12-15 00:59:17 +00:00
Evan Cheng
40e397521c
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
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llvm-svn: 24717
2005-12-14 22:28:18 +00:00
Evan Cheng
3b094e89fb
Added sext and zext patterns.
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llvm-svn: 24705
2005-12-14 02:22:27 +00:00
Evan Cheng
ad1e2fd14a
Add load + store folding srl and sra patterns.
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llvm-svn: 24696
2005-12-13 07:24:22 +00:00