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Commit Graph

19 Commits

Author SHA1 Message Date
Chandler Carruth
ae65e281f3 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Jonas Paulsson
1b514619dd [RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
* The method getRegAllocationHints() is now of bool type instead of void. If
true is returned, regalloc (AllocationOrder) will *only* try to allocate the
hints, as opposed to merely trying them before non-hinted registers.

* TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with
an increase in number of LOCRs.

In this case, it is desired to force the hints even though there is a slight
increase in spilling, because if a non-hinted register would be allocated,
the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR
(Load On Condition) SystemZ instruction must have both operands in either the
low or high part of the 64 bit register.

Reviewers: Quentin Colombet and Ulrich Weigand
https://reviews.llvm.org/D36795

llvm-svn: 317879
2017-11-10 08:46:26 +00:00
David Majnemer
85242fb9f9 Use the range variant of find instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

llvm-svn: 278433
2016-08-11 22:21:41 +00:00
Matthias Braun
290760f27e TargetRegisterInfo: Provide a way to check assigned registers in getRegAllocationHints()
Pass a const reference to LiveRegMatrix to getRegAllocationHints()
because some targets can prodive better hints if they can test whether a
physreg has been used for register allocation yet.

llvm-svn: 242340
2015-07-15 22:16:00 +00:00
Benjamin Kramer
dcff586d10 [CodeGen] Reduce visibility of implementation details
NFC.

llvm-svn: 241164
2015-07-01 14:47:39 +00:00
Benjamin Kramer
da144ed5a2 Canonicalize header guards into a common format.
Add header guards to files that were missing guards. Remove #endif comments
as they don't seem common in LLVM (we can easily add them back if we decide
they're useful)

Changes made by clang-tidy with minor tweaks.

llvm-svn: 215558
2014-08-13 16:26:38 +00:00
Aditya Nandakumar
178353e71f Check hint registers for interference only once before evictions
llvm-svn: 196536
2013-12-05 21:18:40 +00:00
Benjamin Kramer
23f676e21d Revert "Give internal classes hidden visibility."
It works with clang, but GCC has different rules so we can't make all of those
hidden. This reverts commit r190534.

llvm-svn: 190536
2013-09-11 18:05:11 +00:00
Benjamin Kramer
386bd314a1 Give internal classes hidden visibility.
Worth 100k on a linux/x86_64 Release+Asserts clang.

llvm-svn: 190534
2013-09-11 17:42:27 +00:00
Jakob Stoklund Olesen
7b54416641 Limit the search space in RAGreedy::tryEvict().
When tryEvict() is looking for a cheaper register in the allocation
order, skip the tail of too expensive registers when possible.

llvm-svn: 172281
2013-01-12 00:57:44 +00:00
Jakob Stoklund Olesen
2db1b3c4ac Speed up the AllocationOrder class a bit.
Allow the central functions to be inlined, and use the argumentless
isHint() function when possible.

llvm-svn: 169319
2012-12-04 22:25:16 +00:00
Chandler Carruth
a98c778194 Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

llvm-svn: 169224
2012-12-04 07:12:27 +00:00
Jakob Stoklund Olesen
cfbf55a3fb Use the new getRegAllocationHints() hook from AllocationOrder.
This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.

llvm-svn: 169173
2012-12-03 22:51:04 +00:00
Jakob Stoklund Olesen
9bbaa29b20 Use MCPhysReg for RegisterClassInfo allocation orders.
This saves a bit of memory.

llvm-svn: 168852
2012-11-29 03:34:17 +00:00
Jakob Stoklund Olesen
c81d459349 Fix old doxygen comment.
llvm-svn: 148825
2012-01-24 18:09:18 +00:00
Jakob Stoklund Olesen
9b9861651f Get allocation orders from RegisterClassInfo when possible.
Only target-dependent hints require callbacks. The RCI allocation order
has CSR aliases last according to their order of appearance in the
getCalleeSavedRegs list. This can depend on the calling convention.

This way, AllocationOrder::next doesn't have to check for reserved
registers, and CSRs are always allocated last, even with weird calling
conventions.

llvm-svn: 132690
2011-06-06 21:02:04 +00:00
Jakob Stoklund Olesen
449aaba5b0 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

llvm-svn: 132581
2011-06-03 20:34:53 +00:00
Jakob Stoklund Olesen
9d328484ce Try harder to get the hint by preferring to evict hint interference.
llvm-svn: 126463
2011-02-25 01:04:22 +00:00
Jakob Stoklund Olesen
e3924a3c85 Add an AllocationOrder class that can iterate over the allocatable physical
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

llvm-svn: 121497
2010-12-10 18:36:02 +00:00