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162927 Commits

Author SHA1 Message Date
Gerolf Hoflehner
d6a6778f3e [DAGCombiner] Fix for oss-fuzz bug
llvm-svn: 330178
2018-04-17 07:22:34 +00:00
Michael Zolotukhin
898f9d2ca8 [SSAUpdaterBulk] Add debug logging.
llvm-svn: 330176
2018-04-17 04:45:40 +00:00
Michael Zolotukhin
cd41fb1e7f Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.
One more, hopefully the last, bug is fixed: when forming UsesToRewrite
we should ignore phi operands coming from edges that we want to delete.

This reverts r329910.

llvm-svn: 330175
2018-04-17 04:45:22 +00:00
Gerolf Hoflehner
9f57c649e7 [IR] Upgrade comment token in objc retain release marker for asm call
Older compiler issued '#' instead of ';'

llvm-svn: 330173
2018-04-17 04:02:24 +00:00
Peter Collingbourne
3cf02eb4eb COFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.
Differential Revision: https://reviews.llvm.org/D45714

llvm-svn: 330172
2018-04-17 01:54:34 +00:00
whitequark
dbe3225739 CODE_OWNERS: Take ownership of C API.
llvm-svn: 330171
2018-04-17 01:09:12 +00:00
Roman Tereshin
af03233d9a [DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of CloneModule"
Apparently, DebugInfoFinder::processCompileUnit doesn't process all
of the possible kinds of DIImportedEntit'ies, e.g. DIGlobalVariable's.

Previously introduced `llvm_unreachable` is therefore incorrect.
Removing it here.

llvm-svn: 330167
2018-04-16 23:39:44 +00:00
Saleem Abdulrasool
d583a0f050 Revert "build: reserve --color-diagnostics for lld"
This reverts SVN r330158.

Seems that there was a change to linker flags handling in SVN r316972.
That would alter the behaviour to correct the linker flag handling in
CMake (requiring CMake 3.4.3+).  Since that is already the minimum
version required for LLVM, hard coding the knowledge of the linker is
not required, which is a strictly better solution.

llvm-svn: 330161
2018-04-16 21:57:10 +00:00
Saleem Abdulrasool
1511d68d24 build: reserve --color-diagnostics for lld
When building out-of-tree compilers (e.g. swift), the linker check here
may yield incorrect values.  Ensure that we are using lld before we
attempt to use `--color-diagnostics` for the linker.  Other linkers (i.e
bfd, gold) do not support this flag and the test can pass in some cases
and then fail subsequently when building.

llvm-svn: 330158
2018-04-16 21:05:56 +00:00
Zachary Turner
d4bde9b53a [PDB] Correctly use the target machine when writing DBI stream.
Using Config->is64() will treat ARM64 as Amd64, which is incorrect.
Furthermore, there are more esoteric architectures that could
theoretically be encountered.  Just set it directly to the machine
type, which we already know anyway.

llvm-svn: 330157
2018-04-16 20:42:06 +00:00
Mandeep Singh Grang
4a217547b7 [RISCV] Fix assert message operator
Summary:
Specifying assert message with an || operator makes the compiler interpret it
 as a bool. Changed it to &&.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D45660

llvm-svn: 330148
2018-04-16 18:56:10 +00:00
Zachary Turner
aff599c919 Resubmit "Fix some incorrect fields in our generated PDBs."
This fixes the failing tests.  They simply hadn't been updated
to match the new output resulting from this patch.

llvm-svn: 330145
2018-04-16 18:17:13 +00:00
Craig Topper
c0dcee6b0c [X86] Remove unnecessary -mattr to enable avx512bw when the -mcpu already enabled it. NFC
This makes the test similar to the arith-sub.ll and arith-mul.ll tests.

llvm-svn: 330144
2018-04-16 18:14:19 +00:00
Haicheng Wu
a40aa47171 [SLP] Use getExtractWithExtendCost() to compute the scalar cost of extractelement/ext pair
We use getExtractWithExtendCost to calculate the cost of extractelement and
s|zext together when computing the extract cost after vectorization, but we
calculate the cost of extractelement and s|zext separately when computing the
scalar cost which is larger than it should be.

Differential Revision: https://reviews.llvm.org/D45469

llvm-svn: 330143
2018-04-16 18:09:49 +00:00
Lang Hames
d365016c99 [ORC] Add a MaterializationResponsibility class to track responsibility for
materializing function definitions.

MaterializationUnit instances are responsible for resolving and finalizing
symbol definitions when their materialize method is called. By contract, the
MaterializationUnit must materialize all definitions it is responsible for and
no others. If it can not materialize all definitions (because of some error)
then it must notify the associated VSO about each definition that could not be
materialized. The MaterializationResponsibility class tracks this
responsibility, asserting that all required symbols are resolved and finalized,
and that no extraneous symbols are resolved or finalized. In the event of an
error it provides a convenience method for notifying the VSO about each
definition that could not be materialized.

llvm-svn: 330142
2018-04-16 18:05:24 +00:00
Lang Hames
7f47099aec [ORC] Merge VSO notifyResolutionFailed and notifyFinalizationFailed in to
notifyMaterializationFailed.

The notifyMaterializationFailed method can determine which error to raise by
looking at which queue the pending queries are in (resolution or finalization).

llvm-svn: 330141
2018-04-16 18:05:22 +00:00
Krzysztof Parzyszek
2058d53ccb [Hexagon] Turn off flag enabling auto-vectorization
It was turned on for testing and was accidentally left on in the commit.

llvm-svn: 330139
2018-04-16 17:35:30 +00:00
Lei Huang
fb7f0ad2eb [NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()
Move veriication check for legal conversions to f128 into LowerINT_TO_FP()
and fix some indentations to match other sections of the code for readability.

llvm-svn: 330138
2018-04-16 17:30:24 +00:00
Sanjay Patel
daaab6defe [InstCombine] simplify code in SimplifyAssociativeOrCommutative; NFCI
llvm-svn: 330137
2018-04-16 17:15:13 +00:00
Craig Topper
34799aaa25 [Attributes] Fix a bug in AttributeList::get so it can handle a mix of FunctionIndex and ReturnIndex/arg indices at the same time
The code uses the index of the last element in the sorted array to determine the maximum size needed for the vector. But if the last index is a FunctionIndex(~0), attrIdxToArrayIdx will return 0 and the vector will have size 1. If there are any indices before FunctionIndex, those values would return a value larger than 0 from attrIdxToArrayIdx. So in this case we need to look in front of the FunctionIndex to get the true size needed.

Differential Revision: https://reviews.llvm.org/D45632

llvm-svn: 330136
2018-04-16 17:05:01 +00:00
Adrian McCarthy
5a218694ff Remove faulty assertion in llvm-pdbutil
If a class's first data member is an instance of an empty class, then an
assertion in the PrettyClassLayoutGraphicalDumper would fail. The
storage is reserved, but it's not marked as in use.

As far as I understand, it's the assertion that's faulty, so I removed it
and updated the nearby comment.

Found by running llvm-pdbutil against its own PDB, and this assertion would
fail on HashAdjusters, which is a HashTable whose first data member is a
TraitsT, which is a PdbHashTraits<T>, which is an empty struct. (The struct
has a specialization for uint32_t, but that specialization doesn't apply
here because the T is actually ulittle32_t.)

Differential Revision: https://reviews.llvm.org/D45645

llvm-svn: 330135
2018-04-16 17:01:18 +00:00
Zachary Turner
9ee46a1f99 Revert "Fix some incorrect fields in our generated PDBs."
There are a couple of failing tests which slipped under my radar
so I'm reverting this while I attempt to fix.

llvm-svn: 330133
2018-04-16 16:55:41 +00:00
Brock Wyma
5ce2d20277 [CodeView] Initial support for emitting S_THUNK32 symbols for compiler...
When emitting CodeView debug information, compiler-generated thunk routines
should be emitted using S_THUNK32 symbols instead of S_GPROC32_ID symbols so
Visual Studio can properly step into the user code.  This initial support only
handles standard thunk ordinals.

Differential Revision: https://reviews.llvm.org/D43838

llvm-svn: 330132
2018-04-16 16:53:57 +00:00
Zachary Turner
5fb69639ff Fix some incorrect fields in our generated PDBs.
Most of these are pretty trivial and obvious. Setting the toolchain
version to 14.11 is perhaps a little questionable, but we've been bitten
in the past where one of our version fields sidn't match MSVC's, and I
definitely don't want to go through that diagnosis again as it was
pretty time consuming and hard to track down.

I found all of these by using llvm-pdbutil export to dump the dbi and
pdb streams to a file, then using fc followed by llvm-pdbutil explain to
explain the mismatched bytes.

There are still some more, these are just the low hanging fruit.

Differential Revision: https://reviews.llvm.org/D45276

llvm-svn: 330130
2018-04-16 16:27:49 +00:00
Sanjay Patel
c7a93b6eaa [InstCombine] simplify getBinOpsForFactorization(); NFC
llvm-svn: 330129
2018-04-16 15:19:24 +00:00
David Blaikie
8dd4dbe516 SmallVectorMemoryBuffer: Fix some comments
llvm-svn: 330128
2018-04-16 14:23:15 +00:00
Sanjay Patel
b4222398c5 [InstCombine] simplify fneg+fadd folds; NFC
Two cleanups:
1. As noted in D45453, we had tests that don't need FMF that were misplaced in the 'fast-math.ll' test file.
2. This removes the final uses of dyn_castFNegVal, so that can be deleted. We use 'match' now.

llvm-svn: 330126
2018-04-16 14:13:57 +00:00
Sanjay Patel
6d560bb156 [InstCombine] fix formatting; NFC
llvm-svn: 330124
2018-04-16 13:21:15 +00:00
Dmitry Preobrazhensky
12adb5f9d4 [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
See bug 36356: https://bugs.llvm.org/show_bug.cgi?id=36356

Differential Revision: https://reviews.llvm.org/D45446

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 330123
2018-04-16 12:41:38 +00:00
Pavel Labath
a32e1b3a89 [test] Avoid spurious failure in debug-names-find.s. NFC.
Have llvm-dwarfdump take input from stdin to avoid leaking the host paths into
the tests, causing nondeterministic failures.

llvm-svn: 330121
2018-04-16 11:16:41 +00:00
Sander de Smalen
6b1af03387 [AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions.
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D45624

llvm-svn: 330120
2018-04-16 10:46:18 +00:00
Roman Lebedev
947d43d220 [LatencyPriorityQueue] Fix build: missing override
[10/260] Building CXX object lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o
FAILED: lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o
/usr/local/bin/clang++  -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/CodeGen -I/build/llvm/lib/CodeGen -I/usr/include/libxml2 -Iinclude -I/build/llvm/include -g0 -fPIC -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -std=c++11 -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wstring-conversion -fcolor-diagnostics -ffunction-sections -fdata-sections -O3 -g0  -fPIC   -UNDEBUG  -fno-exceptions -fno-rtti -MD -MT lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o -MF lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o.d -o lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o -c /build/llvm/lib/CodeGen/PostRASchedulerList.cpp
In file included from /build/llvm/lib/CodeGen/PostRASchedulerList.cpp:26:
/build/llvm/include/llvm/CodeGen/LatencyPriorityQueue.h:87:27: error: 'dump' overrides a member function but is not marked 'override' [-Werror,-Winconsistent-missing-override]
    LLVM_DUMP_METHOD void dump(ScheduleDAG *DAG) const {
                          ^
/build/llvm/include/llvm/CodeGen/ScheduleDAG.h:547:18: note: overridden virtual function is here
    virtual void dump(ScheduleDAG *) const {}
                 ^
1 error generated.

llvm-svn: 330119
2018-04-16 10:40:56 +00:00
Stefan Pintilie
804f49d9b3 [LatencyPriorityQueue] The LatencyPriorityQueue class is missing the implementation for the dump function
Added implementation of the dump function for LatencyPriorityQueue.

llvm-svn: 330117
2018-04-16 10:20:56 +00:00
Sander de Smalen
7c485019b2 [AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions.
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45623

llvm-svn: 330116
2018-04-16 10:10:48 +00:00
Puyan Lotfi
52a5229366 [MIR-Canon] Fixing a test failure caused by COPY Folding.
llvm-svn: 330115
2018-04-16 09:31:49 +00:00
Stefan Maksimovic
8af3d8b348 [mips] Restrict certain trap instructions for micromipsr6
Instructions removed from micromipsr6:
teqi, tgei, tgeiu, tlti, tltiu, tnei

Differential Revision: https://reviews.llvm.org/D45318

llvm-svn: 330114
2018-04-16 09:22:20 +00:00
Puyan Lotfi
b93eb7f63b [MIR-Canon] Adding ISA-Agnostic COPY Folding.
Transforms the following:

    %vreg1234:gpr32 = COPY %42
    %vreg1235:gpr32 = COPY %vreg1234
    %vreg1236:gpr32 = COPY %vreg1235
    $w0 = COPY %vreg1236

into:

    $w0 = COPY %42

Assuming %42 is also a gpr32

llvm-svn: 330113
2018-04-16 09:03:03 +00:00
Puyan Lotfi
4b983546c9 [NFC][MIR-Canon] clang-format cleanup of Mir Canonicalizer Pass.
llvm-svn: 330111
2018-04-16 08:12:15 +00:00
Gabor Buella
7636e37623 [X86] Introduce archs: goldmont-plus & tremont
Using Goldmont's cost tables for these two upcoming
atom archs.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45612

llvm-svn: 330109
2018-04-16 07:47:35 +00:00
Sander de Smalen
67ed876140 [AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.
Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45622

llvm-svn: 330108
2018-04-16 07:09:29 +00:00
Weiming Zhao
c5888b6f0c Rename ObjectMemoryBuffer to SmallVectorMemoryBuffer; NFCI
Summary: As discussed in https://reviews.llvm.org/D45606, it makes more sense to name the class as SmallVectorMemoryBuffer

Reviewers: bkramer, dblaikie

Reviewed By: dblaikie

Subscribers: mehdi_amini, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D45661

llvm-svn: 330107
2018-04-16 03:44:03 +00:00
Shiva Chen
17aab021be [BasicAA] Return MayAlias for the pointer plus variable offset to
structure object member

Differential Revision: https://reviews.llvm.org/D45510

llvm-svn: 330106
2018-04-16 01:58:39 +00:00
Craig Topper
f72e0a089f [X86] Use APInt::isSubsetof instead of APInt::intersects to avoid a negation of an APInt value. NFC
llvm-svn: 330105
2018-04-15 19:11:25 +00:00
Craig Topper
3c4fceca33 [X86] Use uint32_t instead of unsigned in GetLo32XForm for readability. NFC
GetLo8XForm right next to it uses uint8_t so uint32_t is consistent.

llvm-svn: 330104
2018-04-15 19:11:24 +00:00
Roman Lebedev
afc2c5afb5 [InstCombine] Simplify 'xor' to 'or' if no common bits are set.
Summary:
In order to get the whole fold as specified in [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]],
let's first handle the simple straight-forward things.
Let's start with the `and` -> `or` simplification.

The one obvious thing missing here: the constant mask is not handled.
I have an idea how to handle it, but it will require some thinking,
and is not strictly required here, so i've left that for later.

https://rise4fun.com/Alive/Pkmg

Reviewers: spatel, craig.topper, eli.friedman, jingyue

Reviewed By: spatel

Subscribers: llvm-commits

Was reviewed as part of https://reviews.llvm.org/D45631

llvm-svn: 330103
2018-04-15 18:59:44 +00:00
Roman Lebedev
23340b5f63 [SelectionDAG][NFC] haveNoCommonBitsSet(): add FIXME notes
As suggested in https://reviews.llvm.org/D45631#1068338

llvm-svn: 330102
2018-04-15 18:59:38 +00:00
Roman Lebedev
92ec97f183 [InstCombine] Simplify 'add' to 'or' if no common bits are set.
Summary:
In order to get the whole fold as specified in [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]],
let's first handle the simple straight-forward things.
Let's start with the `and` -> `or` simplification.

The one obvious thing missing here: the constant mask is not handled.
I have an idea how to handle it, but it will require some thinking,
and is not strictly required here, so i've left that for later.

https://rise4fun.com/Alive/Pkmg

Reviewers: spatel, craig.topper, eli.friedman, jingyue

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45631

llvm-svn: 330101
2018-04-15 18:59:33 +00:00
Roman Lebedev
f77cf7cc42 [NFC] ConstantOffsetExtractor::CanTraceInto(): add FIXME: no tests
As suggested in https://reviews.llvm.org/D45631#1068338,
looking at haveNoCommonBitsSet() users, and *trying* to
show the change effect elsewhere.

llvm-svn: 330100
2018-04-15 18:59:27 +00:00
Andrea Di Biagio
053618b18b [MC] Moved all the remaining logic that computed instruction latency and reciprocal throughput from TargetSchedModel to MCSchedModel.
TargetSchedModel now always delegates to MCSchedModel the computation of
instruction latency and reciprocal throughput.
No functional change intended.

llvm-svn: 330099
2018-04-15 17:32:17 +00:00
Sanjay Patel
d226d58b43 [DAGCombiner, PowerPC] allow X - (fpext(-Y) --> X + fpext(Y) with multiple uses
This is a transform that I limited in instcombine in rL329821 because it was 
creating more instructions in IR when the cast has multiple uses.

But if the cast is free, then we can do the transform regardless of other
uses because it improves the potential throughput of the calculation by
removing a dependency on the fneg.

Differential Revision: https://reviews.llvm.org/D45598

llvm-svn: 330098
2018-04-15 16:43:48 +00:00