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Commit Graph

10699 Commits

Author SHA1 Message Date
Chris Lattner
d73a5042d9 Fix a problem where constant expr shifts would not have their shift amount
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll

llvm-svn: 22969
2005-08-22 17:28:31 +00:00
Chris Lattner
a9710ba54f Speed up this loop a bit, based on some observations that Nate made, and
add some comments.  This loop really needs to be reevaluated!

llvm-svn: 22966
2005-08-22 16:55:22 +00:00
Chris Lattner
4c9d1715ff Implement stores.
llvm-svn: 22963
2005-08-22 01:27:59 +00:00
Chris Lattner
7ce81741ff Add a fast-path for register values. Add support for constant pool entries,
allowing us to compile this:

float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, 10.1
        ret float %R
}

to this:

_test2:
        lfs r2, 0(r3)
        lis r3, ha16(.CPI_test2_0)
        lfs r3, lo16(.CPI_test2_0)(r3)
        fadds f1, r2, r3
        blr

llvm-svn: 22962
2005-08-22 01:04:32 +00:00
Chris Lattner
86aceaf749 Fix compilation of:
float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, %Q
        ret float %R
}

By returning the right result.

llvm-svn: 22961
2005-08-22 00:59:14 +00:00
Chris Lattner
81cde8c7b6 Make sure expressions only have one use before emitting them into a place that is conditionally executed
llvm-svn: 22960
2005-08-22 00:47:28 +00:00
Chris Lattner
a3f9415a81 Implement most of load support. There is still a bug though.
llvm-svn: 22959
2005-08-21 22:31:09 +00:00
Chris Lattner
8927bf468d add anew method
llvm-svn: 22957
2005-08-21 22:30:30 +00:00
Chris Lattner
7a04eff613 Add support for frame index nodes
llvm-svn: 22956
2005-08-21 19:56:04 +00:00
Chris Lattner
cbbd212622 add a method
llvm-svn: 22955
2005-08-21 19:48:59 +00:00
Chris Lattner
0d32366da7 Don't print out the MBB label for the entry mbb
llvm-svn: 22953
2005-08-21 19:09:33 +00:00
Chris Lattner
d8b7b492fe Simplify the logic for BRTWOWAY_CC handling. The isel code already
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.

llvm-svn: 22952
2005-08-21 19:03:28 +00:00
Chris Lattner
0f148968ba Implement selection for branches.
llvm-svn: 22951
2005-08-21 18:50:37 +00:00
Chris Lattner
481b47fc75 add a method
llvm-svn: 22949
2005-08-21 18:49:33 +00:00
Chris Lattner
3f6df51c19 Add support for basic blocks, fix a bug in result # computation
llvm-svn: 22948
2005-08-21 18:49:29 +00:00
Chris Lattner
9bb0d10479 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

llvm-svn: 22947
2005-08-21 18:03:09 +00:00
Chris Lattner
1994775d9d If the false value for a select_cc is really simple (has no inputs), evaluate
it in the block.  This codegens:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

as:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        li r4, 1
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r2, r4, r4
.LBB_test_2:    ;
        or r3, r2, r2
        blr

... which is one fewer instruction.  The savings are more significant for
global address and constantfp nodes.

llvm-svn: 22946
2005-08-21 17:41:11 +00:00
Duraid Madina
06affa0edd reenable collapse of loadimm+AND -> dep.z (thanks guys)
llvm-svn: 22944
2005-08-21 15:43:53 +00:00
Chris Lattner
7c3e52ef92 fix bogus warning
llvm-svn: 22943
2005-08-20 18:07:27 +00:00
Jim Laskey
43192e173f Repair an out by one error for IA64.
llvm-svn: 22942
2005-08-20 11:05:23 +00:00
Chris Lattner
9fbbc41021 add support for global address, including PIC support.
This REALLY should be lowered by the legalizer!

llvm-svn: 22941
2005-08-19 22:38:53 +00:00
Chris Lattner
5b7488224d Add support for global address nodes
llvm-svn: 22940
2005-08-19 22:38:24 +00:00
Chris Lattner
5210fd0e51 Add support for TargetGlobalAddress nodes
llvm-svn: 22938
2005-08-19 22:31:04 +00:00
Chris Lattner
bedf8e757a Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
us to compile stuff like this:

double %test(double %A, double %B, double %C, double %E) {
        %F = mul double %A, %A
        %G = add double %F, %B
        %H = sub double -0.0, %G
        %I = mul double %H, %C
        %J = add double %I, %E
        ret double %J
}

to:

_test:
        fnmadd f0, f1, f1, f2
        fmadd f1, f0, f3, f4
        blr

woot!

llvm-svn: 22937
2005-08-19 21:43:53 +00:00
Chris Lattner
b36807b0d0 Fix a bug in previous commit
llvm-svn: 22936
2005-08-19 21:34:13 +00:00
Chris Lattner
a8f147c1b4 Fix a typeo, no wonder all tokenfactor edges were the same!
llvm-svn: 22935
2005-08-19 21:33:02 +00:00
Chris Lattner
ac699c4db9 Print physreg register nodes with target names (e.g. F1) instead of numbers
llvm-svn: 22934
2005-08-19 21:21:16 +00:00
Chris Lattner
011a721d08 Before implementing copyfromreg, we'll implement copytoreg correctly.
This gets us this for the previous testcase:

_test:
        lis r2, 0
        ori r3, r2, 65535
        blr

Note that we actually write to r3 (the return reg) correctly now :)

llvm-svn: 22933
2005-08-19 20:50:53 +00:00
Chris Lattner
9af3aaf541 Now that we have operand info for machine instructions, use it to create
temporary registers for things that define a register.  This allows dag->dag
isel to compile this:

int %test() { ret int 65535 }

into:

_test:
        lis r2, 0
        ori r2, r2, 65535
        blr

Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.

llvm-svn: 22932
2005-08-19 20:45:43 +00:00
Chris Lattner
2ac3fd08d2 Split RegisterClass 'Methods' into MethodProtos and MethodBodies
llvm-svn: 22929
2005-08-19 19:13:20 +00:00
Chris Lattner
78107cb342 put reg classes into namespace
llvm-svn: 22927
2005-08-19 18:53:43 +00:00
Chris Lattner
2b1d327d29 Put reg classes into namespaces
llvm-svn: 22926
2005-08-19 18:52:55 +00:00
Chris Lattner
f86654ffde Put register classes into namespaces
llvm-svn: 22925
2005-08-19 18:51:57 +00:00
Chris Lattner
9d61d4a3e4 Put register classes in namespaces
llvm-svn: 22924
2005-08-19 18:50:46 +00:00
Chris Lattner
15d2e8a253 Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace.  Update getRegClassForType()
to use modified names due to tblgen change.

llvm-svn: 22923
2005-08-19 18:50:11 +00:00
Chris Lattner
47005fe346 put reg classes in namespaces
llvm-svn: 22922
2005-08-19 18:49:22 +00:00
Chris Lattner
9a9fe27bd2 Require that targets specify a namespace for their register classes.
llvm-svn: 22921
2005-08-19 18:48:48 +00:00
Chris Lattner
61526c0f6c The skeleton target has never had an isel
llvm-svn: 22917
2005-08-19 18:35:41 +00:00
Chris Lattner
f0b42a6f29 This code has always been dead on itanium
llvm-svn: 22916
2005-08-19 18:34:37 +00:00
Chris Lattner
b46e525e23 This code has always been dead for alpha
llvm-svn: 22915
2005-08-19 18:33:26 +00:00
Chris Lattner
e894de1791 The simple isel being gone makes this dead!
llvm-svn: 22914
2005-08-19 18:32:03 +00:00
Chris Lattner
f0e731ea49 Now that the simple isels are dead, so is this.
llvm-svn: 22913
2005-08-19 18:30:39 +00:00
Chris Lattner
db827889e3 Sparcv9 gets no operand info
llvm-svn: 22909
2005-08-19 16:56:56 +00:00
Jeff Cohen
12674110d5 Fix VC++ constant truncation warning.
llvm-svn: 22907
2005-08-19 16:19:21 +00:00
Duraid Madina
4efc0b6f2b a bugfix (up top) and a quick repair job: disable generation of dep.z
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.

llvm-svn: 22904
2005-08-19 13:25:50 +00:00
Jeff Cohen
f99748bc0f Fix VC++ precedence warning.
llvm-svn: 22902
2005-08-19 04:39:48 +00:00
Nate Begeman
88bfe8a7c3 Fix a bug where we were passing the wrong number of arguments to an
instruction.

llvm-svn: 22901
2005-08-19 03:42:28 +00:00
Chris Lattner
1207209677 Fix computation of # operands, add a temporary hack for CopyToReg
llvm-svn: 22896
2005-08-19 01:01:34 +00:00
Chris Lattner
5cfc567fb8 mark variable arity instructions as such. Alpha wins the battle for
cleanest backend in this metric :)

llvm-svn: 22893
2005-08-19 00:51:37 +00:00
Chris Lattner
5194ff37c4 Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR.
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(

llvm-svn: 22892
2005-08-19 00:47:42 +00:00