Tim Northover
3c2cc7a397
TableGen: use PrintMethods to print more aliases
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llvm-svn: 208607
2014-05-12 18:04:06 +00:00
Craig Topper
5f3cd9c3a9
Recommit r201059 and r201060 with hopefully a fix for its original failure.
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Original commits messages:
Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.
Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.
llvm-svn: 201065
2014-02-10 06:55:41 +00:00
David Woodhouse
fa88b9de95
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
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llvm-svn: 199809
2014-01-22 15:08:55 +00:00
David Woodhouse
b7c155c55a
[x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
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llvm-svn: 199808
2014-01-22 15:08:49 +00:00
David Woodhouse
39833d37a3
[x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)
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llvm-svn: 199807
2014-01-22 15:08:42 +00:00
David Woodhouse
59ef208820
[x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
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llvm-svn: 199804
2014-01-22 15:08:21 +00:00
David Woodhouse
e01fc03be8
[x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
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llvm-svn: 199803
2014-01-22 15:08:08 +00:00
David Woodhouse
7d0744dadf
[x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases
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llvm-svn: 198755
2014-01-08 12:57:55 +00:00
Craig Topper
1548551887
Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.
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llvm-svn: 192567
2013-10-14 04:55:01 +00:00
Craig Topper
aa1a4d51f0
Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
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llvm-svn: 192171
2013-10-08 05:53:50 +00:00
Craig Topper
1aee43cdd8
Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.
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llvm-svn: 187188
2013-07-26 05:39:33 +00:00
Craig Topper
c7bcbfdf42
Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.
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llvm-svn: 186924
2013-07-23 01:50:47 +00:00
Kevin Enderby
4f4de8ba04
Fix the move to/from accumulator register instructions that use a full 64-bit
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absolute address encoded in the instruction.
rdar://8612627 and rdar://14299221
llvm-svn: 186878
2013-07-22 21:25:31 +00:00
Craig Topper
86b83be14d
Recommit r186813: More Intel syntax alias fixes. With the addition of suppressing some of the aliases from being emitted by the asm printer.
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llvm-svn: 186869
2013-07-22 20:46:37 +00:00
Michael Liao
75c886a312
Add CLAC/STAC instruction encoding/decoding support
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As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.
llvm-svn: 179266
2013-04-11 04:52:28 +00:00
Craig Topper
7af95b6c84
Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior.
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cvtsi2* should parse with an 'l' or 'q' suffix or no suffix at all. No suffix should be treated the same as 'l' suffix. Printing should always print a suffix. Previously we didn't parse or print an 'l' suffix.
cvtt*2si/cvt*2si should parse with an 'l' or 'q' suffix or not suffix at all. No suffix should use the destination register size to choose encoding. Printing should not print a suffix.
Original 'l' suffix issue with cvtsi2* pointed out by Michael Kuperstein.
llvm-svn: 171668
2013-01-06 20:39:29 +00:00
Jim Grosbach
6d3cb70105
X86: Fix encoding of 'movd %xmm0, %rax'
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The assembly string for the VMOVPQIto64rr instruction incorrectly lacked the 'v'
prefix, resulting in mis-assembly of the vanilla movd instruction.
llvm-svn: 162963
2012-08-31 00:30:30 +00:00
Charles Davis
a5e1970cd0
Add retw and lretw instructions. Also, fix Intel syntax parsing for all
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ret instructions.
llvm-svn: 154468
2012-04-11 01:10:53 +00:00
Kevin Enderby
b5413ed6cc
Change the X86 assembler to not require a segment register on string
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instruction's destination operand like it does for the source operand.
Also fix a typo in the comment for X86AsmParser::isSrcOp().
llvm-svn: 152654
2012-03-13 19:47:55 +00:00
Eli Friedman
c397259ea6
Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.
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llvm-svn: 152136
2012-03-06 19:58:46 +00:00
Eli Friedman
4a049305a9
Make aliases for shld and shrd match gas. PR12173.
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llvm-svn: 152014
2012-03-05 04:31:54 +00:00
Benjamin Kramer
d03fc374bd
X86: alias cqo to cqto.
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llvm-svn: 145121
2011-11-24 12:02:46 +00:00
Kevin Enderby
837c1d56a2
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
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not depend on In32BitMode. Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode. rdar://9738584
llvm-svn: 143112
2011-10-27 17:40:41 +00:00
Craig Topper
f083691b6d
Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.
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llvm-svn: 141353
2011-10-07 05:35:38 +00:00
Craig Topper
2614f6f120
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.
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llvm-svn: 141274
2011-10-06 06:44:41 +00:00
Kevin Enderby
59ba10f2ac
Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a
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push with a small constant produces a 2-byte push.
llvm-svn: 134501
2011-07-06 17:23:46 +00:00
Eli Friedman
9765ae0015
Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269.
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llvm-svn: 134424
2011-07-05 18:21:20 +00:00
Eli Friedman
802029c494
Add support for movntil/movntiq mnemonics. Reported on llvmdev.
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llvm-svn: 133759
2011-06-23 21:07:47 +00:00
Nick Lewycky
8e5c09b7dc
Add support for assembling "movq" when it's correct to do so, while continuing
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to emit "movd" across the board to continue supporting a Darwin assembler bug.
This is the reincarnation of r133452.
llvm-svn: 133565
2011-06-21 22:45:41 +00:00
Bob Wilson
5b04895bb8
Revert r133452: "Emit movq for 64-bit register to XMM register moves..."
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This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.
llvm-svn: 133524
2011-06-21 17:35:13 +00:00
Nick Lewycky
831fb8200d
Emit movq for 64-bit register to XMM register moves, but continue to accept
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movd when assembling.
llvm-svn: 133452
2011-06-20 18:33:26 +00:00
Bill Wendling
5ae6b0c972
Improve the heuristic to emit the alias if the number of hard-coded registers
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are also greater than the alias.
llvm-svn: 133038
2011-06-15 04:31:19 +00:00
Bill Wendling
77d4d62693
Heuristic: If the number of operands in the alias are more than the number of
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operands in the aliasee, don't print the alias.
llvm-svn: 132963
2011-06-14 03:17:20 +00:00
Bill Wendling
0b9c16295a
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias
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(movzx/movsx) because they give more information. Revert that part of the patch.
llvm-svn: 129498
2011-04-14 01:46:37 +00:00
Bill Wendling
d49591cf21
Have the X86 back-end emit the alias instead of what's being aliased. In most
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cases, it's much nicer and more informative reading the alias.
llvm-svn: 129497
2011-04-14 01:11:51 +00:00
Chris Lattner
b9b420d588
fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,
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InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.
llvm-svn: 129223
2011-04-09 19:41:05 +00:00
Joerg Sonnenberger
aa8ac259e9
Support explicit argument forms for the X86 string instructions.
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For now, only the default segments are supported.
llvm-svn: 127875
2011-03-18 11:59:40 +00:00
Eli Friedman
7243ca7572
Followup to r126970: add 64-bit encoding tests for str with reg operand.
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llvm-svn: 126987
2011-03-04 04:06:47 +00:00
Joerg Sonnenberger
67e0eb235d
Use the same (%dx) hack for in[bwl] as for out[bwl].
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llvm-svn: 126244
2011-02-22 20:40:09 +00:00
Joerg Sonnenberger
9dceff5417
Recognize loopz and loopnz as aliases for loope and loopne.
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From Dimitry Andric.
llvm-svn: 126168
2011-02-22 00:43:07 +00:00
Rafael Espindola
e4a04cce2b
Implement xgetbv and xsetbv.
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Patch by Jai Menon.
llvm-svn: 126165
2011-02-22 00:35:18 +00:00
Chris Lattner
7cd801727d
implement PR9264: disambiguating 'bt mem, imm' as a btl.
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This is reasonable to do since all bt-mem forms do the
same thing.
llvm-svn: 126047
2011-02-19 21:06:36 +00:00
Joerg Sonnenberger
efa8090e2a
Recognize monitor/mwait with explicit register arguments
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llvm-svn: 125805
2011-02-18 00:48:11 +00:00
Chris Lattner
586e7af07d
Fix PR8946, a missing reg/reg form of movdqu.
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llvm-svn: 123242
2011-01-11 17:04:55 +00:00
Nick Lewycky
5cb84ee2cf
Add another non-commutable instruction that gas accepts commuted forms for.
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Fixes PR8861.
llvm-svn: 122641
2010-12-30 22:10:49 +00:00
Chris Lattner
2129ce0891
Generalize a previous change, fixing PR8855 - an valid large immediate
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rejected by the mc assembler.
llvm-svn: 122557
2010-12-25 21:36:35 +00:00
Kevin Enderby
988dab6b5c
Allow a slash, '/', as a prefix separator for X86. rdar://8741045
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llvm-svn: 121320
2010-12-08 23:57:59 +00:00
Rafael Espindola
6f5680f4a0
Implement the data16 prefix.
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llvm-svn: 120224
2010-11-27 20:29:45 +00:00
Rafael Espindola
38daba991e
Testcase for r120017.
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llvm-svn: 120099
2010-11-24 18:03:57 +00:00
Chris Lattner
4aaa7fbb98
implement PR8524, apparently mainline gas accepts movq as an alias for movd
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when transfering between i64 gprs and mmx regs.
llvm-svn: 119931
2010-11-21 08:18:57 +00:00