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Commit Graph

4627 Commits

Author SHA1 Message Date
Brian Gaeke
d944e15946 brg
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
 calls and casts.

llvm-svn: 4832
2002-11-26 10:43:30 +00:00
Vikram S. Adve
7bbda247e2 Keep global nodes in each DS Graph (by forcing them to be marked live).
llvm-svn: 4831
2002-11-25 18:21:25 +00:00
Misha Brukman
3ba057b8c4 Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
instructions correctly.

llvm-svn: 4830
2002-11-22 23:15:27 +00:00
Misha Brukman
a301022017 Enable the register allocator pass.
llvm-svn: 4829
2002-11-22 22:45:07 +00:00
Misha Brukman
021bf57248 A simple (spilling) register allocator.
llvm-svn: 4828
2002-11-22 22:44:32 +00:00
Misha Brukman
02c0acabb9 Added methods to read/write values to stack in .h, fixed implementation in
.cpp to return the iterator correctly.

llvm-svn: 4827
2002-11-22 22:43:47 +00:00
Misha Brukman
23d923ff18 Added -*- C++ -*- mode to the comments.
llvm-svn: 4826
2002-11-22 22:42:50 +00:00
Misha Brukman
e43fe85591 Add a simple way to add memory locations of format [reg+offset]
llvm-svn: 4825
2002-11-22 22:42:12 +00:00
Misha Brukman
32d007461d Added virtual functions for storing and retrieving values from the stack.
llvm-svn: 4824
2002-11-22 22:41:23 +00:00
Misha Brukman
940cfa8597 Instead of checking op.getType() against MO_VirtualRegister and
MO_MachineRegister, we no longer distinguish Virtual vs. Machine registers
externally, they're ALL registers, all equal.

Registers are only differentiated whether they are >=
MRegisterInfo::FirstVirtual or not.

llvm-svn: 4823
2002-11-22 22:40:52 +00:00
Misha Brukman
0f0cc54805 Set SSARegMap to NULL after deleting it.
llvm-svn: 4822
2002-11-22 22:32:15 +00:00
Brian Gaeke
2d771c7b5f lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
llvm-svn: 4821
2002-11-22 11:07:01 +00:00
Chris Lattner
68add39b01 Make testcase more interesting
llvm-svn: 4820
2002-11-21 23:30:08 +00:00
Chris Lattner
fe85dd13d2 Handle cmp Reg, 0 correctly
llvm-svn: 4819
2002-11-21 23:30:00 +00:00
Chris Lattner
6021c0d120 Printing support for more stuff
llvm-svn: 4818
2002-11-21 22:49:46 +00:00
Chris Lattner
a147d38780 Don't add implicit operands
llvm-svn: 4817
2002-11-21 22:49:20 +00:00
Chris Lattner
de36dd3a36 Fix off by one bug
llvm-svn: 4816
2002-11-21 22:48:15 +00:00
Chris Lattner
de6d53e549 Add fixme
llvm-svn: 4815
2002-11-21 22:48:01 +00:00
Chris Lattner
93c5c3ff44 Minor code cleanups
llvm-svn: 4814
2002-11-21 21:04:50 +00:00
Chris Lattner
af8c29b47d Implement printing of store instructions
llvm-svn: 4813
2002-11-21 21:03:39 +00:00
Chris Lattner
918179475a The big change here is to handle printing/emission of X86II::MRMSrcMem
instructions.  Right now the only users are load instructions, and Misha's
spill code

llvm-svn: 4812
2002-11-21 20:44:15 +00:00
Chris Lattner
2112a6d7b8 Remove implicit information from instruction selector
llvm-svn: 4811
2002-11-21 18:54:29 +00:00
Chris Lattner
c9e824d750 Add printing information for MUL and DIV
llvm-svn: 4810
2002-11-21 18:54:14 +00:00
Chris Lattner
d2207d5464 Fix a bug that prevented compilation of multiple functions
llvm-svn: 4809
2002-11-21 17:26:58 +00:00
Chris Lattner
aedd7ddff2 Move test
llvm-svn: 4808
2002-11-21 17:20:32 +00:00
Chris Lattner
765cab60e7 Shuffle testcases around
llvm-svn: 4807
2002-11-21 17:20:12 +00:00
Chris Lattner
4c6cbfe211 New testcase
llvm-svn: 4806
2002-11-21 17:18:37 +00:00
Chris Lattner
fab5468d86 Remove opcode information for instructions that are completely defined now
llvm-svn: 4805
2002-11-21 17:12:55 +00:00
Chris Lattner
d432d2f75e Add printing support for sahf & setcc
llvm-svn: 4804
2002-11-21 17:10:57 +00:00
Chris Lattner
766d0da035 Add printing support for /0 /1 type instructions
llvm-svn: 4803
2002-11-21 17:09:01 +00:00
Chris Lattner
9f9d6aef08 Add support for /0 /1, etc type instructions
llvm-svn: 4802
2002-11-21 17:08:49 +00:00
Chris Lattner
5a5648e935 User defined operators are not supposed to live beyond the lifetime of the
pass.  Detect and flag them.

llvm-svn: 4801
2002-11-21 16:54:22 +00:00
Chris Lattner
b1b5855551 Rename the SetCC X86 instructions to reflect the fact that they are the
register versions

llvm-svn: 4800
2002-11-21 16:19:42 +00:00
Chris Lattner
d6236d8100 Simplify setcc code a bit
llvm-svn: 4799
2002-11-21 15:52:38 +00:00
Chris Lattner
2f9488d131 Support Registers of the form (B8+ rd) for example
llvm-svn: 4798
2002-11-21 02:00:20 +00:00
Chris Lattner
32bfb6a115 Dont' set flags
llvm-svn: 4797
2002-11-21 01:59:50 +00:00
Chris Lattner
aa8aa73902 Implement printing more, implement opcode output more
llvm-svn: 4796
2002-11-21 01:33:44 +00:00
Chris Lattner
53a9c9aac6 Huge diff do to reindeinting comments.
Basically just adds OpSize flags for instructions that need them.

llvm-svn: 4795
2002-11-21 01:33:28 +00:00
Chris Lattner
92a3c2c77d Add new prefix flag
llvm-svn: 4794
2002-11-21 01:32:55 +00:00
Chris Lattner
228180c2ae Print another class of instructions correctly, giving us: xorl EDX, EDX
for example.

llvm-svn: 4793
2002-11-21 00:30:01 +00:00
Misha Brukman
5d89dbcf41 Booleans are types too. And they get stored in bytes. And InstructionSelection
doesn't assert fail. And everyone's happy. Yay!

llvm-svn: 4792
2002-11-21 00:25:56 +00:00
Chris Lattner
486c9926b7 Checkin testcases for bugpoint
llvm-svn: 4791
2002-11-20 22:30:02 +00:00
Chris Lattner
85ffbadcce Build bugpoint
llvm-svn: 4790
2002-11-20 22:28:18 +00:00
Chris Lattner
ceba1ddf2f Initial checkin of bugpoint
llvm-svn: 4789
2002-11-20 22:28:10 +00:00
Chris Lattner
6aa0ec26d5 Initial checkin of Module cloning support stuff
llvm-svn: 4788
2002-11-20 20:47:41 +00:00
Chris Lattner
29c4cbb5a5 Cloning stuff doesn't modify the source module
llvm-svn: 4787
2002-11-20 20:22:58 +00:00
Chris Lattner
26052792dd X86 target builds fine now
llvm-svn: 4786
2002-11-20 20:17:03 +00:00
Chris Lattner
58944216ff Fix symbol table problem
llvm-svn: 4785
2002-11-20 19:32:43 +00:00
Misha Brukman
96283090dc Add definitions for function headers from MRegisterInfo.h:
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.

llvm-svn: 4784
2002-11-20 18:59:43 +00:00
Misha Brukman
42f51b24e1 Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
printing out assembly. After all, we want the real thing too.

llvm-svn: 4783
2002-11-20 18:56:41 +00:00