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1570 Commits

Author SHA1 Message Date
Chris Lattner
dac54ebbee Improve signed division by power of 2 *dramatically* from this: 
div:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 64
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        ret

to this:

div:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 5
        shr %ECX, 26
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 6
        ret

Note that the intel compiler is currently making this:

div:
        movl      4(%esp), %edx                                 #3.5
        movl      %edx, %eax                                    #4.14
        sarl      $5, %eax                                      #4.14
        shrl      $26, %eax                                     #4.14
        addl      %edx, %eax                                    #4.14
        sarl      $6, %eax                                      #4.14
        ret                                                     #4.14

Which has one less register->register copy.  (hint hint alkis :)

llvm-svn: 13354
 2004-05-04 19:33:58 +00:00
Chris Lattner
cb9a614ea4 Improve code generated for integer multiplications by 2,3,5,9 
llvm-svn: 13342
 2004-05-04 15:47:14 +00:00
Chris Lattner
4b5d4eb5b1 Remove unused #include 
llvm-svn: 13304
 2004-05-01 21:29:16 +00:00
Chris Lattner
ffbf667718 Iterate over the Machine CFG that Brian added instead of the LLVM CFG. 
Look at all of the pretty minuses. :)

llvm-svn: 13303
 2004-05-01 21:27:53 +00:00
Chris Lattner
5f29db9741 Add a constructor that got lost 
llvm-svn: 13297
 2004-05-01 11:17:13 +00:00
Tanya Lattner
077c819d5a Removing MachineResource class. 
llvm-svn: 13291
 2004-04-30 20:40:38 +00:00
Brian Gaeke
bfb4fe5109 Make RequiresFPRegKill() take a MachineBasicBlock arg. 
In InsertFPRegKills(), just check the MachineBasicBlock for successors
instead of its corresponding BasicBlock.

llvm-svn: 13213
 2004-04-28 04:45:55 +00:00
Brian Gaeke
74ed24c9de In InsertFPRegKills(), use the machine-CFG itself rather than the 
LLVM CFG when trying to find the successors of BB.

llvm-svn: 13212
 2004-04-28 04:34:16 +00:00
Brian Gaeke
6c03805717 Update the machine-CFG edges whenever we see a branch. 
llvm-svn: 13211
 2004-04-28 04:19:37 +00:00
Brian Gaeke
7ce5ef244a Integrate the rest of my random sparcv9 scribblings into this file 
llvm-svn: 13204
 2004-04-27 22:04:03 +00:00
Chris Lattner
02c65b5395 Changes to fix up the inst_iterator to pass to boost iterator checks. This 
patch was graciously contributed by Vladimir Prus.

llvm-svn: 13185
 2004-04-27 15:13:33 +00:00
Brian Gaeke
1e049bdc77 Fix file header comments and include guards -- many files have been moved or 
renamed since they were last spiffed up, or they just never had proper comments
in the first place.

llvm-svn: 13148
 2004-04-25 07:04:49 +00:00
Brian Gaeke
c3857275f9 Add a getRegisterInfo() accessor just like on the X86 target. 
llvm-svn: 13147
 2004-04-25 06:32:28 +00:00
Brian Gaeke
6e21a0858c Regularize file header comment and include guard. 
Include SparcV9RegisterInfo.h.
Add a getRegisterInfo() accessor and SparcV9RegisterInfo instance, just like
on the X86 target.

llvm-svn: 13146
 2004-04-25 06:32:16 +00:00
Brian Gaeke
a36743c473 Add MRegisterInfo subclass for the SparcV9 target (containing only stub 
functions for now). This automatically turns on the printing of machine
registers using their own real names, instead of goofy things like %mreg(42),
and allows us to migrate code incrementally to the new interface as we see fit.

The register file description it uses is hand-written, so that the register
numbers will match the ones that the SparcV9 target already uses.
Perhaps someday we'll tablegen it.

llvm-svn: 13145
 2004-04-25 06:32:05 +00:00
Brian Gaeke
6ed3b116bc Fix a typo. 
llvm-svn: 13136
 2004-04-23 21:45:02 +00:00
Brian Gaeke
7fba37bb96 Merge TargetRegInfo.h into SparcV9RegInfo.h, which is its only subclass. 
This prepares us to be able to de-virtualize and de-abstract it, and
take the register allocator bits out and move them into the register allocator
proper...

llvm-svn: 13127
 2004-04-23 18:15:48 +00:00
Brian Gaeke
40c7e110a5 Include SparcV9RegInfo.h instead of TargetRegInfo.h. 
llvm-svn: 13126
 2004-04-23 18:15:47 +00:00
Brian Gaeke
07344c1367 Get rid of the old byte-at-a-time emission code used when the Sparc JIT was 
being tested on X86, as per Chris's request.

llvm-svn: 13124
 2004-04-23 18:10:38 +00:00
Brian Gaeke
0db103b4b3 Use emitWordAt() to emit forward-branch fixups. 
llvm-svn: 13120
 2004-04-23 17:11:16 +00:00
Brian Gaeke
255d0d9b26 Emit SPARC machine code a word at a time instead of a byte at a time. 
Use emitWordAt() to emit forward-branch fixups.

llvm-svn: 13119
 2004-04-23 17:11:15 +00:00
Brian Gaeke
51b16fc65a Make SparcV9RegInfo::getRegType() return the right answer for registers 
of IntCC, FloatCC, and Special types.

Make SparcV9RegInfo::getRegClassIDOfRegType() return the right answer
if you ask for the class corresponding to SpecialRegType.

llvm-svn: 13095
 2004-04-21 17:53:58 +00:00
Brian Gaeke
3727c760ed Make it legal to ask for the type of a specialreg 
llvm-svn: 13078
 2004-04-20 20:12:57 +00:00
Brian Gaeke
047739f8d8 Make it legal to request a load or store of %fsr. 
llvm-svn: 13073
 2004-04-19 19:12:12 +00:00
Brian Gaeke
3dfe9f19ea Regularize include guards and remove some excess whitespace. 
llvm-svn: 13071
 2004-04-19 18:53:44 +00:00
Brian Gaeke
d7fa9142a3 Tighten up SparcV9FloatCCRegClass::getRegName()'s assertion - if you ask it for 
the name of %fsr (as the comment in SparcV9RegClassInfo.h used to suggest)
you would walk off the end of the FloatCCRegName array.

llvm-svn: 13070
 2004-04-19 18:53:43 +00:00
Brian Gaeke
5bcbc23fc1 Regularize include guards, remove some excess whitespace and fix some comments. 
Remove the extra %fsr register from SparcV9FloatCCRegClass.

llvm-svn: 13069
 2004-04-19 18:53:42 +00:00
Brian Gaeke
e708b1d5ef Give SparcV9CodeEmitter a head-of-file comment and a PassName. 
llvm-svn: 12967
 2004-04-15 20:23:13 +00:00
John Criswell
8a4525ae64 Remove code to adjust the iterator for llvm.readio and llvm.writeio. 
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.

llvm-svn: 12954
 2004-04-14 21:27:56 +00:00
Brian Gaeke
8e2fb33172 Fix typo. 
llvm-svn: 12953
 2004-04-14 21:21:56 +00:00
Chris Lattner
64431dbce7 This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works 
even when the "optimization" I added before is turned off.  It generates this
extremely pointless code:

test:
        fld QWORD PTR [%ESP + 4]
        mov %AL, 0
        test %AL, %AL
        fcmove %ST(0), %ST(0)
        ret

Good thing the optimizer will have removed this before code generation
anyway.  :)

llvm-svn: 12939
 2004-04-14 02:42:32 +00:00
John Criswell
94de925685 Added support for the llvm.readio and llvm.writeio intrinsics. 
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.

llvm-svn: 12936
 2004-04-13 22:13:14 +00:00
Chris Lattner
2ba048528f Implement a small optimization, which papers over the problem in 
X86/2004-04-13-FPCMOV-Crash.llx

A more robust fix is to follow.

llvm-svn: 12935
 2004-04-13 21:56:09 +00:00
Brian Gaeke
336b83623a I don't think we have to have 4 extra allocated (but unused) bytes on the stack. 
llvm-svn: 12905
 2004-04-13 18:28:37 +00:00
Brian Gaeke
6d8a362874 I started working on casts, but I don't have anything compilable yet. 
llvm-svn: 12903
 2004-04-13 18:27:46 +00:00
Chris Lattner
8b6bc380e3 Emit the immediate form of in/out when possible. 
Fix several bugs in the intrinsics:
  1. Make sure to copy the input registers before the instructions that use them
  2. Make sure to copy the value returned by 'in' out of EAX into the register
     it is supposed to be in.

This fixes assertions when using in/out and linear scan.

llvm-svn: 12896
 2004-04-13 17:20:37 +00:00
Chris Lattner
15ac62827e Add immediate forms of in/out. Use let to shorten lines 
llvm-svn: 12895
 2004-04-13 17:19:31 +00:00
Chris Lattner
ecbade26d5 Add support for new instruction type 
llvm-svn: 12894
 2004-04-13 17:18:51 +00:00
Chris Lattner
e8e60bf45f Add support for the printImplicitDefsBefore flag 
llvm-svn: 12893
 2004-04-13 17:18:39 +00:00
Brian Gaeke
36093cb38c We don't need to insert TargetData into the PassManager here. 
llvm-svn: 12874
 2004-04-12 21:46:31 +00:00
Chris Lattner
43f754339a Fix issues that the local allocator has dealing with instructions that implicitly use ST(0) 
llvm-svn: 12855
 2004-04-12 03:02:48 +00:00
Chris Lattner
9cdc472518 No really, fix printing for LLC. I gotta get a way for CVS to whine at me if 
I have unsaved emacs buffers, geeze...

llvm-svn: 12854
 2004-04-12 01:52:04 +00:00
Chris Lattner
f1d59be0e8 Correct printing for LLC and the encoding for the JIT 
llvm-svn: 12853
 2004-04-12 01:50:04 +00:00
Chris Lattner
682a6361c7 Use the fucomi[p] instructions to perform floating point comparisons instead 
of the fucom[p][p] instructions.  This allows us to code generate this function

bool %test(double %X, double %Y) {
        %C = setlt double %Y, %X
        ret bool %C
}

... into:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucomip %ST(1)
        fstp %ST(0)
        setb %AL
        movsx %EAX, %AL
        ret

where before we generated:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucompp
**      fnstsw
**      sahf
        setb %AL
        movsx %EAX, %AL
        ret

The two marked instructions (which are the ones eliminated) are very bad,
because they serialize execution of the processor.  These instructions are
available on the PPRO and later, but since we already use cmov's we aren't
losing any portability.

I retained the old code for the day when we decide we want to support back
to the 386.

llvm-svn: 12852
 2004-04-12 01:43:36 +00:00
Chris Lattner
c85d92e0b7 Add support for the FUCOMIr instruction 
llvm-svn: 12851
 2004-04-12 01:39:15 +00:00
Chris Lattner
cfb7144bf1 Add two new instructions 
llvm-svn: 12850
 2004-04-12 01:38:55 +00:00
Chris Lattner
de47ad3d6f Fix a bug in my load/cast folding patch. 
llvm-svn: 12849
 2004-04-12 00:23:04 +00:00
Chris Lattner
b3a10e244a Adjust some comments, fix a bug in my previous patch 
llvm-svn: 12848
 2004-04-12 00:12:04 +00:00
Chris Lattner
24f8b11206 On X86, casting an integer to floating point requires going through memory. 
If the source of the cast is a load, we can just use the source memory location,
without having to create a temporary stack slot entry.

Before we code generated this:

double %int(int* %P) {
        %V = load int* %P
        %V2 = cast int %V to double
        ret double %V2
}

into:

int:
        sub %ESP, 4
        mov %EAX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        mov DWORD PTR [%ESP], %EAX
        fild DWORD PTR [%ESP]
        add %ESP, 4
        ret

Now we produce this:

int:
        mov %EAX, DWORD PTR [%ESP + 4]
        fild DWORD PTR [%EAX]
        ret

... which is nicer.

llvm-svn: 12846
 2004-04-11 23:21:26 +00:00
Chris Lattner
95cf3f8765 Implement folding of loads into floating point operations. This implements: 
test/Regression/CodeGen/X86/fp_load_fold.llx

llvm-svn: 12844
 2004-04-11 22:05:45 +00:00