Jim Grosbach
dac7815a91
ARM Allow 'q' registers in VLD/VST vector lists.
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Just treat it as if the constituent D registers where specified.
rdar://10348896
llvm-svn: 143167
2011-10-28 00:06:50 +00:00
Dan Gohman
892b86e74c
Remove the Alpha backend.
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llvm-svn: 143164
2011-10-27 22:56:32 +00:00
Owen Anderson
d35df0aaeb
Add some NEON stores to the VLD decoding hook that were accidentally omitted previously.
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llvm-svn: 143162
2011-10-27 22:53:10 +00:00
Jakob Stoklund Olesen
de21509dcd
Also set addrmode6 alignment when align==size.
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Previously, we were only setting the alignment bits on over-aligned
loads and stores.
llvm-svn: 143160
2011-10-27 22:39:16 +00:00
Jim Grosbach
67d4fb4bc0
ARM isel for vld1, opcode selection for register stride post-index pseudos.
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llvm-svn: 143158
2011-10-27 22:25:42 +00:00
Owen Anderson
6508cba44c
If we're searching for a symbol reference to pretty-print a scattered relocation address, and we don't find a symbol table entry, try section begin addresses as well.
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llvm-svn: 143151
2011-10-27 21:53:50 +00:00
Evan Cheng
75271d09f1
Avoid partial CPSR dependency from loop backedges. rdar://10357570
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llvm-svn: 143145
2011-10-27 21:21:05 +00:00
Owen Anderson
9aaee13bf1
Fix pretty printing of i386 local sect diff relocations, TLV relocations, and x86_64 TLV relocations in MachO.
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llvm-svn: 143140
2011-10-27 20:46:09 +00:00
Peter Collingbourne
24c42c8534
Add a pinned metadata name for fpaccuracy, and document it
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llvm-svn: 143135
2011-10-27 19:19:14 +00:00
Duncan Sands
ca325638c8
Reapply commit 143028 with a fix: the problem was casting a ConstantExpr Mul
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using BinaryOperator (which only works for instructions) when it should have
been a cast to OverflowingBinaryOperator (which also works for constants).
While there, correct a few other dubious looking uses of BinaryOperator.
Thanks to Chad Rosier for the testcase. Original commit message:
My super-optimizer noticed that we weren't folding this expression to
true: (x *nsw x) sgt 0, where x = (y | 1). This occurs in 464.h264ref.
llvm-svn: 143125
2011-10-27 19:16:21 +00:00
Kevin Enderby
837c1d56a2
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
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not depend on In32BitMode. Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode. rdar://9738584
llvm-svn: 143112
2011-10-27 17:40:41 +00:00
Jim Grosbach
4f7964293a
Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix.
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rdar://10348844
llvm-svn: 143110
2011-10-27 17:33:59 +00:00
Owen Anderson
997d323baa
Expose relocation accessors through the libObject C API.
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llvm-svn: 143109
2011-10-27 17:32:36 +00:00
Jim Grosbach
e1ec953149
Thumb2 t2MVNi assembly parsing to recognize ".w" suffix.
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rdar://10348584
llvm-svn: 143108
2011-10-27 17:16:55 +00:00
Owen Anderson
ece66e91f2
Add relocation iterators to the libObject C API.
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llvm-svn: 143107
2011-10-27 17:15:47 +00:00
Benjamin Kramer
ad2fb4eeb5
BlockFrequency: Use a smarter overflow check.
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This trades one 64 bit div for one 64 bit mul and some arithmetic.
llvm-svn: 143106
2011-10-27 16:38:50 +00:00
Bob Wilson
2ca603d9b7
Revert Duncan's r143028 expression folding which appears to be the culprit
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behind a compile failure on 483.xalancbmk.
llvm-svn: 143102
2011-10-27 15:47:25 +00:00
Benjamin Kramer
7e10fef545
LLLexer: Factor hex char parsing.
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llvm-svn: 143101
2011-10-27 14:08:01 +00:00
Nick Lewycky
651475977d
Teach our Dwarf emission to use the string pool.
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llvm-svn: 143097
2011-10-27 06:44:11 +00:00
Eli Friedman
76e3969f05
Don't crash on 128-bit sdiv by constant. Found by inspection.
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llvm-svn: 143095
2011-10-27 02:06:39 +00:00
Eli Friedman
e6918ac01a
It is not safe to sink an alloca into a stacksave/stackrestore pair, so don't do that. <rdar://problem/10352360>
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llvm-svn: 143093
2011-10-27 01:33:51 +00:00
Chad Rosier
e76ba1b654
A branch predicated on a constant can just FastEmit an unconditional branch.
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llvm-svn: 143086
2011-10-27 00:21:16 +00:00
Lang Hames
e8bb71f80d
Rename NonScalarIntSafe to something more appropriate.
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llvm-svn: 143080
2011-10-26 23:50:43 +00:00
Chad Rosier
e3141f4f8b
Add a TODO comment. FastISel works by parsing each basic block from the bottom
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up. Thus, improving the support for compares is goodness because it increases
the number of terminator instructions we can handle. This creates many more
opportunities for target specific fast-isel.
llvm-svn: 143079
2011-10-26 23:34:37 +00:00
Chad Rosier
75378507e3
Factor a little more code into EmitCmp, which should have been done in the first
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place. No functional change intended.
llvm-svn: 143078
2011-10-26 23:25:44 +00:00
Chad Rosier
52109646da
Use EmitCmp in SelectBranch. No functional change intended.
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llvm-svn: 143076
2011-10-26 23:17:28 +00:00
Nick Lewycky
4aa5a52a80
Reflow lines, fix comments for doxygen style, fix whitespace. No functionality
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change.
llvm-svn: 143074
2011-10-26 22:55:33 +00:00
Chad Rosier
3f38cb48de
Factor out an EmitCmp function that can be used by both SelectCmp and
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SelectBranch. No functional change intended.
llvm-svn: 143072
2011-10-26 22:47:55 +00:00
Jim Grosbach
c1cf1fe985
Trailing whitespace.
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llvm-svn: 143071
2011-10-26 22:44:41 +00:00
Jim Grosbach
e3c6fa663f
Thumb2 ldr pc-relative encoding fixes.
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We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.
More of rdar://10348687
llvm-svn: 143068
2011-10-26 22:22:01 +00:00
Rafael Espindola
1958dc7193
Fixes an issue reported by -verify-machineinstrs.
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Patch by Sanjoy Das.
llvm-svn: 143064
2011-10-26 21:16:41 +00:00
Jim Grosbach
4597f361f6
ARM parse parenthesized expressions for label references.
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Partial fix for rdar://10348687.
llvm-svn: 143063
2011-10-26 21:14:08 +00:00
Rafael Espindola
90896edc6c
This commit introduces two fake instructions MORESTACK_RET and
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MORESTACK_RET_RESTORE_R10; which are lowered to a RET and a RET
followed by a MOV respectively. Having a fake instruction prevents
the verifier from seeing a MachineBasicBlock end with a
non-terminator (MOV). It also prevents the rather eccentric case of a
MachineBasicBlock ending with RET but having successors nevertheless.
Patch by Sanjoy Das.
llvm-svn: 143062
2011-10-26 21:12:27 +00:00
Lang Hames
d87e366c7f
Make sure short memsets on ARM lower to stores, even when optimizing for size.
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llvm-svn: 143055
2011-10-26 20:56:52 +00:00
Duncan Sands
5c8fa99c32
The maximum power of 2 dividing a power of 2 is itself. This occurs
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in 403.gcc and was spotted by my super-optimizer.
llvm-svn: 143054
2011-10-26 20:55:21 +00:00
Owen Anderson
11396b575d
Add support for scattered relocations to the MachO relocatation pretty printer.
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llvm-svn: 143051
2011-10-26 20:42:54 +00:00
Nick Lewycky
16ff59bfc8
On an ELF system, ".debug_str" is mergeable and contains null terminated strings
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composed of one byte characters.
llvm-svn: 143044
2011-10-26 18:44:32 +00:00
Owen Anderson
8d9656dd53
The order of the two symbol listings in a Macho x86_64 subtractor relocation is reversed from what seems intuitive to me.
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llvm-svn: 143035
2011-10-26 17:28:49 +00:00
Jim Grosbach
5a61a956cb
Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
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llvm-svn: 143034
2011-10-26 17:28:15 +00:00
Owen Anderson
27580bf1eb
Include the full 64 bits of relocation data in the type info for MachO relocations, so that we can recognize scattered relocations.
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llvm-svn: 143033
2011-10-26 17:10:22 +00:00
Owen Anderson
7a9bb4d47f
Expand relocation type field to 64 bits. MachO scattered relocations require 33 bits of type info.
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llvm-svn: 143032
2011-10-26 17:08:49 +00:00
Owen Anderson
fc7467fd5e
Improve pretty printing of GOT relocations in MachO on x86_64.
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llvm-svn: 143031
2011-10-26 17:05:20 +00:00
Duncan Sands
c463f54342
My super-optimizer noticed that we weren't folding this expression to
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true: (x *nsw x) sgt 0, where x = (y | 1). This occurs in 464.h264ref.
llvm-svn: 143028
2011-10-26 15:31:51 +00:00
Duncan Sands
9cbeb0a825
Simplify SplitVecRes_UnaryOp by removing all the code that is
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trying to legalize the operand types when only the result type
is required to be legalized - the type legalization machinery
will get round to the operands later if they need legalizing.
There can be a point to legalizing operands in parallel with
the result: when this saves compile time or results in better
code. There was only one case in which this was true: when
the operand is also split, so keep the logic for that bit.
As a result of this change, additional operand legalization
methods may need to be introduced to handle nodes where the
result and operand types can differ, like SIGN_EXTEND, but
the testsuite doesn't contain any tests where this is the case.
In any case, it seems better to require such methods (and die
with an assert if they doesn't exist) than to quietly produce
wrong code if we forgot to special case the node in
SplitVecRes_UnaryOp.
llvm-svn: 143026
2011-10-26 14:11:18 +00:00
James Molloy
9afc8b08f7
Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
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llvm-svn: 143023
2011-10-26 08:53:19 +00:00
Bill Wendling
b0dc0e18ca
Use a worklist to prevent the iterator from becoming invalidated because of the 'removeSuccessor' call. Noticed in a Release+Asserts+Check buildbot.
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llvm-svn: 143018
2011-10-26 07:16:18 +00:00
Eric Christopher
0042cece21
Remove unused variable.
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llvm-svn: 143011
2011-10-26 03:47:16 +00:00
Jakob Stoklund Olesen
4512ad38b1
Don't use floating point to do an integer's job.
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This code makes different decisions when compiled into x87 instructions
because of different rounding behavior. That caused phase 2/3
miscompares on 32-bit Linux when the phase 1 compiler was built with gcc
(using x87), and the phase 2 compiler was built with clang (using SSE).
This fixes PR11200.
llvm-svn: 143006
2011-10-26 01:47:48 +00:00
Evan Cheng
c3031bd208
Disable LICM speculation in high register pressure situation again now that Devang has fixed other issues.
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llvm-svn: 143003
2011-10-26 01:26:57 +00:00
Evan Cheng
941d5c148f
Revert part of r142530. The patch potentially hurts performance especially
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on Darwin platforms where -Os means optimize for size without hurting
performance.
llvm-svn: 143002
2011-10-26 01:17:44 +00:00