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432 Commits

Author SHA1 Message Date
Rafael Espindola
719336441f start comments with # 
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save

llvm-svn: 29451
 2006-08-01 18:53:10 +00:00
Rafael Espindola
f11277971f implement LowerConstantPool and LowerGlobalAddress 
llvm-svn: 29433
 2006-08-01 12:58:43 +00:00
Rafael Espindola
0ea0399411 handle GlobalValue::InternalLinkage in doFinalization 
llvm-svn: 29417
 2006-07-31 20:38:13 +00:00
Evan Cheng
3b5f1c6248 Remove InFlightSet hack. No longer needed. 
llvm-svn: 29373
 2006-07-28 00:47:19 +00:00
Rafael Espindola
c0ede90402 emit global constants 
llvm-svn: 29344
 2006-07-27 11:38:51 +00:00
Rafael Espindola
2919d4ce24 implement function calling of functions with up to 4 arguments 
llvm-svn: 29274
 2006-07-25 20:17:20 +00:00
Rafael Espindola
9ea0bc742c implemented sub 
correctly update the stack pointer in the prologue and epilogue

llvm-svn: 29244
 2006-07-21 12:26:16 +00:00
Rafael Espindola
ad256854c0 initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) 
llvm-svn: 29175
 2006-07-18 17:00:30 +00:00
Rafael Espindola
40073f5767 skeleton of a lowerCall implementation for ARM 
llvm-svn: 29159
 2006-07-16 01:02:57 +00:00
Rafael Espindola
fdfaee67f5 add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
 2006-07-11 11:36:48 +00:00
Rafael Espindola
071c83dff0 create the raddr addressing mode that matches any register and the frame index 
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079
 2006-07-10 01:41:35 +00:00
Rafael Espindola
f11f34a3d6 handle the "mov reg1, reg2" case in isMoveInstr 
llvm-svn: 28945
 2006-06-27 21:52:45 +00:00
Rafael Espindola
14a59f5b6e initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
 2006-06-18 00:08:07 +00:00
Chris Lattner
6a9ec7e80e Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Rafael Espindola
bcba226a99 lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex

llvm-svn: 28751
 2006-06-12 12:28:08 +00:00
Rafael Espindola
42375303a6 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691
 2006-06-05 22:26:14 +00:00
Rafael Espindola
1bf57da16e Expand ret into "CopyToReg;BRIND" 
llvm-svn: 28559
 2006-05-30 17:33:19 +00:00
Chris Lattner
e1552475d3 Ignore generated files 
llvm-svn: 28520
 2006-05-27 01:23:30 +00:00
Evan Cheng
de0f25081a Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Rafael Espindola
f7c5af4863 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx

llvm-svn: 28494
 2006-05-26 10:56:17 +00:00
Rafael Espindola
31b98f8e04 implement initial version of ARMAsmPrinter::printOperand 
llvm-svn: 28470
 2006-05-25 12:57:06 +00:00
Rafael Espindola
90eec6b0f7 port the ARM backend to use ISD::CALL instead of LowerCallTo 
llvm-svn: 28469
 2006-05-25 11:00:18 +00:00
Evan Cheng
09942d3f8b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng
b040dd86af Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Chris Lattner
f604017e47 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
 2006-05-24 17:04:05 +00:00
Rafael Espindola
bb1e2e2c52 implement minimal versions of 
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr

llvm-svn: 28431
 2006-05-23 02:48:20 +00:00
Owen Anderson
c6947bf2ce Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Rafael Espindola
a0e82ff9be implement movri 
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
 2006-05-18 21:45:49 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng
ea24815aa3 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Rafael Espindola
c928207091 add an abort after every assert(0) 
llvm-svn: 28310
 2006-05-15 22:34:39 +00:00
Rafael Espindola
dd49dfc0df added a skeleton of the ARM backend 
llvm-svn: 28301
 2006-05-14 22:18:28 +00:00