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Author SHA1 Message Date
Owen Anderson
ccaee65189 Rename ValuePropagation to a more descriptive CorrelatedValuePropagation. 
llvm-svn: 112591
 2010-08-31 07:48:34 +00:00
Owen Anderson
ba28fe3dcb More Chris-inspired JumpThreading fixes: use ConstantExpr to correctly constant-fold undef, and be more careful with its return value. 
This actually exposed an infinite recursion bug in ComputeValueKnownInPredecessors which theoretically already existed (in JumpThreading's
handling of and/or of i1's), but never manifested before.  This patch adds a tracking set to prevent this case.

llvm-svn: 112589
 2010-08-31 07:36:34 +00:00
Owen Anderson
bd9edea8a3 Remove r111665, which implemented store-narrowing in InstCombine. Chris discovered a miscompilation in it, and it's not easily 
fixable at the optimizer level. I'll investigate reimplementing it in DAGCombine.

llvm-svn: 112575
 2010-08-31 04:41:06 +00:00
Anton Korobeynikov
c3f039784a Fix borken test 
llvm-svn: 112555
 2010-08-30 23:41:49 +00:00
Owen Anderson
18110f0db4 Combine these two tests, and make sure there's a newline at the end of the file. 
llvm-svn: 112554
 2010-08-30 23:37:41 +00:00
Bob Wilson
826a677f94 Remove NEON vmovn intrinsic, replacing it with vector truncate operations. 
Auto-upgrade the old intrinsic and update tests.

llvm-svn: 112507
 2010-08-30 20:02:30 +00:00
Chris Lattner
765e59210c two changes: 
1) nuke ConstDataCoalSection, which is dead.
2) revise my previous patch for rdar://8018335,
  which was completely wrong.  Specifically, it doesn't 
  make sense to mark __TEXT,__const_coal as PURE_INSTRUCTIONS,
  because it is for readonly data.  templates (it turns out)
  go to const_coal_nt.  The real fix for rdar://8018335 was
  to give ConstTextCoalSection a section kind of ReadOnly 
  instead of Text.

llvm-svn: 112496
 2010-08-30 18:12:35 +00:00
Michael J. Spencer
51a65365f3 Partially revert r112480. Caused test failures. 
llvm-svn: 112486
 2010-08-30 15:34:08 +00:00
NAKAMURA Takumi
89dab50acd coff-dump.py: Fix PR7996. Now it is compatible to Python-2.4. 
llvm-svn: 112485
 2010-08-30 15:19:56 +00:00
Michael J. Spencer
2f463fc492 Fix constant-over-index.ll test on windows. 
llvm-svn: 112483
 2010-08-30 15:08:02 +00:00
Michael J. Spencer
cd662e3540 Test: Fix LLVMC tests on CMake. 
The CMake build didn't define TEST_COMPILE_CXX_CMD. The tests assumed gcc.

llvm-svn: 112480
 2010-08-30 14:49:00 +00:00
Duncan Sands
254f8ff0a6 Correct bogus module triple specifications. 
llvm-svn: 112469
 2010-08-30 10:48:29 +00:00
Chris Lattner
51639dea34 LICM does get dead instructions input to it. Instead of sinking them 
out of loops, just delete them.

llvm-svn: 112451
 2010-08-29 18:22:25 +00:00
Dan Gohman
9ea315c5ca Make IVUsers iterative instead of recursive. 
This has the side effect of reversing the order of most of
IVUser's results.

llvm-svn: 112442
 2010-08-29 16:40:03 +00:00
Dan Gohman
0fdab32e0f Make this test less dependent on register allocation choices. 
llvm-svn: 112426
 2010-08-29 14:49:42 +00:00
Dan Gohman
68929091e5 Use exec. 
llvm-svn: 112425
 2010-08-29 14:49:00 +00:00
Kalle Raiskila
daba4ffc75 Fix lowering of INSERT_VECTOR_ELT in SPU. 
The IDX was treated as byte index, not element index.

llvm-svn: 112422
 2010-08-29 12:41:50 +00:00
Bob Wilson
807d004452 Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm 
IR add/sub operations with one or both operands sign- or zero-extended.
Auto-upgrade the old intrinsics.

llvm-svn: 112416
 2010-08-29 05:57:34 +00:00
Chris Lattner
5f911e6fe9 merge a bunch of shuffle tests into sse2.ll 
llvm-svn: 112398
 2010-08-29 03:19:04 +00:00
Chris Lattner
c2ef3180a8 add some nounwind's 
llvm-svn: 112396
 2010-08-29 03:07:47 +00:00
Chris Lattner
b6eee35ca6 fixme accomplished 
llvm-svn: 112386
 2010-08-28 20:40:28 +00:00
Chris Lattner
8cb4abbc0e fix the buildvector->insertp[sd] logic to not always create a redundant 
insertp[sd] $0, which is a noop.  Before:

_f32:                                   ## @f32
	pshufd	$1, %xmm1, %xmm2
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm2, %xmm3
	addss	%xmm1, %xmm0
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
	insertps	$0, %xmm0, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

after:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movdqa	%xmm2, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

The extra movs are due to a random (poor) scheduling decision.

llvm-svn: 112379
 2010-08-28 17:59:08 +00:00
Chris Lattner
c3b630d64b fix the BuildVector -> unpcklps logic to not do pointless shuffles 
when the top elements of a vector are undefined.  This happens all
the time for X86-64 ABI stuff because only the low 2 elements of
a 4 element vector are defined.  For example, on:

_Complex float f32(_Complex float A, _Complex float B) {
  return A+B;
}

We used to produce (with SSE2, SSE4.1+ uses insertps):

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$16, %xmm2, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm0
	addss	%xmm1, %xmm0
	pshufd	$16, %xmm0, %xmm1
	movdqa	%xmm2, %xmm0
	unpcklps	%xmm1, %xmm0
	ret

We now produce:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movaps	%xmm2, %xmm0
	unpcklps	%xmm3, %xmm0
	ret

This implements rdar://8368414

llvm-svn: 112378
 2010-08-28 17:28:30 +00:00
Benjamin Kramer
92e13eeec0 Update ocaml test. 
llvm-svn: 112364
 2010-08-28 10:29:41 +00:00
Chris Lattner
ecf276b787 remove unions from LLVM IR. They are severely buggy and not 
being actively maintained, improved, or extended.

llvm-svn: 112356
 2010-08-28 04:09:24 +00:00
Chris Lattner
4b49ada02c remove the ABCD and SSI passes. They don't have any clients that 
I'm aware of, aren't maintained, and LVI will be replacing their value.
nlewycky approved this on irc.

llvm-svn: 112355
 2010-08-28 03:51:24 +00:00
Chris Lattner
b61cf1e296 handle the constant case of vector insertion. For something 
like this:

struct S { float A, B, C, D; };

struct S g;
struct S bar() { 
  struct S A = g;
  ++A.B;
  A.A = 42;
  return A;
}

we now generate:

_bar:                                   ## @bar
## BB#0:                                ## %entry
	movq	_g@GOTPCREL(%rip), %rax
	movss	12(%rax), %xmm0
	pshufd	$16, %xmm0, %xmm0
	movss	4(%rax), %xmm2
	movss	8(%rax), %xmm1
	pshufd	$16, %xmm1, %xmm1
	unpcklps	%xmm0, %xmm1
	addss	LCPI1_0(%rip), %xmm2
	pshufd	$16, %xmm2, %xmm2
	movss	LCPI1_1(%rip), %xmm0
	pshufd	$16, %xmm0, %xmm0
	unpcklps	%xmm2, %xmm0
	ret

instead of:

_bar:                                   ## @bar
## BB#0:                                ## %entry
	movq	_g@GOTPCREL(%rip), %rax
	movss	12(%rax), %xmm0
	pshufd	$16, %xmm0, %xmm0
	movss	4(%rax), %xmm2
	movss	8(%rax), %xmm1
	pshufd	$16, %xmm1, %xmm1
	unpcklps	%xmm0, %xmm1
	addss	LCPI1_0(%rip), %xmm2
	movd	%xmm2, %eax
	shlq	$32, %rax
	addq	$1109917696, %rax       ## imm = 0x42280000
	movd	%rax, %xmm0
	ret

llvm-svn: 112345
 2010-08-28 01:50:57 +00:00
Chris Lattner
c70b0c0ee7 optimize bitcasts from large integers to vector into vector 
element insertion from the pieces that feed into the vector.
This handles a pattern that occurs frequently due to code
generated for the x86-64 abi.  We now compile something like
this:

struct S { float A, B, C, D; };
struct S g;
struct S bar() { 
  struct S A = g;
  ++A.A;
  ++A.C;
  return A;
}

into all nice vector operations:

_bar:                                   ## @bar
## BB#0:                                ## %entry
	movq	_g@GOTPCREL(%rip), %rax
	movss	LCPI1_0(%rip), %xmm1
	movss	(%rax), %xmm0
	addss	%xmm1, %xmm0
	pshufd	$16, %xmm0, %xmm0
	movss	4(%rax), %xmm2
	movss	12(%rax), %xmm3
	pshufd	$16, %xmm2, %xmm2
	unpcklps	%xmm2, %xmm0
	addss	8(%rax), %xmm1
	pshufd	$16, %xmm1, %xmm1
	pshufd	$16, %xmm3, %xmm2
	unpcklps	%xmm2, %xmm1
	ret

instead of icky integer operations:

_bar:                                   ## @bar
	movq	_g@GOTPCREL(%rip), %rax
	movss	LCPI1_0(%rip), %xmm1
	movss	(%rax), %xmm0
	addss	%xmm1, %xmm0
	movd	%xmm0, %ecx
	movl	4(%rax), %edx
	movl	12(%rax), %esi
	shlq	$32, %rdx
	addq	%rcx, %rdx
	movd	%rdx, %xmm0
	addss	8(%rax), %xmm1
	movd	%xmm1, %eax
	shlq	$32, %rsi
	addq	%rax, %rsi
	movd	%rsi, %xmm1
	ret

This resolves rdar://8360454

llvm-svn: 112343
 2010-08-28 01:20:38 +00:00
Dan Gohman
507f5a8ae7 Completely disable tail calls when fast-isel is enabled, as fast-isel 
doesn't currently support dealing with this.

llvm-svn: 112341
 2010-08-28 00:51:03 +00:00
Owen Anderson
dc4703bcd5 Add a prototype of a new peephole optimizing pass that uses LazyValue info to simplify PHIs and select's. 
This pass addresses the missed optimizations from PR2581 and PR4420.

llvm-svn: 112325
 2010-08-27 23:31:36 +00:00
Bob Wilson
31d487d235 Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like 
all the other LDM/STM instructions.  This fixes asm printer crashes when
compiling with -O0.  I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.

Prior to this change VLDM/VSTM used addressing mode #5, but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier.  Much of the backend
was not aware of these special cases.  The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode.  I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON.  Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.

llvm-svn: 112322
 2010-08-27 23:18:17 +00:00
Chris Lattner
08d2f26030 tidy up test. 
llvm-svn: 112321
 2010-08-27 23:15:21 +00:00
Chris Lattner
79f7f9e3f8 no really, fix the test. 
llvm-svn: 112317
 2010-08-27 23:05:54 +00:00
Chris Lattner
1cdec6a76b fix this test. It's not clear what it's really testing. 
llvm-svn: 112316
 2010-08-27 23:05:27 +00:00
Chris Lattner
3f880c2097 Enhance the shift propagator to handle the case when you have: 
A = shl x, 42
...
B = lshr ..., 38

which can be transformed into:
A = shl x, 4
...

iff we can prove that the would-be-shifted-in bits
are already zero.  This eliminates two shifts in the testcase
and allows eliminate of the whole i128 chain in the real example.

llvm-svn: 112314
 2010-08-27 22:53:44 +00:00
Chris Lattner
80632e5fd9 Implement a pretty general logical shift propagation 
framework, which is good at ripping through bitfield
operations.  This generalize a bunch of the existing
xforms that instcombine does, such as 
  (x << c) >> c -> and
to handle intermediate logical nodes.  This is useful for
ripping up the "promote to large integer" code produced by
SRoA.

llvm-svn: 112304
 2010-08-27 22:24:38 +00:00
Chris Lattner
1a15c898b9 merge and filecheckize test 
llvm-svn: 112289
 2010-08-27 20:44:45 +00:00
Chris Lattner
a571568019 merge two tests 
llvm-svn: 112288
 2010-08-27 20:42:10 +00:00
Chris Lattner
866b888095 teach the truncation optimization that an entire chain of 
computation can be truncated if it is fed by a sext/zext that doesn't
have to be exactly equal to the truncation result type.

llvm-svn: 112285
 2010-08-27 20:32:06 +00:00
Chris Lattner
d5777f8e47 get this test passing on linux builders. 
llvm-svn: 112280
 2010-08-27 18:49:08 +00:00
Chris Lattner
69a9143584 Add an instcombine to clean up a common pattern produced 
by the SRoA "promote to large integer" code, eliminating
some type conversions like this:

   %94 = zext i16 %93 to i32                       ; <i32> [#uses=2]
   %96 = lshr i32 %94, 8                           ; <i32> [#uses=1]
   %101 = trunc i32 %96 to i8                      ; <i8> [#uses=1]

This also unblocks other xforms from happening, now clang is able to compile:

struct S { float A, B, C, D; };
float foo(struct S A) { return A.A + A.B+A.C+A.D; }

into:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	pshufd	$1, %xmm0, %xmm2
	addss	%xmm0, %xmm2
	movdqa	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	pshufd	$1, %xmm1, %xmm0
	addss	%xmm3, %xmm0
	ret

on x86-64, instead of:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	movd	%xmm0, %rax
	shrq	$32, %rax
	movd	%eax, %xmm2
	addss	%xmm0, %xmm2
	movapd	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	movd	%xmm1, %rax
	shrq	$32, %rax
	movd	%eax, %xmm0
	addss	%xmm3, %xmm0
	ret

This seems pretty close to optimal to me, at least without
using horizontal adds.  This also triggers in lots of other
code, including SPEC.

llvm-svn: 112278
 2010-08-27 18:31:05 +00:00
Bob Wilson
c01101e76c Add alignment arguments to all the NEON load/store intrinsics. 
Update all the tests using those intrinsics and add support for
auto-upgrading bitcode files with the old versions of the intrinsics.

llvm-svn: 112271
 2010-08-27 17:13:24 +00:00
Owen Anderson
35ff7a208e Use LVI to eliminate conditional branches where we've tested a related condition previously. Update tests for this change. 
This fixes PR5652.

llvm-svn: 112270
 2010-08-27 17:12:29 +00:00
Daniel Dunbar
f642d43594 X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler. 
llvm-svn: 112250
 2010-08-27 01:30:14 +00:00
Chris Lattner
e9dafffae3 filecheckize 
llvm-svn: 112235
 2010-08-26 22:23:39 +00:00
Chris Lattner
1efc631212 rename test. 
llvm-svn: 112234
 2010-08-26 22:20:47 +00:00
Chris Lattner
d5d68438c1 optimize "integer extraction out of the middle of a vector" as produced 
by SRoA.  This is part of rdar://7892780, but needs another xform to
expose this.

llvm-svn: 112232
 2010-08-26 22:14:59 +00:00
Chris Lattner
19a5dc488b optimize bitcast(trunc(bitcast(x))) where the result is a float and 'x' 
is a vector to be a vector element extraction.  This allows clang to
compile:

struct S { float A, B, C, D; };
float foo(struct S A) { return A.A + A.B+A.C+A.D; }

into:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	movd	%xmm0, %rax
	shrq	$32, %rax
	movd	%eax, %xmm2
	addss	%xmm0, %xmm2
	movapd	%xmm1, %xmm3
	addss	%xmm2, %xmm3
	movd	%xmm1, %rax
	shrq	$32, %rax
	movd	%eax, %xmm0
	addss	%xmm3, %xmm0
	ret

instead of:

_foo:                                   ## @foo
## BB#0:                                ## %entry
	movd	%xmm0, %rax
	movd	%eax, %xmm0
	shrq	$32, %rax
	movd	%eax, %xmm2
	addss	%xmm0, %xmm2
	movd	%xmm1, %rax
	movd	%eax, %xmm1
	addss	%xmm2, %xmm1
	shrq	$32, %rax
	movd	%eax, %xmm0
	addss	%xmm1, %xmm0
	ret

... eliminating half of the horribleness.

llvm-svn: 112227
 2010-08-26 21:55:42 +00:00
Chris Lattner
d1a8743984 filecheckize 
llvm-svn: 112225
 2010-08-26 21:51:41 +00:00
Chris Lattner
3113ee607c rename test 
llvm-svn: 112224
 2010-08-26 21:50:56 +00:00
Owen Anderson
77fcf53657 Make JumpThreading smart enough to properly thread StrSwitch when it's compiled with clang++. 
llvm-svn: 112198
 2010-08-26 17:40:24 +00:00
Dan Gohman
8088d5e31d Reapply r112091 and r111922, support for metadata linking, with a 
fix: add a flag to MapValue and friends which indicates whether
any module-level mappings are being made. In the common case of
inlining, no module-level mappings are needed, so MapValue doesn't
need to examine non-function-local metadata, which can be very
expensive in the case of a large module with really deep metadata
(e.g. a large C++ program compiled with -g).

This flag is a little awkward; perhaps eventually it can be moved
into the ClonedCodeInfo class.

llvm-svn: 112190
 2010-08-26 15:41:53 +00:00
Chris Lattner
bc2f7bb5f3 Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2. 
llvm-svn: 112175
 2010-08-26 06:57:07 +00:00
Chris Lattner
ab96342d40 I think enough general codegen bugs are fixed to allow this to work 
on random hosts, lets see!

llvm-svn: 112172
 2010-08-26 05:52:42 +00:00
Chris Lattner
148485f707 implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1. 
llvm-svn: 112171
 2010-08-26 05:51:22 +00:00
Chris Lattner
3bec87fb38 Make sure this forces the x86 targets 
llvm-svn: 112169
 2010-08-26 05:25:05 +00:00
Chris Lattner
5256226fc8 fix sse1 only codegen in x86-64 mode, which is something we 
apparently try to support.

llvm-svn: 112168
 2010-08-26 05:24:29 +00:00
Daniel Dunbar
aeb8abb0e0 Revert r112091, "Remap metadata attached to instructions when remapping 
individual ...", which depends on r111922, which I am reverting.

llvm-svn: 112157
 2010-08-26 03:48:08 +00:00
Jim Grosbach
6500a1a2f9 Enable pre-RA virtual frame base register allocation. rdar://8277890 
llvm-svn: 112127
 2010-08-26 00:58:06 +00:00
Bob Wilson
1df383d9cb Revert svn 107892 (with changes to work with trunk). It caused a crash if 
a VLD result was not used (Radar 8355607).  It should also fix pr7988, but
I haven't verified that yet.

llvm-svn: 112118
 2010-08-26 00:13:36 +00:00
Chris Lattner
7bae652c62 temporarily disable this, which started failing on the llvm-i686-linux 
builder.  I will investigate tonight.

llvm-svn: 112113
 2010-08-25 23:43:14 +00:00
Chris Lattner
fe7c4ec039 Change handling of illegal vector types to widen when possible instead of 
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats.  This
affects two places in the code: handling cross block values and handling
function return and arguments.  Since vectors are already widened by 
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
 %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
 %C = fadd <2 x float> %B, %B
  br label %BB
BB:
 %D = fadd <2 x float> %C, %C
 %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
 ret <4 x float> %E
}

Now compiles into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 addps %xmm0, %xmm0
 ret

previously it compiled into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 pshufd $1, %xmm0, %xmm1
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
 insertps $0, %xmm0, %xmm0
 insertps $16, %xmm1, %xmm0
 addps %xmm0, %xmm0
 ret

This implements rdar://8230384

llvm-svn: 112101
 2010-08-25 22:49:25 +00:00
Dan Gohman
d19a0a49d1 Remap metadata attached to instructions when remapping individual 
instructions, not when remapping modules.

llvm-svn: 112091
 2010-08-25 21:36:50 +00:00
Daniel Dunbar
1a881a3eca X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3. 
llvm-svn: 112089
 2010-08-25 21:11:02 +00:00
Devang Patel
05becf3ac5 DIGlobalVariable can be used to encode debug info for globals that are directly folded into a constant by FE. 
llvm-svn: 112072
 2010-08-25 18:52:02 +00:00
Daniel Dunbar
9b7c2ce591 ARM/Thumb2: Fix a misselect in getARMCmp, when attempting to adjust a signed 
comparison that would overflow.
 - The other under/overflow cases can't actually happen because the immediates
   which would trigger them are legal (so we don't enter this code), but
   adjusted the style to make it clear the transform is always valid.

llvm-svn: 112053
 2010-08-25 16:58:05 +00:00
Eric Christopher
f9155e9642 Add another basic test cribbed from the x86 fast-isel tests. 
llvm-svn: 112036
 2010-08-25 07:57:29 +00:00
Eric Christopher
0dddfc66d6 Run this on thumb and arm. 
llvm-svn: 112035
 2010-08-25 07:53:15 +00:00
Eric Christopher
1645ee458a Make this testcase actually executed with fast-isel on arm. 
llvm-svn: 112033
 2010-08-25 07:47:00 +00:00
Bruno Cardoso Lopes
c51b6e98c7 Convert test to use filecheck and make it more specific 
llvm-svn: 112016
 2010-08-25 01:47:16 +00:00
Owen Anderson
e0cdfa265a In the default address space, any GEP off of null results in a trap value if you try to load it. Thus, 
any load in the default address space that completes implies that the base value that it GEP'd from
was not null.

llvm-svn: 112015
 2010-08-25 01:16:47 +00:00
Michael J. Spencer
526e183800 Fix COFF x86-64 relocations. PR7960. 
Multiple symbol reloc handling part of the patch by Cameron Esfahani.

llvm-svn: 111963
 2010-08-24 21:04:52 +00:00
Dan Gohman
cf8975d0ec XFAIL this on mingw, following remove_arguments_test.ll. 
llvm-svn: 111962
 2010-08-24 20:54:50 +00:00
Dan Gohman
a22c589850 Add a testcase for basic bugpointing in the presence of metadata. 
llvm-svn: 111955
 2010-08-24 20:23:51 +00:00
Daniel Dunbar
b96b0c40d3 MC/X86: Tweak imul recognition, previous hack only applies for the imul form 
taking immediates.

llvm-svn: 111950
 2010-08-24 19:37:56 +00:00
Daniel Dunbar
3b74f75d13 MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends. 
llvm-svn: 111947
 2010-08-24 19:24:18 +00:00
Daniel Dunbar
bd6901864b MC/AsmParser: Change ParseExpression to use ParseIdentifier(), to support 
dollars in identifiers.

llvm-svn: 111946
 2010-08-24 19:13:42 +00:00
Daniel Dunbar
75e77b0063 MC/X86: Warn on scale factors > 1 without index register, instead of erroring, 
for 'as' compatibility.

llvm-svn: 111945
 2010-08-24 19:13:38 +00:00
Daniel Dunbar
7859dfd71b MC/Parser: Accept leading dollar signs in identifiers. 
- Implemented by manually splicing the tokens. If this turns out to be
   problematically platform specific, a more elegant solution would be to
   implement some context dependent lexing support.

llvm-svn: 111934
 2010-08-24 18:12:12 +00:00
Dan Gohman
e400c660e4 Fix X86's isLegalAddressingMode to recognize that static addresses 
need not be RIP-relative in small mode.

llvm-svn: 111917
 2010-08-24 15:55:12 +00:00
Kalle Raiskila
1be8a5f947 Fix SPU BE to use all the available return registers. 
llc used to assert on the added testcase.

llvm-svn: 111911
 2010-08-24 11:50:48 +00:00
Dan Gohman
3c2bff91d0 Extend function-local metadata to be usable as attachments. 
llvm-svn: 111895
 2010-08-24 02:24:03 +00:00
Chris Lattner
115fdde871 fix rdar://7997827 - Accept and ignore LL and ULL suffixes on integer literals. 
Also fix 0b010 syntax to actually work while we're at it :-)

llvm-svn: 111876
 2010-08-24 00:43:25 +00:00
Mikhail Glushenkov
8001ceb30e llvmc: Make syntax more consistent. 
CompilationGraph and LanguageMap definitions do not use special syntax anymore.

llvm-svn: 111862
 2010-08-23 23:21:23 +00:00
Chris Lattner
f0f35c4aea Add a new llvm.x86.int intrinsic, allowing access to the 
x86 int and int3 instructions.  Patch by Peter Housel!

llvm-svn: 111831
 2010-08-23 19:39:25 +00:00
Chandler Carruth
49b7cdd14c Try to escape the '$'s in these so they reach the underlying 'sh' invocation. 
I have no idea how lit did the right thing here, but other test runners don't.

llvm-svn: 111805
 2010-08-23 08:54:19 +00:00
Dan Gohman
30b8e6cfd2 Fix x86 fast-isel's cmp+branch folding to avoid folding when the 
comparison is in a different basic block from the branch. In such
cases, the comparison's operands may not have initialized virtual
registers available.

llvm-svn: 111709
 2010-08-21 02:32:36 +00:00
Bob Wilson
c3856a5130 Replace some NEON vmovl intrinsic that I missed earlier. 
llvm-svn: 111696
 2010-08-20 23:22:43 +00:00
Bill Wendling
163660135e Create the new linker type "linker_private_weak_def_auto". 
It's similar to "linker_private_weak", but it's known that the address of the
object is not taken. For instance, functions that had an inline definition, but
the compiler decided not to inline it. Note, unlike linker_private and
linker_private_weak, linker_private_weak_def_auto may have only default
visibility.  The symbols are removed by the linker from the final linked image
(executable or dynamic library).

llvm-svn: 111684
 2010-08-20 22:05:50 +00:00
Dale Johannesen
dae647d2ea Test should pass on non-Darwin x86. 
llvm-svn: 111678
 2010-08-20 21:18:55 +00:00
Dale Johannesen
eb327d4a63 Don't run test on PPC darwin. 
llvm-svn: 111668
 2010-08-20 18:29:27 +00:00
Owen Anderson
678fd04aa5 Re-apply r111568 with a fix for the clang self-host. 
llvm-svn: 111665
 2010-08-20 18:24:43 +00:00
Erick Tryzelaar
29b5e4bb21 Fix vmcore.ml test. 
llvm-svn: 111664
 2010-08-20 18:24:35 +00:00
Mikhail Glushenkov
05e7815f9f llvmc: Fix alias generation. 
llvm-svn: 111662
 2010-08-20 18:16:26 +00:00
Dan Gohman
1c24df6ecc Convert DbgInfoPrinter to use errs() instead of outs(). 
llvm-svn: 111659
 2010-08-20 18:03:05 +00:00
Erick Tryzelaar
d2ba02571e Fix the running of ocaml tests. 
llvm-svn: 111626
 2010-08-20 14:51:26 +00:00
Erick Tryzelaar
68c31295f7 Expose LLVMSetOperand and LLVMGetNumOperands to llvm-c and ocaml. 
llvm-svn: 111625
 2010-08-20 14:51:22 +00:00
Bob Wilson
42d06735ca Fix some Ocaml tests: the %t substitution now returns an absolute path. 
llvm-svn: 111623
 2010-08-20 14:20:17 +00:00
Bob Wilson
734df9c786 The %ocamlopt setting has embedded quotes. Copy the entire value instead 
of stopping at the first embedded quote.

llvm-svn: 111622
 2010-08-20 14:19:38 +00:00
Benjamin Kramer
d4dbba35a6 Update LLVMC tests for r111620. 
llvm-svn: 111621
 2010-08-20 13:03:33 +00:00
Bob Wilson
0039bc228b Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and 
zero-extend operations.

llvm-svn: 111614
 2010-08-20 04:54:02 +00:00
Owen Anderson
7c1b4fbd3b Previous revert failed to remove this file. 
llvm-svn: 111582
 2010-08-19 23:45:15 +00:00
Owen Anderson
0e57acb623 Revert r111568 to unbreak clang self-host. 
llvm-svn: 111571
 2010-08-19 23:25:16 +00:00
Owen Anderson
7f2852ba2d When a set of bitmask operations, typically from a bitfield initialization, only modifies the low bytes of a value, 
we can narrow the store to only over-write the affected bytes.

llvm-svn: 111568
 2010-08-19 22:15:40 +00:00
Evan Cheng
44e9a498ac It's possible to sink a def if its local uses are PHI's. 
llvm-svn: 111537
 2010-08-19 18:33:29 +00:00
Daniel Dunbar
19253c8496 tests: Haste makes waste. 
llvm-svn: 111525
 2010-08-19 16:47:54 +00:00
Daniel Dunbar
a16b90f240 tests: Ignore whitespace in llvm_supports_binding() and llvm_gcc_supports(). 
llvm-svn: 111524
 2010-08-19 16:46:52 +00:00
Kenneth Uildriks
69cdd103c0 Fixed and reactivated a partial specialization test 
llvm-svn: 111516
 2010-08-19 12:42:38 +00:00
Chris Lattner
355d472093 fix PR7465, mishandling of lcall and ljmp: intersegment long 
call and jumps.

llvm-svn: 111496
 2010-08-19 01:18:43 +00:00
Dale Johannesen
2f32accda7 Testcase for llvm-gcc checkin 111482. 
llvm-svn: 111483
 2010-08-19 00:09:07 +00:00
Chris Lattner
7663b66c31 refix PR1143 by making basicaa analyze zexts of indices aggresively, 
which I broke with a recent patch.

llvm-svn: 111452
 2010-08-18 23:09:49 +00:00
Dan Gohman
7bfc030c1e Add a testcase to verify that commands don't crash when they hit 
errors on stderr.

llvm-svn: 111440
 2010-08-18 22:35:56 +00:00
Dan Gohman
5d87ae5441 When sending stats output to stdout for grepping, don't emit normal 
output to standard output also.

llvm-svn: 111435
 2010-08-18 22:22:44 +00:00
Dan Gohman
2d5b6bad99 When sending stats output to stdout for grepping, don't emit normal 
output to standard output also.

llvm-svn: 111401
 2010-08-18 20:32:46 +00:00
Daniel Dunbar
9ced206b3a MC/ELF: Allow null values in virtual sections, ELF doesn't use special 
directives for putting contents in .bss, for example.

llvm-svn: 111376
 2010-08-18 18:22:37 +00:00
Kalle Raiskila
05d3cc2ef8 Fix a bug with insertelement on SPU. 
The previous algorithm in LowerVECTOR_SHUFFLE 
didn't check all requirements for "monotonic" shuffles.

llvm-svn: 111361
 2010-08-18 10:20:29 +00:00
Kalle Raiskila
8b6f5df4ae Remove all traces of v2[i,f]32 on SPU. 
The "half vectors" are now widened to full size by the legalizer.
The only exception is in parameter passing, where half vectors are 
expanded. This causes changes to some dejagnu tests.

llvm-svn: 111360
 2010-08-18 10:04:39 +00:00
Kalle Raiskila
0ee13a45c8 Change SPU C calling convention to match that described in 
"SPU Application Binary Interface Specification, v1.9" by
IBM. 
Specifically: use r3-r74 to pass parameters and the return value.

llvm-svn: 111358
 2010-08-18 09:50:30 +00:00
Chris Lattner
b4602679d7 fix a buggy test 
llvm-svn: 111354
 2010-08-18 04:55:12 +00:00
Chris Lattner
49d0f29752 fix PR7589: In brief: 
gep P, (zext x) != gep P, (sext x)

DecomposeGEPExpression was getting this wrong, confusing
basicaa.

llvm-svn: 111352
 2010-08-18 04:28:19 +00:00
Chris Lattner
6ac971a27f filecheckize and detrivialize. 
llvm-svn: 111350
 2010-08-18 04:25:43 +00:00
Chris Lattner
ab876b6ce8 Fix PR7755: knowing something about an inval for a pred 
from the LHS should disable reconsidering that pred on the
RHS.  However, knowing something about the pred on the RHS
shouldn't disable subsequent additions on the RHS from
happening.

llvm-svn: 111349
 2010-08-18 03:14:36 +00:00
Bob Wilson
412be3eea6 Expand ZERO_EXTEND operations for NEON vector types. 
Testcase from Nick Lewycky.

llvm-svn: 111341
 2010-08-18 01:45:52 +00:00
Eric Christopher
08e9f0250a Temporarily revert r110987 as it's causing some miscompares in 
vector heavy code.  I'll re-enable when we've tracked down the problem.

llvm-svn: 111318
 2010-08-17 22:55:27 +00:00
Dan Gohman
ee89338e37 Tweak IVUsers' concept of "interesting" to exclude add recurrences 
where the step value is an induction variable from an outer loop, to
avoid trouble trying to re-expand such expressions. This effectively
hides such expressions from indvars and lsr, which prevents them
from getting into trouble.

llvm-svn: 111317
 2010-08-17 22:50:37 +00:00
Evan Cheng
d6348fe9b2 Add nounwind. 
llvm-svn: 111312
 2010-08-17 22:35:20 +00:00
Dale Johannesen
535ca58e85 Make fast scheduler handle asm clobbers correctly. 
PR 7882.  Follows suggestion by Amaury Pouly, thanks.

llvm-svn: 111306
 2010-08-17 22:17:24 +00:00
Anton Korobeynikov
8c6bfd1c24 Add some win64 coff goodness. 
Patch by Cameron Esfahani!

llvm-svn: 111287
 2010-08-17 21:05:54 +00:00
Dan Gohman
e26025ddd0 When rotating loops, put the original header at the bottom of the 
loop, making the resulting loop significantly less ugly.  Also, zap
its trivial PHI nodes, since it's easy.

llvm-svn: 111255
 2010-08-17 17:39:21 +00:00
Bob Wilson
e382fce916 Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid 
printing "lsl #0".  This fixes the remaining parts of pr7792.  Make
corresponding changes for encoding/decoding these instructions.

llvm-svn: 111251
 2010-08-17 17:23:19 +00:00
Bob Wilson
6239dc42c6 Allow more cases of undef shuffle indices and add tests for them. 
llvm-svn: 111226
 2010-08-17 05:54:34 +00:00
Evan Cheng
0163d059e4 PHI elimination should not break back edge. It can cause some significant code placement issues. rdar://8263994 
good:
LBB0_2:
  mov     r2, r0
  . . .
  mov     r1, r2
  bne     LBB0_2

bad:
LBB0_2:
  mov     r2, r0
  . . .
@ BB#3:
  mov     r1, r2
  b       LBB0_2

llvm-svn: 111221
 2010-08-17 01:20:36 +00:00
Bob Wilson
2c5e6a9214 Add a testcase for svn 111208. 
llvm-svn: 111212
 2010-08-16 23:44:29 +00:00
Bob Wilson
d662e8cd02 Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee 
that the high halfword is zero.  The shift need not be exactly 16 bits.

llvm-svn: 111196
 2010-08-16 22:26:55 +00:00
Bob Wilson
b776a55df5 Convert test to FileCheck. 
llvm-svn: 111195
 2010-08-16 22:21:13 +00:00
Bob Wilson
f174416619 Convert a test to use FileCheck. 
llvm-svn: 111153
 2010-08-16 17:05:27 +00:00
Dan Gohman
9178d0792f Instead, teach SimplifyCFG to trim non-address-taken blocks from 
indirectbr destination lists.

llvm-svn: 111122
 2010-08-16 14:41:14 +00:00
Dan Gohman
8ed4d1646e Revert r111058, the lint check for indirectbr successors that aren't 
address-taken. This can occur normally, if the code which took the
address got DCEd.

llvm-svn: 111121
 2010-08-16 14:39:19 +00:00
Benjamin Kramer
0224854fdc Test expects SSE, give him SSE. 
llvm-svn: 111115
 2010-08-15 23:32:03 +00:00
Benjamin Kramer
3116e6f58d Restore arch on these test, they fail on arm. 
llvm-svn: 111109
 2010-08-15 20:42:56 +00:00
Dale Johannesen
6e5cf0f5b6 Mark as XFAIL on darwin 8. PR 7886. 
llvm-svn: 111108
 2010-08-15 19:40:29 +00:00
Mikhail Glushenkov
de1e03e890 Update tests. 
llvm-svn: 111096
 2010-08-15 07:07:24 +00:00
Dan Gohman
afb3db46d2 LoopSimplify shouldn't split loop backedges that use indirectbr. PR7867. 
llvm-svn: 111061
 2010-08-14 00:43:09 +00:00
Dan Gohman
d04a608a73 Teach SimplifyCFG how to simplify indirectbr instructions. 
- Eliminate redundant successors.
 - Convert an indirectbr with one successor into a direct branch.

Also, generalize SimplifyCFG to be able to be run on a function entry block.
It knows quite a few simplifications which are applicable to the entry
block, and it only needs a few checks to avoid trouble with the entry block.

llvm-svn: 111060
 2010-08-14 00:29:42 +00:00
Dan Gohman
422c164d8d Add a lint check for an indirectbr destination which has not 
had its address taken.

llvm-svn: 111058
 2010-08-13 23:56:28 +00:00
Bob Wilson
92bf5a7425 Add a Thumb2 t2RSBrr instruction for disassembly only. 
This fixes another part of PR7792.

llvm-svn: 111057
 2010-08-13 23:24:25 +00:00
Bob Wilson
ca672ee828 Temporarily disable tail calls on ARM to work around some linker problems. 
llvm-svn: 111050
 2010-08-13 22:43:33 +00:00
Bob Wilson
0883c6aae3 Move the Thumb2 SSAT and USAT optional shift operator out of the 
instruction opcode.  This fixes part of PR7792.

llvm-svn: 111047
 2010-08-13 21:48:10 +00:00
Dale Johannesen
3f9c148d0e Revert 110491. While not wrong, it was based on a 
misanalysis and is undesirable.

llvm-svn: 111028
 2010-08-13 18:43:45 +00:00
Mikhail Glushenkov
003526ceac One more XFAIL. 
llvm-svn: 111010
 2010-08-13 07:03:56 +00:00