Bob Wilson
f5f52fa9d6
Handle 'a' modifier on inline assembly operands.
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This is part of the fix for pr4521.
llvm-svn: 75201
2009-07-09 23:54:51 +00:00
Evan Cheng
1b15e9611e
Added Thumb IT instruction.
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llvm-svn: 75198
2009-07-09 23:43:36 +00:00
Evan Cheng
0d509459ff
Another todo entry.
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llvm-svn: 75192
2009-07-09 23:17:28 +00:00
Evan Cheng
5bde39cb50
Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later.
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llvm-svn: 75190
2009-07-09 23:11:34 +00:00
Evan Cheng
57a4e81f3f
Fix ldm / stm unified syntax; add t2LDM_RET.
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llvm-svn: 75188
2009-07-09 22:58:39 +00:00
Evan Cheng
09e7791563
LDM_RET should be marked mayLoad.
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llvm-svn: 75187
2009-07-09 22:57:41 +00:00
Evan Cheng
3b7c3fafab
Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit.
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Note, we are not yet generating these instructions.
llvm-svn: 75181
2009-07-09 22:21:59 +00:00
Evan Cheng
7f8e728a54
Add a Thumb readme entry.
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llvm-svn: 75173
2009-07-09 20:50:52 +00:00
Evan Cheng
e08efed97a
Correct comment.
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llvm-svn: 75172
2009-07-09 20:40:44 +00:00
David Goodwin
6c4201dbcb
Handle Thumb-2 addressing modes during FP elimination.
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llvm-svn: 75158
2009-07-09 18:35:52 +00:00
Owen Anderson
8970999512
Thread LLVMContext through MVT and related parts of SDISel.
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llvm-svn: 75153
2009-07-09 17:57:24 +00:00
Evan Cheng
fad8f9bea1
Reorg includes.
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llvm-svn: 75115
2009-07-09 06:49:09 +00:00
David Goodwin
49fbd8d6b7
Use common code for both ARM and Thumb-2 instruction and register info.
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llvm-svn: 75067
2009-07-08 23:10:31 +00:00
Evan Cheng
991f885915
- Add some NEON ld / st instruction static encoding.
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- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.
llvm-svn: 75065
2009-07-08 22:51:32 +00:00
Evan Cheng
ef49d9c75b
Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
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llvm-svn: 75048
2009-07-08 21:03:57 +00:00
Torok Edwin
4df7c24e06
Missed an exit during the conversion.
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Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.
llvm-svn: 75045
2009-07-08 20:55:50 +00:00
Torok Edwin
358888da3a
Implement changes from Chris's feedback.
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Finish converting lib/Target.
llvm-svn: 75043
2009-07-08 20:53:28 +00:00
Bob Wilson
8d4a8b9370
Implement NEON vst1 instruction.
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llvm-svn: 75037
2009-07-08 20:32:02 +00:00
David Goodwin
94209a4c31
Generalize opcode selection in ARMBaseRegisterInfo.
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llvm-svn: 75036
2009-07-08 20:28:28 +00:00
Xerxes Ranby
626b0317a9
Fix cmake build.
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Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt
llvm-svn: 75035
2009-07-08 20:13:41 +00:00
David Goodwin
c571c4b457
Push methods into base class in preparation for sharing.
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llvm-svn: 75020
2009-07-08 18:31:39 +00:00
Bob Wilson
3809b333de
Implement NEON vld1 instructions.
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llvm-svn: 75019
2009-07-08 18:11:30 +00:00
Torok Edwin
ad3be984b7
Start converting to new error handling API.
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cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
llvm-svn: 75018
2009-07-08 18:01:40 +00:00
David Goodwin
7b4570ee1d
Start breaking out common base functionality for register info.
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llvm-svn: 75016
2009-07-08 17:28:55 +00:00
David Goodwin
5bdef4b3f7
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
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llvm-svn: 75010
2009-07-08 16:09:28 +00:00
Nick Lewycky
d46a7b2d22
Remove the vicmp and vfcmp instructions. Because we never had a release with
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these instructions, no autoupgrade or backwards compatibility support is
provided.
llvm-svn: 74991
2009-07-08 03:04:38 +00:00
Evan Cheng
18d70ca551
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
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llvm-svn: 74988
2009-07-08 01:46:35 +00:00
Evan Cheng
51549009b4
Add a todo.
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llvm-svn: 74976
2009-07-08 00:05:05 +00:00
Evan Cheng
835946d309
Also statically set bit 25 for BR_JT instructions.
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llvm-svn: 74974
2009-07-07 23:45:10 +00:00
Evan Cheng
834ee3625c
Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
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llvm-svn: 74972
2009-07-07 23:40:25 +00:00
Evan Cheng
393e38e44b
Add Thumb2 movcc instructions.
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llvm-svn: 74946
2009-07-07 20:39:03 +00:00
Evan Cheng
409ea11513
Add BX and BXr9 encodings. Patch by Sean Callanan.
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llvm-svn: 74938
2009-07-07 19:16:24 +00:00
Evan Cheng
fa864ab886
Add Thumb2 pkhbt / pkhtb.
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llvm-svn: 74895
2009-07-07 05:35:52 +00:00
Evan Cheng
46b98516f6
Add some more Thumb2 multiplication instructions.
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llvm-svn: 74889
2009-07-07 01:17:28 +00:00
Evan Cheng
3d69bea38e
80 col violation.
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llvm-svn: 74888
2009-07-07 01:16:41 +00:00
Evan Cheng
b70366baa4
isThumb2 really should mean thumb2 only, not thumb2+.
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llvm-svn: 74871
2009-07-06 22:29:14 +00:00
Evan Cheng
5a279bb4b2
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
Evan Cheng
2570d8b541
Added ARM::mls for armv6t2.
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llvm-svn: 74866
2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes
38373542a1
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
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cleanup, removed some #includes and moved Object Code Emitter out-of-line.
llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Tilmann Scheller
cea3c16aa5
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
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With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
llvm-svn: 74764
2009-07-03 06:44:53 +00:00
Evan Cheng
f20e4fba49
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
Evan Cheng
f3672575d6
Add Thumb2 load / store multiple instructions. Not used yet.
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llvm-svn: 74749
2009-07-03 00:18:36 +00:00
Evan Cheng
07bcde3709
t2LDR_PRE etc are loads.
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llvm-svn: 74741
2009-07-03 00:08:19 +00:00
Evan Cheng
162bd9cead
Added indexed stores.
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llvm-svn: 74740
2009-07-03 00:06:39 +00:00
Evan Cheng
fcab8e743a
Sign extending pre/post indexed loads.
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llvm-svn: 74736
2009-07-02 23:16:11 +00:00
David Goodwin
81075a5d30
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
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llvm-svn: 74731
2009-07-02 22:18:33 +00:00
Douglas Gregor
b523a25108
CMake build fixes, from Xerxes Ranby
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llvm-svn: 74720
2009-07-02 18:53:52 +00:00
Evan Cheng
dad6a41d14
Thumb2 pre/post indexed loads.
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llvm-svn: 74696
2009-07-02 07:28:31 +00:00
Evan Cheng
7249bab8a5
80 col violation.
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llvm-svn: 74693
2009-07-02 06:44:30 +00:00
Evan Cheng
57bb186a0c
Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
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llvm-svn: 74692
2009-07-02 06:38:40 +00:00
Evan Cheng
bdf117bfac
80 col violation.
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llvm-svn: 74683
2009-07-02 01:30:04 +00:00
Evan Cheng
d9f23ceeb9
Factor out ARM indexed load matching code.
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llvm-svn: 74681
2009-07-02 01:23:32 +00:00
Bob Wilson
810a970c6f
Add a new addressing mode for NEON load/store instructions.
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llvm-svn: 74658
2009-07-01 23:16:05 +00:00
Bob Wilson
e3f8a640ac
Fix a comment typo.
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llvm-svn: 74650
2009-07-01 21:59:43 +00:00
Bob Wilson
11cddb5deb
Fix up a comment: besides the >80col lines, the operation for this
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addressing mode is encoded in the second operand, not the third.
llvm-svn: 74641
2009-07-01 21:22:45 +00:00
Bill Wendling
fdd5badace
Update comments to make it clear that the function alignment is the Log2 of the
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bytes and not bytes.
llvm-svn: 74624
2009-07-01 18:50:55 +00:00
Evan Cheng
37503e9671
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
Daniel Dunbar
bc3d149e98
Remove unused AsmPrinter OptLevel argument, and propogate.
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- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
llvm-svn: 74579
2009-07-01 01:48:54 +00:00
David Goodwin
19aa5c7d51
Add PIC load and store patterns for Thumb-2.
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llvm-svn: 74577
2009-07-01 00:01:13 +00:00
David Goodwin
aa1f876954
Thumb-2 load and store double description. But nothing yet creates them.
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llvm-svn: 74566
2009-06-30 22:50:01 +00:00
Bill Wendling
c0fb316bd3
Add an "alignment" field to the MachineFunction object. It makes more sense to
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have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.
This allows for future work that would allow for precise no-op placement and the
like.
llvm-svn: 74564
2009-06-30 22:38:32 +00:00
David Goodwin
5805e9aef5
Add thumb-2 store word, halfword, and byte.
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llvm-svn: 74555
2009-06-30 22:11:34 +00:00
David Goodwin
aad223dd8a
Improve Thumb-2 jump table support.
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llvm-svn: 74549
2009-06-30 19:50:22 +00:00
David Goodwin
5545d82866
Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
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llvm-svn: 74543
2009-06-30 18:04:13 +00:00
Evan Cheng
2a527c3419
A few more load instructions.
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llvm-svn: 74500
2009-06-30 02:15:48 +00:00
David Goodwin
4f53387d26
Add Thumb-2 support for TEQ amd TST.
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llvm-svn: 74468
2009-06-29 22:49:42 +00:00
David Goodwin
9e1280adf3
Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
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llvm-svn: 74423
2009-06-29 15:33:01 +00:00
Duncan Sands
660e9c2106
Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt
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to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.
llvm-svn: 74421
2009-06-29 13:11:32 +00:00
Evan Cheng
093adf3ff9
Implement Thumb2 ldr.
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After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
llvm-svn: 74420
2009-06-29 07:51:04 +00:00
Anton Korobeynikov
7231e149ef
Simplify a bit
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llvm-svn: 74385
2009-06-27 12:59:03 +00:00
Anton Korobeynikov
1db77899c1
ARM refactoring. Step 2: split RegisterInfo
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llvm-svn: 74384
2009-06-27 12:16:40 +00:00
Douglas Gregor
6ee152cc94
Add ThumbInstrInfo.cpp to the CMake makefiles
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llvm-svn: 74382
2009-06-27 07:44:59 +00:00
Evan Cheng
817712377a
Renaming for consistency.
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llvm-svn: 74368
2009-06-27 02:26:13 +00:00
David Goodwin
e1979dfbf5
Remove outdated comment.
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llvm-svn: 74357
2009-06-26 23:39:02 +00:00
David Goodwin
90fc344e41
When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
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llvm-svn: 74355
2009-06-26 23:13:13 +00:00
Anton Korobeynikov
aab56476b2
Split thumb-related stuff into separate classes.
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Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo
llvm-svn: 74329
2009-06-26 21:28:53 +00:00
David Goodwin
921faa64cd
Thumb-2 has CLZ.
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llvm-svn: 74322
2009-06-26 20:47:43 +00:00
David Goodwin
9da977f216
Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
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llvm-svn: 74321
2009-06-26 20:45:56 +00:00
David Goodwin
46eb5a7a2d
ADC used to implement adde should use "adcs" opcode instead of "adc".
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llvm-svn: 74293
2009-06-26 18:07:25 +00:00
David Goodwin
877790aa5f
Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
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Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.
llvm-svn: 74288
2009-06-26 16:10:07 +00:00
Evan Cheng
b93625f89e
Simplify predicate CarryDefIsUsed.
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llvm-svn: 74277
2009-06-26 06:10:18 +00:00
Devang Patel
a7a5664fbb
Let's ignore MDStrings also!
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llvm-svn: 74255
2009-06-26 02:26:12 +00:00
Evan Cheng
2eb1525e2a
Add a note about commuting conditional move.
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llvm-svn: 74241
2009-06-26 00:28:48 +00:00
Evan Cheng
f23c8a5c8a
These are done / no longer applicable.
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llvm-svn: 74239
2009-06-26 00:25:27 +00:00
Evan Cheng
4f0e461e97
Mark a bunch of instructions commutable.
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llvm-svn: 74237
2009-06-26 00:19:44 +00:00
Evan Cheng
e45355b804
tst is also commutable.
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llvm-svn: 74236
2009-06-26 00:19:07 +00:00
Evan Cheng
4ac765118d
Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
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llvm-svn: 74228
2009-06-25 23:34:10 +00:00
David Goodwin
74414108e9
Use MVN for ~t2_so_imm immediates.
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llvm-svn: 74223
2009-06-25 23:11:21 +00:00
David Goodwin
a0ed5f6847
Add Def/Use of CPSR for Thumb-1 instructions.
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llvm-svn: 74219
2009-06-25 22:49:55 +00:00
Evan Cheng
331e7cc684
Unbreak mingw build. Patch by Viktor Kutuzov.
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llvm-svn: 74212
2009-06-25 22:04:44 +00:00
Evan Cheng
0cced3daa8
ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
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llvm-svn: 74200
2009-06-25 20:59:23 +00:00
David Goodwin
c72bad36d7
Test commit
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llvm-svn: 74185
2009-06-25 17:52:32 +00:00
Bob Wilson
38779c951a
Revert 74164. We'll want to use this method later.
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llvm-svn: 74176
2009-06-25 16:03:07 +00:00
Bob Wilson
ef8fd818bf
Remove unused hasV6T2Ops method. We already have a separate feature to
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identify Thumb2.
llvm-svn: 74164
2009-06-25 05:20:31 +00:00
Douglas Gregor
7841f61ced
Add missing dependencies to the CMake build system.
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llvm-svn: 74161
2009-06-25 05:03:06 +00:00
Evan Cheng
a3be8cba60
Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag.
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llvm-svn: 74158
2009-06-25 02:08:06 +00:00
Evan Cheng
e31583bf2a
Add thumb2 add sp.
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llvm-svn: 74156
2009-06-25 01:21:30 +00:00
Evan Cheng
8e61610960
Some reorg and additional comments.
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llvm-svn: 74152
2009-06-25 01:05:06 +00:00
Devang Patel
d98b076409
No need to code gen MDNodes
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llvm-svn: 74150
2009-06-25 00:47:42 +00:00
Evan Cheng
e8c58ee743
Add Thumb2 pc relative add.
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llvm-svn: 74141
2009-06-24 23:47:58 +00:00