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1088 Commits

Author SHA1 Message Date
Chris Lattner
35375c11bf Fix copy and pasto's for FP -> Int. This fixes fldry 
llvm-svn: 19418
 2005-01-09 19:49:59 +00:00
Chris Lattner
45155a3dee Initial implementation of FP->INT and INT->FP casts 
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.

llvm-svn: 19414
 2005-01-09 18:52:44 +00:00
Chris Lattner
9ca9b20447 Fix a subtle bug involving constant expr casts from int to fp 
llvm-svn: 19410
 2005-01-09 01:49:29 +00:00
Chris Lattner
c5e53c07fd Implement varargs and returnaddress/frameaddress intrinsics. With this 
patch, all of SingleSource/UnitTests passes.

llvm-svn: 19408
 2005-01-09 00:01:27 +00:00
Chris Lattner
ca81756527 Okay 15th time is the charm. Looking at the vector size is useless as it 
gets clobbered by a previous statement.  This fixes all calls finally.

llvm-svn: 19399
 2005-01-08 20:51:36 +00:00
Chris Lattner
85816cff9a Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll 
llvm-svn: 19398
 2005-01-08 20:39:31 +00:00
Chris Lattner
2d68cb6cf4 Fix off by one error 
llvm-svn: 19396
 2005-01-08 20:31:34 +00:00
Chris Lattner
c4d075cfa3 Adjust to changes in LowerCallTo interface 
Minor bugfixes

llvm-svn: 19376
 2005-01-08 19:28:19 +00:00
Chris Lattner
6c7d3bd8ea Wrap long line. 
llvm-svn: 19367
 2005-01-08 06:59:50 +00:00
Chris Lattner
473ec492f7 The X86 instruction selector already handles codegen of: 
store float 123.45, float* %P

as an integer store.  This adds handling of float immediate stores as integers
for arguments passed function calls.

This is now tested by CodeGen/X86/store-fp-constant.ll

llvm-svn: 19364
 2005-01-08 05:45:24 +00:00
Chris Lattner
2c398fc8f6 Allow the selection-dag based selector to be diabled with -disable-pattern-isel. 
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.

llvm-svn: 19335
 2005-01-07 07:50:50 +00:00
Chris Lattner
216198574d Reimplementation of the X86 pattern isel. This is still missing many large 
pieces, but can already do amazing things in some cases.

llvm-svn: 19334
 2005-01-07 07:49:41 +00:00
Chris Lattner
74019f517a This file is now dead. 
llvm-svn: 19333
 2005-01-07 07:49:05 +00:00
Chris Lattner
079b497982 Add a new prototype 
llvm-svn: 19332
 2005-01-07 07:48:33 +00:00
Chris Lattner
608dd77d6b Codegen -1 and -0.0 more efficiently. This implements CodeGen/X86/negatize_zero.ll 
llvm-svn: 19313
 2005-01-06 21:19:16 +00:00
Chris Lattner
6d651234d6 1. If a double FP constant must be put into a constant pool, but it can be 
precisely represented as a float, put it into the constant pool as a
   float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
   division.

llvm-svn: 19291
 2005-01-05 16:30:14 +00:00
Chris Lattner
b438f5251f Minor optimization to allocate R8 registers in a better order. 
llvm-svn: 19289
 2005-01-05 16:09:16 +00:00
Jeff Cohen
36968ed8c1 Revert elimination of global variable hack... still needed. 
llvm-svn: 19273
 2005-01-03 16:34:19 +00:00
Chris Lattner
1aaf8cccb2 ADC and IMUL are also commutable. 
llvm-svn: 19264
 2005-01-03 01:27:59 +00:00
Jeff Cohen
1087b72875 Eliminate the use of the global variable hack in the X86 target that was used 
to get Visual Studio to link in X86.lib to the executables that need it.  There
is another way of doing it.

llvm-svn: 19252
 2005-01-02 04:23:12 +00:00
Chris Lattner
a78fd4726e Disable 2->3 address promotion of add and inc instructions to LEA's. In 
addition to being three address, LEA's don't set the flags.

This fixes 186.crafty.

llvm-svn: 19251
 2005-01-02 04:18:17 +00:00
Chris Lattner
3ef32da6c3 Add a new method. 
llvm-svn: 19249
 2005-01-02 02:38:18 +00:00
Chris Lattner
95f1e628ed Add support for SETNPr to lower to memory form. 
llvm-svn: 19248
 2005-01-02 02:37:46 +00:00
Chris Lattner
d6bc921fa8 Implement the convertToThreeAddress method, add support for inverting JP/JNP 
branches.

llvm-svn: 19247
 2005-01-02 02:37:07 +00:00
Chris Lattner
0d6f03e52b Two changes here: 
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.

llvm-svn: 19246
 2005-01-02 02:35:46 +00:00
Chris Lattner
3b78513843 Remove unused enum value 
llvm-svn: 19024
 2004-12-17 22:41:46 +00:00
Chris Lattner
d11ba51208 Change the sentinal 
llvm-svn: 19007
 2004-12-17 00:46:51 +00:00
Chris Lattner
59d0c02d2b Create a stack slot for the return address lazily instead of eagerly. This 
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).

llvm-svn: 19006
 2004-12-17 00:07:46 +00:00
Chris Lattner
4b1d58bf4b Adjust to changes in asmwriter filenames 
llvm-svn: 18987
 2004-12-16 17:33:24 +00:00
Chris Lattner
4136428410 Set the rounding mode for the X86 FPU to 64-bits instead of 80-bits. We 
don't support long double anyway, and this gives us FP results closer to
other targets.

This also speeds up 179.art from 41.4s to 18.32s, by eliminating a problem
with extra precision that causes an FP == comparison to fail (leading to
extra loop iterations).

llvm-svn: 18895
 2004-12-13 17:23:11 +00:00
Chris Lattner
6131b06f73 Use the target triple to pick this target. 
llvm-svn: 18830
 2004-12-12 17:40:28 +00:00
Chris Lattner
99c8cf8ef8 Fix a regression caused by the previous patch 
llvm-svn: 18449
 2004-12-03 05:13:15 +00:00
Chris Lattner
316f923a9c Spill/restore X86 floating point stack registers with 64-bits of precision 
instead of 80-bits of precision.  This fixes PR467.

This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.

llvm-svn: 18433
 2004-12-02 18:17:31 +00:00
Chris Lattner
dfdd49b7af Consider 64-bit registers to be FP as well. 
llvm-svn: 18432
 2004-12-02 17:57:21 +00:00
Tanya Lattner
893f987574 Reverting this patch: 
http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20041122/021428.html

It broke Mutlisource/Applications/obsequi

llvm-svn: 18407
 2004-12-01 18:27:03 +00:00
Chris Lattner
9c400f3b28 Revamp long/ulong comparisons to use a much more efficient sequence (thanks 
to Brian and the Sun compiler for pointing out that the obvious works :)

This also enables folding all long comparisons into setcc and branch
instructions: before we could only do == and !=

For example, for:
void test(unsigned long long A, unsigned long long B) {
   if (A < B) foo();
 }

We now generate:

test:
        subl $4, %esp
        movl %esi, (%esp)
        movl 8(%esp), %eax
        movl 12(%esp), %ecx
        movl 16(%esp), %edx
        movl 20(%esp), %esi
        subl %edx, %eax
        sbbl %esi, %ecx
        jae .LBBtest_2  # UnifiedReturnBlock
.LBBtest_1:     # then
        call foo
        movl (%esp), %esi
        addl $4, %esp
        ret
.LBBtest_2:     # UnifiedReturnBlock
        movl (%esp), %esi
        addl $4, %esp
        ret

Instead of:

test:
        subl $12, %esp
        movl %esi, 8(%esp)
        movl %ebx, 4(%esp)
        movl 16(%esp), %eax
        movl 20(%esp), %ecx
        movl 24(%esp), %edx
        movl 28(%esp), %esi
        cmpl %edx, %eax
        setb %al
        cmpl %esi, %ecx
        setb %bl
        cmove %ax, %bx
        testb %bl, %bl
        je .LBBtest_2   # UnifiedReturnBlock
.LBBtest_1:     # then
        call foo
        movl 4(%esp), %ebx
        movl 8(%esp), %esi
        addl $12, %esp
        ret
.LBBtest_2:     # UnifiedReturnBlock
        movl 4(%esp), %ebx
        movl 8(%esp), %esi
        addl $12, %esp
        ret

llvm-svn: 18330
 2004-11-29 05:55:24 +00:00
Chris Lattner
7a34cbf266 Do not push two return addresses on the stack when we call external functions who have their addresses taken. This fixes test-call.ll 
llvm-svn: 18134
 2004-11-22 22:25:30 +00:00
Chris Lattner
f4c8575535 There is no reason to emit function stubs for direct calls. 
llvm-svn: 18082
 2004-11-21 03:46:06 +00:00
Chris Lattner
6d1fb33657 ignore generated files 
llvm-svn: 18073
 2004-11-21 00:01:54 +00:00
Chris Lattner
4a340e281e Remove all JIT specific code and switch the code generator over to emitting 
relocations for global references.

llvm-svn: 18068
 2004-11-20 23:55:15 +00:00
Chris Lattner
b9a44893e9 Implement the X86 JIT interfaces 
llvm-svn: 18067
 2004-11-20 23:54:33 +00:00
Chris Lattner
8e33311566 Describe the X86 target-specific relocations. 
llvm-svn: 18066
 2004-11-20 23:54:19 +00:00
Chris Lattner
3c20464ad7 We implement these interfaces 
llvm-svn: 18065
 2004-11-20 23:53:56 +00:00
Chris Lattner
0c79788bc4 Dont' forget to switch back to decimal output 
llvm-svn: 18010
 2004-11-19 20:57:07 +00:00
Chris Lattner
a7eec14b04 Fix a major bug in the signed shr code, which apparently only breaks 134.perl! 
llvm-svn: 17902
 2004-11-16 18:40:52 +00:00
Chris Lattner
41d31d7461 Remove a dead function, which died when we got GAS emission working (phwew, 
hold your nose!)

llvm-svn: 17869
 2004-11-16 04:34:29 +00:00
Chris Lattner
b378786c97 Implement a simple FIXME: if we are emitting a basic block address that has 
already been emitted, we don't have to remember it and deal with it later,
just emit it directly.

llvm-svn: 17868
 2004-11-16 04:30:51 +00:00
Chris Lattner
3f73c77ace * Merge some win32 ifdefs together 
* Get rid of "emitMaybePCRelativeValue", either we want to emit a PC relative
  value or not: drop the maybe BS.  As it turns out, the only places where
  the bool was a variable coming in, the bool was a dynamic constant.

llvm-svn: 17867
 2004-11-16 04:21:18 +00:00
Chris Lattner
3ed3e8669f Add debug-only=jit printout, so we see when lazily resolved symbols are 
set up.

llvm-svn: 17862
 2004-11-15 23:16:55 +00:00
Chris Lattner
9ef34d44e1 Simplify and rearrange long shift code 
llvm-svn: 17861
 2004-11-15 23:16:34 +00:00
Misha Brukman
8c1b4a5b9d GhostLinkage should not reach asm printing stage 
llvm-svn: 17750
 2004-11-14 21:03:49 +00:00
Chris Lattner
09b7f968e0 Don't print unneeded labels 
llvm-svn: 17714
 2004-11-13 23:27:11 +00:00
Chris Lattner
1cde11aa95 shld is a very high latency operation. Instead of emitting it for shifts of 
two or three, open code the equivalent operation which is faster on athlon
and P4 (by a substantial margin).

For example, instead of compiling this:

long long X2(long long Y) { return Y << 2; }

to:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        shldl $2, %eax, %edx
        shll $2, %eax
        ret

Compile it to:

X2:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        shrl $30, %edx
        leal (%edx,%ecx,4), %edx
        shll $2, %eax
        ret

Likewise, for << 3, compile to:

X3:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        shrl $29, %edx
        leal (%edx,%ecx,8), %edx
        shll $3, %eax
        ret

This matches icc, except that icc open codes the shifts as adds on the P4.

llvm-svn: 17707
 2004-11-13 20:48:57 +00:00
Chris Lattner
c531e090db Add missing check 
llvm-svn: 17706
 2004-11-13 20:04:38 +00:00
Chris Lattner
d1381380ae Compile: 
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }

into:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        addl %eax, %eax
        adcl %edx, %edx
        ret
X:
        movl 4(%esp), %eax
        addl %eax, %eax
        ret

instead of:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        shldl $1, %eax, %edx
        shll $1, %eax
        ret

X:
        movl 4(%esp), %eax
        shll $1, %eax
        ret

llvm-svn: 17705
 2004-11-13 20:03:48 +00:00
John Criswell
402e338f11 Correct the name of stosd for the AT&T syntax: 
It's stosl (l for long == 32 bit).

llvm-svn: 17658
 2004-11-10 04:48:15 +00:00
John Criswell
97da76178c Fix compilation problem; make the cast and the LHS be the same type. 
llvm-svn: 17488
 2004-11-05 16:17:06 +00:00
Chris Lattner
499e1b16a7 Quiet VC++ warnings 
llvm-svn: 17484
 2004-11-05 04:50:59 +00:00
Chris Lattner
d9696aa7b8 Fix a warning 
llvm-svn: 17431
 2004-11-02 15:27:57 +00:00
Chris Lattner
10de12fd46 Add placeholder variable to make Win32 work, applied for Morten Ofstad 
llvm-svn: 17406
 2004-11-01 20:10:20 +00:00
Reid Spencer
d3f7233495 Change Library Names Not To Conflict With Others When Installed 
llvm-svn: 17286
 2004-10-27 23:18:45 +00:00
Reid Spencer
019621a1ea Adjust to changes in Makefile.rules 
llvm-svn: 17167
 2004-10-22 21:02:08 +00:00
Reid Spencer
e48ba34fd4 We won't use automake 
llvm-svn: 17155
 2004-10-22 03:35:04 +00:00
Reid Spencer
ce514b1c2c Initial automake generated Makefile template 
llvm-svn: 17136
 2004-10-18 23:55:41 +00:00
Chris Lattner
cac643c78f Improve compatibility with VC++, patch contributed by Morten Ofstad! 
llvm-svn: 17126
 2004-10-18 15:54:17 +00:00
Chris Lattner
f96fb0c946 Don't print stuff out from the code generator. This broke the JIT horribly 
last night. :)  bork!

llvm-svn: 17093
 2004-10-17 17:40:50 +00:00
Chris Lattner
63e6bdd207 Rewrite support for cast uint -> FP. In particular, we used to compile this: 
double %test(uint %X) {
        %tmp.1 = cast uint %X to double         ; <double> [#uses=1]
        ret double %tmp.1
}

into:

test:
        sub %ESP, 8
        mov %EAX, DWORD PTR [%ESP + 12]
        mov %ECX, 0
        mov DWORD PTR [%ESP], %EAX
        mov DWORD PTR [%ESP + 4], %ECX
        fild QWORD PTR [%ESP]
        add %ESP, 8
        ret

... which basically zero extends to 8 bytes, then does an fild for an
8-byte signed int.

Now we generate this:


test:
        sub %ESP, 4
        mov %EAX, DWORD PTR [%ESP + 8]
        mov DWORD PTR [%ESP], %EAX
        fild DWORD PTR [%ESP]
        shr %EAX, 31
        fadd DWORD PTR [.CPItest_0 + 4*%EAX]
        add %ESP, 4
        ret

        .section .rodata
        .align  4
.CPItest_0:
        .quad   5728578726015270912

This does a 32-bit signed integer load, then adds in an offset if the sign
bit of the integer was set.

It turns out that this is substantially faster than the preceeding sequence.
Consider this testcase:

unsigned a[2]={1,2};
volatile double G;

void main() {
    int i;
    for (i=0; i<100000000; ++i )
        G += a[i&1];
}

On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s
to 0.94s.

On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s
to 1.34s.

Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3
-fomit-frame-pointer.

llvm-svn: 17083
 2004-10-17 08:01:28 +00:00
Chris Lattner
bf114f32c0 Unify handling of constant pool indexes with the other code paths, allowing 
us to use index registers for CPI's

llvm-svn: 17082
 2004-10-17 07:49:45 +00:00
Chris Lattner
892b15538d Give the asmprinter the ability to print memrefs with a constant pool index, 
index reg and scale

llvm-svn: 17081
 2004-10-17 07:16:32 +00:00
Chris Lattner
2fdca0bc02 fold: 
%X = and Y, constantint
  %Z = setcc %X, 0

instead of emitting:

        and %EAX, 3
        test %EAX, %EAX
        je .LBBfoo2_2   # UnifiedReturnBlock

We now emit:

        test %EAX, 3
        je .LBBfoo2_2   # UnifiedReturnBlock

This triggers 581 times on 176.gcc for example.

llvm-svn: 17080
 2004-10-17 06:10:40 +00:00
Chris Lattner
ae2e5f4de1 Teach the X86 backend about unreachable and undef. Among other things, we 
now compile:

'foo() {}' into "ret" instead of "mov EAX, 0; ret"

llvm-svn: 17049
 2004-10-16 18:13:05 +00:00
Chris Lattner
25b5777485 Instruction select globals with offsets better. For example, on this test 
case:

int C[100];
int foo() {
  return C[4];
}

We now codegen:

foo:
        mov %EAX, DWORD PTR [C + 16]
        ret

instead of:

foo:
        mov %EAX, OFFSET C
        mov %EAX, DWORD PTR [%EAX + 16]
        ret

Other impressive features may be coming later.

This patch is contributed by Jeff Cohen!

llvm-svn: 17011
 2004-10-15 05:05:29 +00:00
Chris Lattner
38de76365d Give the X86 JIT the ability to encode global+disp constants. Patch 
contributed by Jeff Cohen!

llvm-svn: 17010
 2004-10-15 04:53:13 +00:00
Chris Lattner
812d56631a Give the X86 asm printer the ability to print out addressing modes that have 
constant displacements from global variables.  Patch by Jeff Cohen!

llvm-svn: 17009
 2004-10-15 04:44:53 +00:00
Chris Lattner
1b9a284e54 Allow X86 addressing modes to represent globals with offsets. Patch contributed 
by Jeff Cohen!

llvm-svn: 17008
 2004-10-15 04:43:20 +00:00
Reid Spencer
e6418ec30f Update to reflect changes in Makefile rules. 
llvm-svn: 16950
 2004-10-13 11:46:52 +00:00
Reid Spencer
1b7459b29d Initial version of automake Makefile.am file. 
llvm-svn: 16893
 2004-10-10 22:20:40 +00:00
Chris Lattner
2419e1d27e The person who was planning to add SSE support isn't anymore, so disable 
the -sse* options (to avoid misleading people).

Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.

llvm-svn: 16860
 2004-10-08 22:41:46 +00:00
Chris Lattner
1291307d27 Fix a major regression from the bugfix for 2004-10-08-SelectSetCCFold.llx, 
which prevented setcc's from being folded into branches.  It appears that
conditional branchinst's CC operand is actually operand(2), not operand(0)
as we might expect. :(

llvm-svn: 16859
 2004-10-08 22:24:31 +00:00
Chris Lattner
1ac1e54bf9 Fix bug: 2004-10-08-SelectSetCCFold.llx. Normally this is hidden by the 
instcombine xform, which is why we didn't notice it before.

llvm-svn: 16840
 2004-10-08 16:34:13 +00:00
Chris Lattner
82aa8544a5 Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.

llvm-svn: 16766
 2004-10-06 14:31:50 +00:00
Chris Lattner
b0e465f0cb Codegen signed mod by 2 or -2 more efficiently. Instead of generating: 
t:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 2
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        mov %EAX, %EDX
        ret

Generate:
t:
        mov %ECX, DWORD PTR [%ESP + 4]
***     mov %EAX, %ECX
        cdq
        and %ECX, 1
        xor %ECX, %EDX
        sub %ECX, %EDX
***     mov %EAX, %ECX
        ret

Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.

Compare this to GCC, which generates:

t:
        mov     %eax, DWORD PTR [%esp+4]
        mov     %edx, %eax
        shr     %edx, 31
        lea     %ecx, [%edx+%eax]
        and     %ecx, -2
        sub     %eax, %ecx
        ret

or ICC 8.0, which generates:

t:
        movl      4(%esp), %ecx                                 #3.5
        movl      $-2147483647, %eax                            #3.25
        imull     %ecx                                          #3.25
        movl      %ecx, %eax                                    #3.25
        sarl      $31, %eax                                     #3.25
        addl      %ecx, %edx                                    #3.25
        subl      %edx, %eax                                    #3.25
        addl      %eax, %eax                                    #3.25
        negl      %eax                                          #3.25
        subl      %eax, %ecx                                    #3.25
        movl      %ecx, %eax                                    #3.25
        ret                                                     #3.25

We would be in great shape if not for the moves.

llvm-svn: 16763
 2004-10-06 05:01:07 +00:00
Chris Lattner
09b6b3f514 Fix a scary bug with signed division by a power of two. We used to generate: 
s:   ;; X / 4
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 2
        ret

When we really meant:

s:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        add %EAX, %ECX
        sar %EAX, 2
        ret

Hey, this also reduces register pressure too :)

llvm-svn: 16761
 2004-10-06 04:19:43 +00:00
Chris Lattner
9258948b08 Codegen signed divides by 2 and -2 more efficiently. In particular 
instead of:

s:   ;; X / 2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        ret

t:   ;; X / -2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        negl %eax
        ret

Emit:

s:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        ret

t:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        negl %eax
        ret

llvm-svn: 16760
 2004-10-06 04:02:39 +00:00
Chris Lattner
acd213fba3 Add some new instructions. Fix the asm string for sbb32rr 
llvm-svn: 16759
 2004-10-06 04:01:02 +00:00
Chris Lattner
0228f228df * Prune #includes 
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode.  woot!

llvm-svn: 16647
 2004-10-04 07:31:08 +00:00
Chris Lattner
581948c8f6 Add support for emitting AT&T style .s files, and make it the default. Users 
may now choose their output format with the -x86-asm-syntax={intel|att} flag.

llvm-svn: 16646
 2004-10-04 07:24:48 +00:00
Chris Lattner
5959f4a108 Convert some missed patterns to support AT&T style 
llvm-svn: 16645
 2004-10-04 07:23:07 +00:00
Chris Lattner
a05d9f53bb Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.

llvm-svn: 16644
 2004-10-04 07:08:46 +00:00
Chris Lattner
08098895db Fix incorrect suffix 
llvm-svn: 16642
 2004-10-04 05:20:16 +00:00
Chris Lattner
c2fc9597bd Fix some more missed suffixes and swapped operands 
llvm-svn: 16641
 2004-10-04 01:38:10 +00:00
Chris Lattner
7b15a84728 Add missing suffixes to FP instructions for AT&T mode 
llvm-svn: 16640
 2004-10-04 00:43:31 +00:00
Chris Lattner
8d44dcca97 Add support for the -x86-asm-syntax flag, which can be used to choose between 
Intel and AT&T style assembly language.  The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.

llvm-svn: 16639
 2004-10-03 20:36:57 +00:00
Chris Lattner
94780713a8 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.

llvm-svn: 16638
 2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
3f8f30bcb8 The real x87 floating point registers should not be allocatable. They 
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.

llvm-svn: 16472
 2004-09-21 21:22:11 +00:00
Misha Brukman
e877aacbaa s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++ 
front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16469
 2004-09-21 18:21:21 +00:00
Reid Spencer
c6a8d70cff Convert code to compile with vc7.1. 
Patch contributed by Paolo Invernizzi. Thanks Paolo!

llvm-svn: 16368
 2004-09-15 17:06:42 +00:00
Misha Brukman
9e5af08ef9 Fit long lines into 80 cols via creative space elimination 
llvm-svn: 16353
 2004-09-15 01:40:18 +00:00
Chris Lattner
aee36bb527 Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330
 2004-09-14 04:17:02 +00:00
Misha Brukman
ec87a61944 Fix filename: Printer.cpp has become X86AsmPrinter.cpp 
llvm-svn: 16299
 2004-09-12 21:26:04 +00:00
Alkis Evlogimenos
4d2b0a2b5b Use a shorter form to express implicit use/defs in FpGETRESULT and 
FpSETRESULT.

llvm-svn: 16247
 2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
3540de9ea6 A call instruction should implicitely define ST0 since the return 
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.

llvm-svn: 16246
 2004-09-08 16:54:54 +00:00
Reid Spencer
c4abcbefb1 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Reid Spencer
59cb27bcdc Reduce the number of arguments in the instruction builder and make some 
improvements on instruction selection that account for register and frame
index bases.

Patch contributed by Jeff Cohen. Thanks Jeff!

llvm-svn: 16110
 2004-08-30 00:13:26 +00:00
Chris Lattner
6781bb48eb Add -sse[,2,3] arguments to LLC 
llvm-svn: 16018
 2004-08-24 08:18:44 +00:00
Chris Lattner
28c7ae5697 Nuke commented out stuff 
llvm-svn: 16017
 2004-08-24 08:18:27 +00:00
Chris Lattner
64d3bc5e85 Switch from bytes to bits for alignment for consistency 
llvm-svn: 15974
 2004-08-21 20:14:13 +00:00
Chris Lattner
4427fd9a3c Reduce uses of getRegClass 
llvm-svn: 15973
 2004-08-21 20:13:52 +00:00
Chris Lattner
8c5096d223 Rename var 
llvm-svn: 15897
 2004-08-18 02:22:55 +00:00
Chris Lattner
d3d5c1d2a2 Start using alignment output routines from AsmPrinter. 
Changes to make this more similar to the ppc asmprinter

llvm-svn: 15890
 2004-08-17 19:25:42 +00:00
Chris Lattner
052cebe33c Use the AsmPrinter emitGlobalConstant. 
llvm-svn: 15872
 2004-08-17 06:48:55 +00:00
Chris Lattner
bf5dba50c5 Start using the AsmPrinter to emit our first class constants. This also 
drops our half-assed support for cygwin, which noone uses and doesn't work
anyway.

llvm-svn: 15839
 2004-08-16 23:16:06 +00:00
Chris Lattner
3383506bcc Disable the pattern isel 
llvm-svn: 15787
 2004-08-15 23:02:17 +00:00
Chris Lattner
555a585fd8 Code insertion methods now return void instead of an int. 
llvm-svn: 15780
 2004-08-15 22:15:11 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Nate Begeman
fabece673b Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent 
llvm-svn: 15739
 2004-08-14 22:05:10 +00:00
Chris Lattner
5e7e9b6c26 Remove a bunch of ad-hoc target-specific flags that were only used by the 
old asmprinter.

llvm-svn: 15660
 2004-08-11 07:12:04 +00:00
Chris Lattner
b09bc9d4e3 Remove a dead method 
llvm-svn: 15659
 2004-08-11 07:07:14 +00:00
Chris Lattner
3fc9d4490c Finally, the entire instruction asmprinter is now generated from tblgen, woo! 
llvm-svn: 15658
 2004-08-11 07:02:04 +00:00
Chris Lattner
3cef2f82ff Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls. 
llvm-svn: 15657
 2004-08-11 06:59:12 +00:00
Chris Lattner
309873fed0 This file is long dead 
llvm-svn: 15656
 2004-08-11 06:55:12 +00:00
Chris Lattner
9c171be048 Scrunch memoperands, add a few more for floating point memops 
Eliminate the FPI*m classes, converting them to use FPI instead.

llvm-svn: 15655
 2004-08-11 06:50:10 +00:00
Chris Lattner
f34003128d Move hacks up 
llvm-svn: 15654
 2004-08-11 06:09:55 +00:00
Chris Lattner
b287047c3f Make FPI take asm string and operand list 
llvm-svn: 15653
 2004-08-11 05:54:16 +00:00
Chris Lattner
c304bf7e03 Nuke the Im*i* patterns, by asmprintergenifying all users. 
llvm-svn: 15652
 2004-08-11 05:31:07 +00:00
Chris Lattner
65ab459759 X86 instructions that read-modify-write memory are not LLVM two-address instructions. 
llvm-svn: 15651
 2004-08-11 05:07:25 +00:00
Chris Lattner
384711a69c Get rid of the Im8, Im16, Im32 classes, converting more instructions over to 
asmprintergeneration

llvm-svn: 15650
 2004-08-11 04:31:00 +00:00
Chris Lattner
24279a8ac8 Remove dead method 
llvm-svn: 15647
 2004-08-11 02:26:39 +00:00
Chris Lattner
b66b9cd4a9 Convert asmprinter to new style of instruction printer 
Start asmprintergen'ifying machine instrs with memory operands.

llvm-svn: 15646
 2004-08-11 02:25:00 +00:00
Chris Lattner
5cf0a20d4f This is purely a formatting patch that gets us closer to the mecca of fitting 
X86InstrInfo.td into 80 columns

llvm-svn: 15629
 2004-08-10 21:21:30 +00:00
Chris Lattner
f6c4de46e0 Drop the first argument of FPI, and asmprinterify fxch 
llvm-svn: 15628
 2004-08-10 21:02:13 +00:00
Chris Lattner
97abe28059 This purely mechanical patch gives the "I" tblgen class operand list and asm 
string operands, and adjusts all users to pass them in instead of using II.

llvm-svn: 15624
 2004-08-10 20:17:41 +00:00
Chris Lattner
332fa9be1c Convert Ii32 instructions over to use the asmprinter generator 
llvm-svn: 15621
 2004-08-10 19:06:36 +00:00
Chris Lattner
068209661a Convert the Ii16 instructions over 
llvm-svn: 15606
 2004-08-10 16:22:02 +00:00
Chris Lattner
315782f0ac Convert all Ii8 instructions over to the autogenerated asmprinter. 
llvm-svn: 15605
 2004-08-10 16:09:54 +00:00
Alkis Evlogimenos
f853362a44 Stop using getValues(). 
llvm-svn: 15487
 2004-08-04 08:44:43 +00:00
Chris Lattner
2677b71f64 Fix a warning 
llvm-svn: 15409
 2004-08-01 19:31:30 +00:00
Chris Lattner
df7c9d0339 Convert all I<> instructions to asmformat. 
Delete the 'name' field of all instructions that have asmformats.

llvm-svn: 15403
 2004-08-01 09:52:59 +00:00
Chris Lattner
90a4b737dd Eliminate 3 of the X86 printImplicit* flags. 
llvm-svn: 15398
 2004-08-01 08:23:17 +00:00
Chris Lattner
de4844f84d Get rid of 3 of the 4 'printimplicit' flags. Implicit operands are now 
explicitly listed in the asm string.

llvm-svn: 15397
 2004-08-01 08:22:29 +00:00
Chris Lattner
0c5ab21dcd Convert more instructions over to the asmprinter 
llvm-svn: 15396
 2004-08-01 08:13:11 +00:00
Chris Lattner
0a6fedb451 Handle registers a bit more efficiently 
llvm-svn: 15395
 2004-08-01 08:12:41 +00:00
Chris Lattner
c40aa40525 give FP stack registers names 
llvm-svn: 15394
 2004-08-01 08:12:13 +00:00
Chris Lattner
6c596faddb Switch more instructions over to using the asmprinter. Fix bugs in the emission 
of in/out instructions (missing %'s on registers).

llvm-svn: 15393
 2004-08-01 07:44:35 +00:00
Chris Lattner
3a928f8119 The tblgen'erated asmparser wants a way to print operands. 
llvm-svn: 15392
 2004-08-01 07:43:46 +00:00
Chris Lattner
e4c868ffa0 Rename the Printer class -> X86AsmPrinter. 
Include the tablegenerated assembly writer.

llvm-svn: 15389
 2004-08-01 06:02:08 +00:00
Chris Lattner
a02166d28b Factor a bunch of the rules and add support for generating the asmwriter. 
llvm-svn: 15388
 2004-08-01 06:01:32 +00:00
Chris Lattner
9a7b050ebb Specify an asm string and operands lists for a bunch of instructions. 
This only really covers no-operand instructions so far.

llvm-svn: 15387
 2004-08-01 06:01:00 +00:00
Chris Lattner
101dccd430 Completely disable the pattern isel until it is more substantial. 
llvm-svn: 15380
 2004-08-01 03:28:02 +00:00
Chris Lattner
9bce44c8cc Entirely eliminate all patterns and expanders from this file. We shall go 
with an incremental approach rather than a revolutionary approach.

llvm-svn: 15379
 2004-08-01 03:25:01 +00:00
Chris Lattner
0717ef353d Remove obsolete file 
llvm-svn: 15377
 2004-08-01 03:19:28 +00:00
Alkis Evlogimenos
cdcb1c62e5 Align breaks. 
llvm-svn: 15371
 2004-07-31 10:05:44 +00:00
Chris Lattner
0d66480e9e Add breaks 
llvm-svn: 15365
 2004-07-31 09:53:31 +00:00
Alkis Evlogimenos
1eb8a5dc09 Simplify code a bit. 
llvm-svn: 15364
 2004-07-31 09:44:32 +00:00
Alkis Evlogimenos
de150fb74b Correctly spell 'unconditional'. 
llvm-svn: 15363
 2004-07-31 09:41:44 +00:00
Alkis Evlogimenos
bc3d550391 Implement insertGoto and reverseBranchCondition for the X86. 
llvm-svn: 15362
 2004-07-31 09:38:47 +00:00
Chris Lattner
9a23ab1e63 Mark barrier instructions. Execution does not fall through uncond branches 
or return intructions.

llvm-svn: 15356
 2004-07-31 02:10:53 +00:00
Misha Brukman
3e7a88e9db Fix indentation: should be 2 spaces. 
llvm-svn: 15240
 2004-07-26 18:48:58 +00:00
Misha Brukman
61ff8a374f Fix file header as it has been renamed. 
llvm-svn: 15239
 2004-07-26 18:45:48 +00:00
Misha Brukman
ccd1114518 Renamed files to have the `X86' prefix for uniqueness purposes. 
All CVS history was renamed, the *,v were copied over.  No worries.

llvm-svn: 15238
 2004-07-26 18:43:11 +00:00
Chris Lattner
093d84c480 Remove some (LARGE) abandoned code for the release. If this is ever needed 
again in the future, it can be resurrected out of CVS

llvm-svn: 15112
 2004-07-22 21:30:35 +00:00
Chris Lattner
e3d3cd3e71 Fix cases where we generated horrible code like this: 
mov %EDI, 12
        add %EDI, %ECX
        mov %ECX, 12
        add %ECX, %EDX
        mov %EDX, 12
        add %EDX, %ESI

instead (really!) generate this:

        add %ECX, 12
        add %EDX, 12
        add %ESI, 12

llvm-svn: 15090
 2004-07-21 21:28:26 +00:00
Chris Lattner
e8b9b58454 While I'm at it, don't break codegen of mul by 3,5,9. 
llvm-svn: 15013
 2004-07-19 23:50:57 +00:00
Chris Lattner
f668465840 Generate better code for multiplies by negative constants like -4, -1, -9, etc. 
llvm-svn: 15012
 2004-07-19 23:47:21 +00:00
Reid Spencer
14243817ec bug 122: 
- Replace ConstantPointerRef usage with GlobalValue usage
- Minimize redundant isa<GlobalValue> usage
- Correct isa<Constant> for GlobalValue subclass

llvm-svn: 14950
 2004-07-18 00:38:32 +00:00
Chris Lattner
9bcf258cc3 Make sure to emit the immediate byte for instructions like: 
shrd [mem], reg, imm

This fixes the jit-ls failure on 186.crafty.

llvm-svn: 14914
 2004-07-17 20:26:14 +00:00
Chris Lattner
d7905d828b Reserve the correct amt of space. 
llvm-svn: 14913
 2004-07-17 20:24:05 +00:00
Chris Lattner
c4888ccda7 Patches towards fixing PR341 
llvm-svn: 14841
 2004-07-15 02:14:30 +00:00
Chris Lattner
210ffe4b77 Improve codegen for the LLVM offsetof/sizeof "operator". Before we compiled 
this LLVM function:

int %foo() {
        ret int cast (int** getelementptr (int** null, int 1) to int)
}

into:

foo:
        mov %EAX, 0
        lea %EAX, DWORD PTR [%EAX + 4]
        ret

now we compile it into:

foo:
        mov %EAX, 4
        ret

This sequence is frequently generated by the MSIL front-end, and soon the malloc lowering pass and
Java front-ends as well..

-Chris

llvm-svn: 14834
 2004-07-15 00:58:53 +00:00
Chris Lattner
6331eb6bbe Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.

llvm-svn: 14756
 2004-07-11 04:17:10 +00:00
Chris Lattner
b67e3b01bc Make these format a bit nicer 
llvm-svn: 14747
 2004-07-11 03:27:42 +00:00
Chris Lattner
2ada866a78 Auto-registrate target 
llvm-svn: 14745
 2004-07-11 02:48:49 +00:00
Reid Spencer
50ec3f9325 Add #include <iostream> since Value.h does not #include it any more. 
llvm-svn: 14622
 2004-07-04 12:19:56 +00:00
Chris Lattner
6da0499f4b Remove dead blocks 
llvm-svn: 14564
 2004-07-02 05:46:41 +00:00
Misha Brukman
9e015dddb8 Fix associativity of parameters to assert(): now it actually makes sense. 
llvm-svn: 14483
 2004-06-29 19:43:20 +00:00
Misha Brukman
b3e4179f42 Convert tabs to spaces. 
llvm-svn: 14482
 2004-06-29 19:28:53 +00:00
Chris Lattner
2abf0134d0 I believe that the code generator now properly handles dead basic blocks. If not, 
this is a bug, and should be fixed.

llvm-svn: 14476
 2004-06-29 07:17:12 +00:00
Chris Lattner
cd1a39bbec Fix a regression from r1.224. In particular, codegen a cast from double -> 
float as a truncation by going through memory.  This truncation was being
skipped, which caused 175.vpr to fail after aggressive register promotion.

llvm-svn: 14473
 2004-06-29 00:14:38 +00:00
Tanya Lattner
da38dc5180 Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function. 
llvm-svn: 14389
 2004-06-25 00:13:11 +00:00
Misha Brukman
e38f7ed2cc Spell out `NoFramePointerElim' for readability. 
llvm-svn: 14299
 2004-06-21 21:17:44 +00:00
Misha Brukman
a2ac4e4345 Use the common `NoFPElim' setting instead of our own. 
llvm-svn: 14298
 2004-06-21 21:10:24 +00:00
Chris Lattner
cc465361d9 Move the IntrinsicLowering header into the CodeGen directory, as per PR346 
llvm-svn: 14266
 2004-06-20 07:49:54 +00:00
Chris Lattner
9e1bbe86ba Codegen sub C, X a little bit better for register pressure. Instead of 
mov REG, C
sub REG, X

generate:

neg X
add X, C

which uses one less reg

llvm-svn: 14213
 2004-06-18 00:50:37 +00:00
Chris Lattner
a5750b975a Fold setcc instructions into select and branches that are not in the same BB as 
the setcc.

llvm-svn: 14212
 2004-06-18 00:29:22 +00:00
Chris Lattner
f815117481 Do not fold loads into instructions if it is used more than once. In particular 
we do not want to fold the load in cases like this:

  X = load
    = add A, X
    = add B, X

llvm-svn: 14204
 2004-06-17 22:15:25 +00:00
Chris Lattner
0cd29ae2cd Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() 
llvm-svn: 14201
 2004-06-17 18:19:28 +00:00
Chris Lattner
9bb0083d16 Remove support for llvm.isnan. Alkis wins :) 
llvm-svn: 14189
 2004-06-15 21:48:07 +00:00
Chris Lattner
d11493d8c4 Add basic support for the isunordered intrinsic. The isnan stuff still needs to go 
llvm-svn: 14185
 2004-06-15 21:36:44 +00:00
Chris Lattner
3a8e675c03 By far, one of the most common uses of isnan is to make 'isunordered' 
comparisons.  In an 'isunordered' predicate, which looks like this at
the LLVM level:

        %a = call bool %llvm.isnan(double %X)
        %b = call bool %llvm.isnan(double %Y)
        %COM = or bool %a, %b

We used to generate this code:

        fxch %ST(1)
        fucomip %ST(0), %ST(0)
        setp %AL
        fucomip %ST(0), %ST(0)
        setp %AH
        or %AL, %AH

With this patch, we generate this code:

        fucomip %ST(0), %ST(1)
        fstp %ST(0)
        setp %AL

Which should make alkis happy.  Tested as X86/compare_folding.llx:test1

llvm-svn: 14148
 2004-06-11 05:33:49 +00:00
Chris Lattner
f78e3e7f63 Fix bug in previous checkin 
llvm-svn: 14146
 2004-06-11 05:22:44 +00:00
Chris Lattner
7d8093efb1 No really, these are dead now 
llvm-svn: 14145
 2004-06-11 04:50:14 +00:00
Chris Lattner
a8e603b719 Now that compare instructions aren't lumped in with the other twoargfp instructions, 
we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.

llvm-svn: 14144
 2004-06-11 04:49:02 +00:00
Chris Lattner
b050f778ca Introduce a new FP instruction type to separate the compare cases from the 
twoarg cases.

llvm-svn: 14143
 2004-06-11 04:41:24 +00:00
Chris Lattner
edb06042b9 Add direct support for the isnan intrinsic, implementing test/Regression/CodeGen/X86/isnan.llx 
testcase

llvm-svn: 14141
 2004-06-11 04:31:10 +00:00
Chris Lattner
4c8b57ea31 Add support for the setp instructions 
llvm-svn: 14140
 2004-06-11 04:30:06 +00:00
Chris Lattner
c66e996765 Split compare instruction handling OUT of handleTwoArgFP into handleCompareFP. 
This makes the code much simpler, and the two cases really do belong apart.
Once we do it, it's pretty obvious how flawed the logic was for A != A case,
so I fixed it (fixing PR369).

This also uses freeStackSlotAfter instead of inserting an fxchg then
popStackAfter'ing in the case where there is a dead result (unlikely, but
possible), producing better code.

llvm-svn: 14139
 2004-06-11 04:25:06 +00:00
Chris Lattner
1f0e0d55c4 Fix the fixed stack offset, patch contributed by Vladimir Prus 
llvm-svn: 14110
 2004-06-10 06:19:25 +00:00
John Criswell
287e3fc88b Fix for PR#366. We use getClassB() so that we can handle cast instructions 
that cast to bool.

llvm-svn: 14096
 2004-06-09 15:18:51 +00:00
Chris Lattner
c51b272047 This file is obsolete 
llvm-svn: 14005
 2004-06-04 00:15:21 +00:00
Chris Lattner
5ad9eaab1a Convert to the new TargetMachine interface. 
llvm-svn: 13952
 2004-06-02 05:55:25 +00:00
Chris Lattner
1e22b42cb6 Add support for accurate garbage collection to the LLVM code generators 
llvm-svn: 13696
 2004-05-23 21:23:35 +00:00
Chris Lattner
85f19c7b3f Add some notes to myself, no functional changes 
llvm-svn: 13695
 2004-05-23 21:23:12 +00:00
Chris Lattner
5862899c44 minor wording change 
llvm-svn: 13694
 2004-05-23 21:22:55 +00:00
Brian Gaeke
e5736bf986 Don't keep track of references to LLVM BasicBlocks while emitting; use 
MachineBasicBlocks instead.

llvm-svn: 13568
 2004-05-14 06:54:58 +00:00
Brian Gaeke
a25a10e73b Support MachineBasicBlock operands on RawFrm instructions. 
Get rid of separate numbering for LLVM BasicBlocks; use the automatically
generated MachineBasicBlock numbering.

llvm-svn: 13567
 2004-05-14 06:54:57 +00:00
Brian Gaeke
a17301ca8b Generate branch machine instructions with MachineBasicBlock operands instead of 
LLVM BasicBlock operands.

llvm-svn: 13566
 2004-05-14 06:54:56 +00:00
Chris Lattner
269da7901a Two more improvements for null pointer handling: storing a null pointer 
and passing a null pointer into a function.

For this testcase:

void %test(int** %X) {
  store int* null, int** %X
  call void %test(int** null)
  ret void
}

we now generate this:

test:
        sub %ESP, 12
        mov %EAX, DWORD PTR [%ESP + 16]
        mov DWORD PTR [%EAX], 0
        mov DWORD PTR [%ESP], 0
        call test
        add %ESP, 12
        ret

instead of this:

test:
        sub %ESP, 12
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %ECX, 0
        mov DWORD PTR [%EAX], %ECX
        mov %EAX, 0
        mov DWORD PTR [%ESP], %EAX
        call test
        add %ESP, 12
        ret

llvm-svn: 13558
 2004-05-13 15:26:48 +00:00
Chris Lattner
dc8e8484e5 Second half of my fixed-sized-alloca patch. This folds the LEA to compute 
the alloca address into common operations like loads/stores.

In a simple testcase like this (which is just designed to excersize the
alloca A, nothing more):

int %test(int %X, bool %C) {
        %A = alloca int
        store int %X, int* %A
        store int* %A, int** %G
        br bool %C, label %T, label %F
T:
        call int %test(int 1, bool false)
        %V = load int* %A
        ret int %V
F:
        call int %test(int 123, bool true)
        %V2 = load int* %A
        ret int %V2
}

We now generate:

test:
        sub %ESP, 12
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %CL, BYTE PTR [%ESP + 20]
***     mov DWORD PTR [%ESP + 8], %EAX
        mov %EAX, OFFSET G
        lea %EDX, DWORD PTR [%ESP + 8]
        mov DWORD PTR [%EAX], %EDX
        test %CL, %CL
        je .LBB2 # PC rel: F
.LBB1:  # T
        mov DWORD PTR [%ESP], 1
        mov DWORD PTR [%ESP + 4], 0
        call test
***     mov %EAX, DWORD PTR [%ESP + 8]
        add %ESP, 12
        ret
.LBB2:  # F
        mov DWORD PTR [%ESP], 123
        mov DWORD PTR [%ESP + 4], 1
        call test
***     mov %EAX, DWORD PTR [%ESP + 8]
        add %ESP, 12
        ret

Instead of:

test:
        sub %ESP, 20
        mov %EAX, DWORD PTR [%ESP + 24]
        mov %CL, BYTE PTR [%ESP + 28]
***     lea %EDX, DWORD PTR [%ESP + 16]
***     mov DWORD PTR [%EDX], %EAX
        mov %EAX, OFFSET G
        mov DWORD PTR [%EAX], %EDX
        test %CL, %CL
***     mov DWORD PTR [%ESP + 12], %EDX
        je .LBB2 # PC rel: F
.LBB1:  # T
        mov DWORD PTR [%ESP], 1
        mov %EAX, 0
        mov DWORD PTR [%ESP + 4], %EAX
        call test
***     mov %EAX, DWORD PTR [%ESP + 12]
***     mov %EAX, DWORD PTR [%EAX]
        add %ESP, 20
        ret
.LBB2:  # F
        mov DWORD PTR [%ESP], 123
        mov %EAX, 1
        mov DWORD PTR [%ESP + 4], %EAX
        call test
***     mov %EAX, DWORD PTR [%ESP + 12]
***     mov %EAX, DWORD PTR [%EAX]
        add %ESP, 20
        ret

llvm-svn: 13557
 2004-05-13 15:12:43 +00:00
Chris Lattner
94de563118 Substantially improve code generation for address exposed locals (aka fixed 
sized allocas in the entry block).  Instead of generating code like this:

entry:
  reg1024 = ESP+1234
... (much later)
  *reg1024 = 17


Generate code that looks like this:
entry:
  (no code generated)
... (much later)
  t = ESP+1234
  *t = 17

The advantage being that we DRAMATICALLY reduce the register pressure for these
silly temporaries (they were all being spilled to the stack, resulting in very
silly code).  This is actually a manual implementation of rematerialization :)

I have a patch to fold the alloca address computation into loads & stores, which
will make this much better still, but just getting this right took way too much time
and I'm sleepy.

llvm-svn: 13554
 2004-05-13 07:40:27 +00:00
Chris Lattner
a19bb14155 Pass boolean constants into function calls more efficiently, generating: 
mov DWORD PTR [%ESP + 4], 1

instead of:

        mov %EAX, 1
        mov DWORD PTR [%ESP + 4], %EAX

llvm-svn: 13494
 2004-05-12 16:35:04 +00:00
Chris Lattner
a407338e12 Fix a fairly serious pessimizaion that was preventing us from efficiently 
compiling things like 'add long %X, 1'.  The problem is that we were switching
the order of the operands for longs even though we can't fold them yet.

llvm-svn: 13451
 2004-05-10 15:15:55 +00:00
Chris Lattner
0962db8f10 Fix some comments, avoid sign extending booleans when zero extend works fine 
llvm-svn: 13440
 2004-05-09 23:16:33 +00:00
Chris Lattner
d18c637a37 Generate more efficient code for casting booleans to integers (no sign extension required) 
llvm-svn: 13439
 2004-05-09 22:28:45 +00:00
Chris Lattner
67c21e74ec Codegen floating point stores of constants into integer instructions. This 
allows us to compile:

store float 10.0, float* %P

into:
        mov DWORD PTR [%EAX], 1092616192

instead of:

.CPItest_0:                                     # float 0x4024000000000000
.long   1092616192      # float 10
...
        fld DWORD PTR [.CPItest_0]
        fstp DWORD PTR [%EAX]

llvm-svn: 13409
 2004-05-07 21:18:15 +00:00
Chris Lattner
2021030378 Make comparisons against the null pointer as efficient as integer comparisons 
against zero.  In particular, don't emit:

        mov %ESI, 0
        cmp %ECX, %ESI

instead, emit:

       test %ECX, %ECX

llvm-svn: 13407
 2004-05-07 19:55:55 +00:00
Chris Lattner
42e602b94f Remove unneeded check 
llvm-svn: 13355
 2004-05-04 19:35:11 +00:00
Chris Lattner
dac54ebbee Improve signed division by power of 2 *dramatically* from this: 
div:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 64
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        ret

to this:

div:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 5
        shr %ECX, 26
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 6
        ret

Note that the intel compiler is currently making this:

div:
        movl      4(%esp), %edx                                 #3.5
        movl      %edx, %eax                                    #4.14
        sarl      $5, %eax                                      #4.14
        shrl      $26, %eax                                     #4.14
        addl      %edx, %eax                                    #4.14
        sarl      $6, %eax                                      #4.14
        ret                                                     #4.14

Which has one less register->register copy.  (hint hint alkis :)

llvm-svn: 13354
 2004-05-04 19:33:58 +00:00
Chris Lattner
cb9a614ea4 Improve code generated for integer multiplications by 2,3,5,9 
llvm-svn: 13342
 2004-05-04 15:47:14 +00:00
Chris Lattner
4b5d4eb5b1 Remove unused #include 
llvm-svn: 13304
 2004-05-01 21:29:16 +00:00
Chris Lattner
ffbf667718 Iterate over the Machine CFG that Brian added instead of the LLVM CFG. 
Look at all of the pretty minuses. :)

llvm-svn: 13303
 2004-05-01 21:27:53 +00:00
Brian Gaeke
bfb4fe5109 Make RequiresFPRegKill() take a MachineBasicBlock arg. 
In InsertFPRegKills(), just check the MachineBasicBlock for successors
instead of its corresponding BasicBlock.

llvm-svn: 13213
 2004-04-28 04:45:55 +00:00
Brian Gaeke
74ed24c9de In InsertFPRegKills(), use the machine-CFG itself rather than the 
LLVM CFG when trying to find the successors of BB.

llvm-svn: 13212
 2004-04-28 04:34:16 +00:00
Brian Gaeke
6c03805717 Update the machine-CFG edges whenever we see a branch. 
llvm-svn: 13211
 2004-04-28 04:19:37 +00:00
Brian Gaeke
0db103b4b3 Use emitWordAt() to emit forward-branch fixups. 
llvm-svn: 13120
 2004-04-23 17:11:16 +00:00
John Criswell
8a4525ae64 Remove code to adjust the iterator for llvm.readio and llvm.writeio. 
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.

llvm-svn: 12954
 2004-04-14 21:27:56 +00:00
Chris Lattner
64431dbce7 This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works 
even when the "optimization" I added before is turned off.  It generates this
extremely pointless code:

test:
        fld QWORD PTR [%ESP + 4]
        mov %AL, 0
        test %AL, %AL
        fcmove %ST(0), %ST(0)
        ret

Good thing the optimizer will have removed this before code generation
anyway.  :)

llvm-svn: 12939
 2004-04-14 02:42:32 +00:00
John Criswell
94de925685 Added support for the llvm.readio and llvm.writeio intrinsics. 
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.

llvm-svn: 12936
 2004-04-13 22:13:14 +00:00
Chris Lattner
2ba048528f Implement a small optimization, which papers over the problem in 
X86/2004-04-13-FPCMOV-Crash.llx

A more robust fix is to follow.

llvm-svn: 12935
 2004-04-13 21:56:09 +00:00
Chris Lattner
8b6bc380e3 Emit the immediate form of in/out when possible. 
Fix several bugs in the intrinsics:
  1. Make sure to copy the input registers before the instructions that use them
  2. Make sure to copy the value returned by 'in' out of EAX into the register
     it is supposed to be in.

This fixes assertions when using in/out and linear scan.

llvm-svn: 12896
 2004-04-13 17:20:37 +00:00
Chris Lattner
15ac62827e Add immediate forms of in/out. Use let to shorten lines 
llvm-svn: 12895
 2004-04-13 17:19:31 +00:00
Chris Lattner
ecbade26d5 Add support for new instruction type 
llvm-svn: 12894
 2004-04-13 17:18:51 +00:00
Chris Lattner
e8e60bf45f Add support for the printImplicitDefsBefore flag 
llvm-svn: 12893
 2004-04-13 17:18:39 +00:00
Chris Lattner
43f754339a Fix issues that the local allocator has dealing with instructions that implicitly use ST(0) 
llvm-svn: 12855
 2004-04-12 03:02:48 +00:00
Chris Lattner
9cdc472518 No really, fix printing for LLC. I gotta get a way for CVS to whine at me if 
I have unsaved emacs buffers, geeze...

llvm-svn: 12854
 2004-04-12 01:52:04 +00:00
Chris Lattner
f1d59be0e8 Correct printing for LLC and the encoding for the JIT 
llvm-svn: 12853
 2004-04-12 01:50:04 +00:00
Chris Lattner
682a6361c7 Use the fucomi[p] instructions to perform floating point comparisons instead 
of the fucom[p][p] instructions.  This allows us to code generate this function

bool %test(double %X, double %Y) {
        %C = setlt double %Y, %X
        ret bool %C
}

... into:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucomip %ST(1)
        fstp %ST(0)
        setb %AL
        movsx %EAX, %AL
        ret

where before we generated:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucompp
**      fnstsw
**      sahf
        setb %AL
        movsx %EAX, %AL
        ret

The two marked instructions (which are the ones eliminated) are very bad,
because they serialize execution of the processor.  These instructions are
available on the PPRO and later, but since we already use cmov's we aren't
losing any portability.

I retained the old code for the day when we decide we want to support back
to the 386.

llvm-svn: 12852
 2004-04-12 01:43:36 +00:00
Chris Lattner
c85d92e0b7 Add support for the FUCOMIr instruction 
llvm-svn: 12851
 2004-04-12 01:39:15 +00:00
Chris Lattner
cfb7144bf1 Add two new instructions 
llvm-svn: 12850
 2004-04-12 01:38:55 +00:00
Chris Lattner
de47ad3d6f Fix a bug in my load/cast folding patch. 
llvm-svn: 12849
 2004-04-12 00:23:04 +00:00
Chris Lattner
b3a10e244a Adjust some comments, fix a bug in my previous patch 
llvm-svn: 12848
 2004-04-12 00:12:04 +00:00
Chris Lattner
24f8b11206 On X86, casting an integer to floating point requires going through memory. 
If the source of the cast is a load, we can just use the source memory location,
without having to create a temporary stack slot entry.

Before we code generated this:

double %int(int* %P) {
        %V = load int* %P
        %V2 = cast int %V to double
        ret double %V2
}

into:

int:
        sub %ESP, 4
        mov %EAX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        mov DWORD PTR [%ESP], %EAX
        fild DWORD PTR [%ESP]
        add %ESP, 4
        ret

Now we produce this:

int:
        mov %EAX, DWORD PTR [%ESP + 4]
        fild DWORD PTR [%EAX]
        ret

... which is nicer.

llvm-svn: 12846
 2004-04-11 23:21:26 +00:00
Chris Lattner
95cf3f8765 Implement folding of loads into floating point operations. This implements: 
test/Regression/CodeGen/X86/fp_load_fold.llx

llvm-svn: 12844
 2004-04-11 22:05:45 +00:00
Chris Lattner
b611f10e74 Unify all of the code for floating point +,-,*,/ into one function 
llvm-svn: 12842
 2004-04-11 21:23:56 +00:00
Chris Lattner
3378d71a55 This implements folding of constant operands into floating point operations 
for mul and div.

Instead of generating this:

test_divr:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [.CPItest_divr_0]
        fdivrp %ST(1)
        ret

We now generate this:

test_divr:
        fld QWORD PTR [%ESP + 4]
        fdivr QWORD PTR [.CPItest_divr_0]
        ret

This code desperately needs refactoring, which will come in the next
patch.

llvm-svn: 12841
 2004-04-11 21:09:14 +00:00
Chris Lattner
833d84f48a Restructure the mul/div/rem handling code to follow the pattern the other 
instructions use.  This doesn't change any functionality except that long
constant expressions of these operations will now magically start working.

llvm-svn: 12840
 2004-04-11 20:56:28 +00:00
Chris Lattner
69304a897c Codegen FP adds and subtracts with a constant more efficiently, generating: 
fld QWORD PTR [%ESP + 4]
        fadd QWORD PTR [.CPItest_add_0]

instead of:

        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [.CPItest_add_0]
        faddp %ST(1)

I also intend to do this for mul & div, but it appears that I have to
refactor a bit of code before I can do so.

This is tested by: test/Regression/CodeGen/X86/fp_constant_op.llx

llvm-svn: 12839
 2004-04-11 20:26:20 +00:00
Chris Lattner
dda382531e Add some new instructions 
llvm-svn: 12838
 2004-04-11 20:24:15 +00:00
Chris Lattner
a0681183b6 Relax assertion to make this function work with a broader class of instructions 
llvm-svn: 12836
 2004-04-11 20:21:06 +00:00
Chris Lattner
d22a1894a0 Two changes: 
1. If an incoming argument is dead, don't load it from the stack
  2. Do not code gen noop copies at all (ie, cast int -> uint), not even to
     a move.  This should reduce register pressure for allocators that are
     unable to coallesce away these copies in some cases.

llvm-svn: 12835
 2004-04-11 19:21:59 +00:00
Chris Lattner
8b1122d4dc Silence a spurious warning 
llvm-svn: 12815
 2004-04-10 18:32:01 +00:00