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Commit Graph

116454 Commits

Author SHA1 Message Date
Rafael Espindola
dd57dbf6ee Use a range loop. NFC.
llvm-svn: 236047
2015-04-28 21:58:05 +00:00
Andrew Kaylor
9f3b999556 [WinEH] Split blocks at calls to llvm.eh.begincatch
Differential Revision: http://reviews.llvm.org/D9311

llvm-svn: 236046
2015-04-28 21:54:14 +00:00
Rafael Espindola
913cb962ab Avoid an extra walk over the sections just to assign sections to groups.
Assign the sections in the same pass we compute the index.

llvm-svn: 236045
2015-04-28 21:52:33 +00:00
James Y Knight
e176f7c8fa Sparc: Add alternate aliases for conditional branch instructions.
llvm-svn: 236042
2015-04-28 21:27:31 +00:00
Reid Kleckner
5bdabbe9d4 [SEH] Add an LLVM intrinsic for _exception_info
Eventually, we will lower this out during IR preparation.

llvm-svn: 236036
2015-04-28 21:20:42 +00:00
Rafael Espindola
cb4f0eb485 Remove the GroupMapTy DenseMap. NFC.
Instead use the Group symbol of MCSectionELF.

llvm-svn: 236033
2015-04-28 21:07:28 +00:00
Sanjay Patel
9b05b26bc6 transform fadd chains to increase parallelism
This is a compromise: with this simple patch, we should always handle a chain of exactly 3
operations optimally, but we're not generating the optimal balanced binary tree for a longer
sequence.

In general, this transform will reduce the dependency chain for a sequence of instructions
using N operands from a worst case N-1 dependent operations to N/2 dependent operations. 
The optimal balanced binary tree would reduce the chain to log2(N).

The trade-off for not dealing with longer sequences is: (1) we have less complexity in the
compiler, (2) we avoid unknown compile-time blowup calculating a balanced tree, and (3) we
don't need to worry about the increased register pressure required to parallelize longer
sequences. It also seems unlikely that we would ever encounter really long strings of
dependent ops like that in the wild, but I'm not sure how to verify that speculation.
FWIW, I see no perf difference for test-suite running on btver2 (x86-64) with -ffast-math
and this patch.

We can extend this patch to cover other associative operations such as fmul, fmax, fmin, 
integer add, integer mul.

This is a partial fix for:
https://llvm.org/bugs/show_bug.cgi?id=17305

and if extended:
https://llvm.org/bugs/show_bug.cgi?id=21768
https://llvm.org/bugs/show_bug.cgi?id=23116

The issue also came up in:
http://reviews.llvm.org/D8941

Differential Revision: http://reviews.llvm.org/D9232

llvm-svn: 236031
2015-04-28 21:03:22 +00:00
Alexei Starovoitov
511f77fb6c [bpf] fix build
Patch by Brenden Blanco.

llvm-svn: 236030
2015-04-28 20:38:56 +00:00
Rafael Espindola
00737f8728 Use range loops. NFC.
llvm-svn: 236028
2015-04-28 20:23:35 +00:00
Filipe Cabecinhas
febbecdc50 Relax an assert when there's a type mismatch in forward references
Summary:
We don't seem to need to assert here, since this function's callers expect
to get a nullptr on error. This way we don't assert on user input.

Bug found with AFL fuzz.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9308

llvm-svn: 236027
2015-04-28 20:18:47 +00:00
Rafael Espindola
00ff8758ba Avoid adding to SectionIndexMap sections that we never lookup. NFC.
llvm-svn: 236026
2015-04-28 20:09:13 +00:00
Daniel Berlin
44a1ec46fb Make getModRefInfo(Instruction *) not crash on certain types of instructions
llvm-svn: 236023
2015-04-28 19:19:14 +00:00
Rafael Espindola
1892d87b54 Use a range loop. NFC.
llvm-svn: 236015
2015-04-28 19:07:16 +00:00
Sanjay Patel
7bcb75e23d [x86] remove RCPPS and RSQRTPS intrinsic instruction definitions
We don't need codegen-only intrinsic instructions for the vector forms of these instructions.

This makes the reciprocal estimate instruction lowering identical to how we handle normal
square roots: (V)SQRTPS / (V)SQRTPD.

No existing regression tests fail with this patch.

Differential Revision: http://reviews.llvm.org/D9301

llvm-svn: 236013
2015-04-28 18:48:45 +00:00
Eric Christopher
af85cc036b Add a fixme to resetTargetOptions to explain why it needs to go
away.

llvm-svn: 236009
2015-04-28 18:09:05 +00:00
Eric Christopher
9b1662a7f0 Fix a [-Werror,-Winconsistent-missing-override] problem in the
NVPTX overrides.

llvm-svn: 236007
2015-04-28 18:06:27 +00:00
Tom Stellard
347b82f6fc R600: Fix up for AsmPrinter's OutStreamer being a unique_ptr
Fixes a crash with basically any OpenGL application using the radeonsi
driver.

Patch by: Michel Dänzer

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90176
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 236004
2015-04-28 17:37:03 +00:00
Tom Stellard
3aa62bf730 R600/SI: Add a lower case alias for subtarget feature: +DumpCode
llc converts all feature strings to lower case, while the LLVM C API
does not, so we need a lower case alias in order to test this with llc.

llvm-svn: 236003
2015-04-28 17:37:00 +00:00
Justin Holewinski
41800386f1 [NVPTX] Handle addrspacecast constant expressions in aggregate initializers
We need to track if an AddrSpaceCast expression was seen when
generating an MCExpr for a ConstantExpr.  This change introduces a
custom lowerConstant method to the NVPTX asm printer that will create
NVPTXGenericMCSymbolRefExpr nodes at the appropriate places to encode
the information that a given symbol needs to be casted to a generic
address.

llvm-svn: 236000
2015-04-28 17:18:30 +00:00
David Blaikie
ea8340026a [opaque pointer type] Encode the allocated type of an alloca rather than its pointer result type.
llvm-svn: 235998
2015-04-28 16:51:01 +00:00
Sanjay Patel
877a22a3bc move IR-level optimization flags into their own struct
This is a preliminary step to using the IR-level floating-point fast-math-flags in the SDAG (D8900).

In this patch, we introduce the optimization flags as their own struct. As noted in the TODO comment, 
we should eventually share this data between the IR passes and the backend.

We also switch the existing nsw / nuw / exact bit functionality of the BinaryWithFlagsSDNode class to
use the new struct.

The tradeoff is that instead of using the free but limited space of SDNode's SubclassData, we add a
data member to the subclass. This means we don't have to repeat all of the get/set methods per flag,
but we're potentially adding size to all nodes of this subclassi type.

In practice on 64-bit systems (measured on Linux and MacOS X), there is no size difference between an
SDNode and BinaryWithFlagsSDNode after this change: they're both 80 bytes. This means that we had at
least one free byte to play with due to struct alignment.

Differential Revision: http://reviews.llvm.org/D9325

llvm-svn: 235997
2015-04-28 16:39:12 +00:00
Rafael Espindola
d33ef76ab3 Use a std::vector to record the offsets of the sections. NFC.
llvm-svn: 235995
2015-04-28 15:26:21 +00:00
Rafael Espindola
797619b3db Avoid an extra loop for computing the section size. NFC.
llvm-svn: 235994
2015-04-28 15:04:09 +00:00
Elena Demikhovsky
224807ff06 Fixed crash of variable shift inst on AVX2
https://llvm.org/bugs/show_bug.cgi?id=22955

llvm-svn: 235993
2015-04-28 14:46:35 +00:00
Toma Tabacu
a56ca2c37f [mips] [IAS] Do not generate redundant ORi in createLShiftOri.
Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

llvm-svn: 235990
2015-04-28 14:06:35 +00:00
Sergey Dmitrouk
7bfbc12128 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

llvm-svn: 235989
2015-04-28 14:05:47 +00:00
Rafael Espindola
0c4366cda7 Use CIE version 4 for dwarf4.
According to http://www.dwarfstd.org/doc/DWARF4.pdf appendix F the CIE
version for dwarf 4 is 4.

llvm-svn: 235988
2015-04-28 13:55:31 +00:00
Daniel Jasper
39180626db Revert "[DebugInfo] Add debug locations to constant SD nodes"
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

llvm-svn: 235987
2015-04-28 13:38:35 +00:00
Toma Tabacu
6528a897ff [mips] [IAS] Rename the createShiftOr function to createLShiftOri. NFC.
Summary: The new name is more accurate with regard to the functionality.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8968

llvm-svn: 235984
2015-04-28 13:16:06 +00:00
Toma Tabacu
519051095f [mips] [IAS] Store the expandLoadImm destination register in a variable. NFC.
Summary: This removes multiple calls to getReg() and saves us column space in the source file.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8924

llvm-svn: 235978
2015-04-28 12:04:53 +00:00
Sergey Dmitrouk
01a4dcd3bb [DebugInfo] Add debug locations to constant SD nodes
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

llvm-svn: 235977
2015-04-28 11:56:37 +00:00
Elena Demikhovsky
23e33119e3 AVX-512: Added "pandn" intrinsics set
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235971
2015-04-28 08:12:42 +00:00
Elena Demikhovsky
901c20e649 Masked gather and scatter: Added code for SelectionDAG.
All other patches, including tests will follow.

http://reviews.llvm.org/D7665

llvm-svn: 235970
2015-04-28 07:57:37 +00:00
David Blaikie
8e3c8d089a [opaque pointer type] Encode the pointee type in the bitcode for 'cmpxchg'
As a space optimization, this instruction would just encode the pointer
type of the first operand and use the knowledge that the second and
third operands would be of the pointee type of the first. When typed
pointers go away, this assumption will no longer be available - so
encode the type of the second operand explicitly and rely on that for
the third.

Test case added to demonstrate the backwards compatibility concern,
which only comes up when the definition of the second operand comes
after the use (hence the weird basic block sequence) - at which point
the type needs to be explicitly encoded in the bitcode and the record
length changes to accommodate this.

llvm-svn: 235966
2015-04-28 04:30:29 +00:00
Ahmed Bougacha
b4ed01b89b [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.
This matches other assemblers and is less unexpected (e.g. PR23227).
On ELF, I tried binutils gas v2.24 and nasm 2.10.09, and they both
agree on LShr.  On COFF, I couldn't get my hands on an assembler yet,
so don't change the behavior.  For now, don't change it on non-AArch64
Darwin either, as the other assembler is gas v1.38, which does an AShr.

llvm-svn: 235963
2015-04-28 01:37:11 +00:00
Duncan P. N. Exon Smith
8c5315ef84 DebugInfo: Support up to 2^16 arguments in a subprogram
Support up to 2^16 arguments to a function.  If we do hit the limit,
assert out rather than restarting at 0 as we've done historically.

This fixes PR23332.  A clang test will follow.

llvm-svn: 235955
2015-04-28 01:07:33 +00:00
Matthias Braun
381ec865bc Cleanup, remove unused return value
llvm-svn: 235952
2015-04-28 00:37:05 +00:00
Ahmed Bougacha
2623a4467d [MC] Split MCBinaryExpr::Shr into LShr and AShr.
Defaulting to AShr without consulting the target MCAsmInfo isn't OK.
Add a flag to fix that.  Keep it off for now: target migrations will
follow in separate commits.

llvm-svn: 235951
2015-04-28 00:21:32 +00:00
Ahmed Bougacha
e7c1678c8c [MC] Move getBinOpPrecedence into AsmParser. NFC.
In preparation for a future patch.

llvm-svn: 235950
2015-04-28 00:17:39 +00:00
Hans Wennborg
faa07f6603 Switch lowering: use uint32_t for weights everywhere
I previously thought switch clusters would need to use uint64_t in case
the weights of multiple cases overflowed a 32-bit int. It turns
out that the weights on a terminator instruction are capped to allow for
being added together, so using a uint32_t should be safe.

llvm-svn: 235945
2015-04-27 23:52:19 +00:00
Duncan P. N. Exon Smith
697f734b82 LTO: Add API to choose whether to embed uselists
Reverse libLTO's default behaviour for preserving use-list order in
bitcode, and add API for controlling it.  The default setting is now
`false` (don't preserve them), which is consistent with `clang`'s
default behaviour.

Users of libLTO should call `lto_codegen_should_embed_uselists(CG,true)`
prior to calling `lto_codegen_write_merged_modules()` whenever the
output file isn't part of the production workflow in order to reproduce
results with subsequent calls to `llc`.

(I haven't added tests since `llvm-lto` (the test tool for LTO) doesn't
support bitcode output, and even if it did: there isn't actually a good
way to test whether a tool has passed the flag.  If the order is already
"natural" (if the order will already round-trip) then no use-list
directives are emitted at all.  At some point I'll circle back to add
tests to `llvm-as` (etc.) that they actually respect the flag, at which
point I can somehow add a test here as well.)

llvm-svn: 235943
2015-04-27 23:38:54 +00:00
Hans Wennborg
cc333a9a05 Switch lowering: Take branch weight into account when ordering for fall-through
Previously, the code would try to put a fall-through case last,
even if that meant moving a case with much higher branch weight
further down the chain.

Ordering by branch weight is most important, putting a fall-through
block last is secondary.

llvm-svn: 235942
2015-04-27 23:35:22 +00:00
Duncan P. N. Exon Smith
a9647df35e LTO: Simplify code generator initialization
Simplify `LTOCodeGenerator` initialization by initializing simple fields
at their definition.

llvm-svn: 235939
2015-04-27 23:19:26 +00:00
Alexey Samsonov
18b3825dd6 [docs] Fix the link to SanitizerCoverage docs.
llvm-svn: 235934
2015-04-27 22:50:06 +00:00
Sanjay Patel
bc20f6f5ab remove obsolete pattern matches for scalar SSE ops
The blendi pattern should always replace the insertps pattern after:
http://reviews.llvm.org/rL232850
http://reviews.llvm.org/rL235124

llvm-svn: 235930
2015-04-27 22:23:17 +00:00
Duncan P. N. Exon Smith
4b7342e312 LTO: Correct some doxygen comments about API availability
These look like copy/paste errors, and shouldn't have the "prior to"
qualifier.  Each API was introduced at the given values of
`LTO_API_VERSION`.  The "prior to" in other doxygen comments is because
I couldn't easily differentiate between versions 1 and 2 when I added
these comments.

llvm-svn: 235925
2015-04-27 22:08:01 +00:00
Rafael Espindola
a1792e05ec Use CIE version 1 for .eh_frame.
According to

http://www.linuxbase.org/betaspecs/lsb/LSB-Core-generic/LSB-Core-generic/ehframechpt.html

we should always use 1.

llvm-svn: 235923
2015-04-27 22:04:24 +00:00
Ahmed Bougacha
54c4fb4a3f [AArch64] Also combine vector selects fed by non-i1 SETCCs.
After legalization, scalar SETCC has an i32 result type on AArch64.
The i1 requirement seems too conservative, replace it with an assert.

This also means that we now can run after legalization. That should also
be fine, since the ops legalizer runs again after each combine, and
all types created all have the same sizes as the (legal) inputs.

Exposed by r235917; while there, robustize its tests (bsl also uses the
register it defines).

llvm-svn: 235922
2015-04-27 21:43:12 +00:00
Pete Cooper
0598f9f007 Add missing library dependency in libPDB.
PDB uses COFFObjectFile::getPE32Header which lives in libObject.

Make sure that LLVMBuild.txt reflects this dependency.

llvm-svn: 235920
2015-04-27 21:23:12 +00:00
Rafael Espindola
5f983534c5 Allow building the gold plugin even if the gold binary is not found.
The gold binary is not required to build the plugin. All that is
needed is for LLVM_BINUTILS_INCDIR to point to the directory
containing plugin-api.h.

llvm-svn: 235918
2015-04-27 21:08:47 +00:00