Jim Grosbach
c69ad2176a
When using the 'push' mnemonic for Thumb2 stmdb, be explicit when it's the
...
32-bit wide version by adding the .w suffix.
llvm-svn: 120838
2010-12-03 20:33:01 +00:00
Benjamin Kramer
e27eff8888
Remove unused variable.
...
llvm-svn: 120836
2010-12-03 19:55:37 +00:00
Jim Grosbach
c8ce9a3453
Reduce t2 ldr/str instructions to the correct t1 versions when there's an
...
immediate offset.
llvm-svn: 120833
2010-12-03 19:47:11 +00:00
Jason W Kim
27bbab7e31
fix ARM::fixup_arm_branch, cleanup, and share more code between ELF and Darwin
...
llvm-svn: 120832
2010-12-03 19:40:23 +00:00
Jim Grosbach
25da270139
No need to declare EncoderMethod property anymore; just assign to it.
...
llvm-svn: 120831
2010-12-03 19:31:00 +00:00
Jim Grosbach
d0db6c9f0e
Add FIXMEs.
...
llvm-svn: 120824
2010-12-03 18:37:17 +00:00
Jim Grosbach
dca34b5da7
Size reduction for tPUSH come from t2STMDB_UPD, not t2STMIA_UPD.
...
llvm-svn: 120822
2010-12-03 18:31:03 +00:00
Bill Wendling
b7df584ef7
Don't overwrite the opcode passed into the T1Special pattern.
...
llvm-svn: 120782
2010-12-03 02:02:58 +00:00
Bill Wendling
c4858cb4c3
Add Thumb encoding for some more instructions.
...
llvm-svn: 120780
2010-12-03 01:55:47 +00:00
Bill Wendling
2f6a820abe
The tLDR instruction wasn't encoded properly:
...
<MCInst 2251 <MCOperand Reg:70> <MCOperand Reg:66> <MCOperand Imm:0> <MCOperand Reg:0> <MCOperand Imm:14> <MCOperand Reg:0>>
Notice that the "reg" here is 0, which is an invalid register. Put a check in
the code for this to prevent crashing.
llvm-svn: 120766
2010-12-03 00:53:22 +00:00
Jim Grosbach
0bd3b0fd6c
Trailing whitespace.
...
llvm-svn: 120748
2010-12-02 23:05:38 +00:00
Jim Grosbach
b6d0c8d5b1
When expanding the MOVCCi32imm, make sure to use the ARM movt/movw opcodes,
...
not thumb2.
llvm-svn: 120711
2010-12-02 16:42:25 +00:00
Jim Grosbach
78ef3199c8
Fix copy/pasto in vmin.f32 encoding.
...
llvm-svn: 120709
2010-12-02 16:30:58 +00:00
Jim Grosbach
0e71db6919
Add support for binary encoding of ARM 'adr' instructions referencing constant
...
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.
llvm-svn: 120635
2010-12-02 00:28:45 +00:00
Evan Cheng
4118b24aca
Fix and re-enable tail call optimization of expanded libcalls.
...
llvm-svn: 120622
2010-12-01 22:59:46 +00:00
Jason W Kim
7d4b30652e
fixing style nit: move class static to global static
...
llvm-svn: 120619
2010-12-01 22:46:50 +00:00
Bill Wendling
d85ff071c0
Add a post encoder method to the VFP instructions to convert them to the Thumb2
...
encoding if we're in that mode.
llvm-svn: 120608
2010-12-01 21:54:50 +00:00
Jim Grosbach
b1b1ff4271
Use the correct fixup type for ARM VLDR*
...
llvm-svn: 120604
2010-12-01 21:09:40 +00:00
Jim Grosbach
b2a12afa5f
Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR
...
instruction at MC lowering. Add binary encoding information for the ADR,
including fixup data for the label operand.
llvm-svn: 120594
2010-12-01 19:47:31 +00:00
Owen Anderson
8802c68592
Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax.
...
llvm-svn: 120589
2010-12-01 19:18:46 +00:00
Jason W Kim
d468d24fc9
kill trailing space
...
llvm-svn: 120586
2010-12-01 19:07:22 +00:00
Jim Grosbach
25b2b536f3
10 bits, not 12.
...
llvm-svn: 120584
2010-12-01 18:51:32 +00:00
Jim Grosbach
a3e6ffffe5
Elaborate on FIXME.
...
llvm-svn: 120552
2010-12-01 04:01:17 +00:00
Jim Grosbach
b2044fcba1
Move the ARMAsmPrinter class defintiion into a header file.
...
llvm-svn: 120551
2010-12-01 03:45:07 +00:00
Bill Wendling
e62557dc3c
Remove "comparison of integers of different signs" warning by making the
...
variable unsigned.
llvm-svn: 120541
2010-12-01 02:49:04 +00:00
Bill Wendling
4fc1c4ee84
General cleanups of comments.
...
llvm-svn: 120536
2010-12-01 02:42:55 +00:00
Jason W Kim
4d960e071c
ARM/MC/ELF relocation "hello world" for movw/movt.
...
Lifted adjustFixupValue() from Darwin for sharing w ELF.
Test added
TODO:
refactor ELFObjectWriter::RecordRelocation more.
Possibly share more code with Darwin?
Lots more relocations...
llvm-svn: 120534
2010-12-01 02:40:06 +00:00
Bill Wendling
b7635b1ed3
Formatting. It's all the rage!
...
llvm-svn: 120533
2010-12-01 02:36:55 +00:00
Bill Wendling
8861fb7484
More refactoring. This time the T1pI pattern.
...
llvm-svn: 120532
2010-12-01 02:28:08 +00:00
Eric Christopher
5f7eeae6ba
Refactor load/store handling again. Simplify and make some room for
...
reg+reg handling.
llvm-svn: 120526
2010-12-01 01:40:24 +00:00
Jan Wen Voung
c34fbc5bb1
Initialize an ARMConstantPoolValue field.
...
llvm-svn: 120525
2010-12-01 01:38:58 +00:00
Bill Wendling
ccfea264ff
s/T1pIEncode/T1pILdStEncode/g
...
s/T1pIEncodeImm/T1pILdStEncodeImm/g
llvm-svn: 120524
2010-12-01 01:38:08 +00:00
Bill Wendling
517dd72f06
Renaming variables to coincide with documentation. No functionality change.
...
llvm-svn: 120522
2010-12-01 01:32:02 +00:00
Bill Wendling
8ebed2442e
Refactor T1sI and T1sIt encodings into helper classes.
...
llvm-svn: 120518
2010-12-01 01:20:15 +00:00
Bill Wendling
60d0e1a06c
Refactor the T1sIt encodings into a parent class to get rid of all of the "let"
...
statements.
llvm-svn: 120512
2010-12-01 00:48:44 +00:00
Owen Anderson
2299afbb49
Use by-name rather than by-order matching for NEON operands.
...
llvm-svn: 120507
2010-12-01 00:28:25 +00:00
Evan Cheng
f7e586d749
Enable sibling call optimization of libcalls which are expanded during
...
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777
llvm-svn: 120501
2010-11-30 23:55:39 +00:00
Bill Wendling
6a48b15c80
Rename operands to match ARM documentation. No functionality change.
...
llvm-svn: 120500
2010-11-30 23:54:45 +00:00
Jim Grosbach
c8c81941f6
Fix typo.
...
llvm-svn: 120499
2010-11-30 23:51:41 +00:00
Jim Grosbach
ce4e8350aa
Trailing whitespace.
...
llvm-svn: 120497
2010-11-30 23:29:24 +00:00
Jason W Kim
725321c3c7
Thanks to JimG for catching this!
...
llvm-svn: 120494
2010-11-30 23:27:18 +00:00
Bill Wendling
745e2de9dc
Inline classes that were used in only one place.
...
llvm-svn: 120488
2010-11-30 23:16:25 +00:00
Bill Wendling
e85934f8a5
* Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same as
...
t_addrmode_s4, but with a different scaling factor.
* Encode the Thumb1 load and store instructions. This involved a bit of
refactoring (hi, Chris! :-). Some of the patterns became dead afterwards and
were removed.
llvm-svn: 120482
2010-11-30 22:57:21 +00:00
Owen Anderson
5aff471eb8
Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. This allows the
...
Thumb2 encoding to share code with the ARM encoding, which gets use fixup support for free.
It also allows us to fold away at least one codegen-only pattern.
llvm-svn: 120481
2010-11-30 22:45:47 +00:00
Jim Grosbach
09095b4dd9
Fix handling of ARM negative pc-relative fixups for loads and stores.
...
llvm-svn: 120480
2010-11-30 22:40:36 +00:00
Owen Anderson
20a6f2bd2e
Provide Thumb2 encodings for a few miscellaneous instructions.
...
llvm-svn: 120455
2010-11-30 20:00:01 +00:00
Jim Grosbach
532d63789b
Add FIXME
...
llvm-svn: 120451
2010-11-30 19:25:56 +00:00
Owen Anderson
5f7b3e919b
Add encoding support for Thumb2 PLD and PLI instructions.
...
llvm-svn: 120449
2010-11-30 19:19:31 +00:00
Eric Christopher
95f0d1fe65
Noticed this on inspection, fix and update some comments.
...
llvm-svn: 120447
2010-11-30 19:14:07 +00:00
Jim Grosbach
aa96c057be
Pseudo-ize ARM MOVPCRX
...
llvm-svn: 120442
2010-11-30 18:56:36 +00:00