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14502 Commits

Author SHA1 Message Date
Stepan Dyatkovskiy
b769edad5b Added regression test for bug #10869. 
llvm-svn: 140012
 2011-09-19 07:48:08 +00:00
Nadav Rotem
1cfdc59e94 setOperationAction should be done on the return value of the type, not the operands. 
llvm-svn: 140001
 2011-09-18 14:57:03 +00:00
Nadav Rotem
cfc77bc719 When promoting integer vectors we often create ext-loads. This patch adds a 
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995
 2011-09-18 10:39:32 +00:00
Benjamin Kramer
547157073b Apply Duncan's test fix from r139986 to the avx version of that test too. 
llvm-svn: 139992
 2011-09-18 00:41:38 +00:00
Duncan Sands
4149334f09 Synthesize x86 max/min instructions also for vectors (i.e. produce 
maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.

llvm-svn: 139986
 2011-09-17 16:49:39 +00:00
Owen Anderson
df512e9961 Add a testcase for another corner-case decoding. 
llvm-svn: 139970
 2011-09-16 23:15:29 +00:00
Jim Grosbach
95242bff08 Thumb2 assembly parsing and encoding for SUB(immediate). 
llvm-svn: 139966
 2011-09-16 22:58:42 +00:00
Owen Anderson
eae0eee720 Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32). 
llvm-svn: 139964
 2011-09-16 22:29:48 +00:00
Jim Grosbach
3a58f722bf Thumb2 assembly parsing and encoding for STRT. 
llvm-svn: 139963
 2011-09-16 22:27:12 +00:00
Jim Grosbach
41ece87fae Thumb2 assembly parsing and encoding for LDRHT/STRHT. 
llvm-svn: 139962
 2011-09-16 22:26:01 +00:00
Jim Grosbach
e9f1da5dec Thumb2 assembly parsing and encoding for STREX/STREXB/STREXH/STREXD. 
llvm-svn: 139961
 2011-09-16 22:22:07 +00:00
Jim Grosbach
f8313f60b3 Thumb2 assembly parsing and encoding for STRD. 
llvm-svn: 139960
 2011-09-16 22:19:38 +00:00
Jim Grosbach
d0ef17692a Simplify comment. There's no Thumb LDRD(register) encoding. That's ARM only. 
llvm-svn: 139959
 2011-09-16 22:18:42 +00:00
Owen Anderson
3a487c8c9b Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's. 
llvm-svn: 139958
 2011-09-16 22:17:02 +00:00
Jim Grosbach
c3834c5da5 Thumb2 assembly parsing and encoding for STRBT. 
llvm-svn: 139957
 2011-09-16 22:15:51 +00:00
Jim Grosbach
3caa04dc32 Thumb2 assembly parsing and encoding for STRH. 
llvm-svn: 139956
 2011-09-16 22:12:19 +00:00
Jim Grosbach
771b6c5fe3 Remove test of undocumented format. 
llvm-svn: 139955
 2011-09-16 22:09:58 +00:00
Jim Grosbach
b181e68ab6 Thumb2 assembly parsing and encoding for STRB. 
llvm-svn: 139954
 2011-09-16 22:09:19 +00:00
Jim Grosbach
f75d317df4 Shuffle a few more thumb2 tests to match the comment headings. 
llvm-svn: 139952
 2011-09-16 22:01:18 +00:00
Jim Grosbach
bc84a55ed8 Thumb2 tests for STR(literal), STR(register) and STR pre/post indexed immediate. 
llvm-svn: 139951
 2011-09-16 21:59:13 +00:00
Jim Grosbach
c9eb37a7c9 Shuffle a few tests around. 
llvm-svn: 139950
 2011-09-16 21:57:10 +00:00
Owen Anderson
5804085f26 Fix disassembly of Thumb2 LDRSH with a #-0 offset. 
llvm-svn: 139943
 2011-09-16 21:08:33 +00:00
Jim Grosbach
916a6c71aa Thumb2 assembly parsing and encoding for STR(immediate). 
Add aliases for STRB/STRH while there. Tests forthcoming for those.

llvm-svn: 139942
 2011-09-16 21:06:12 +00:00
Jim Grosbach
03c39637ee Thumb2 assembly parsing and encoding for STMDB. 
llvm-svn: 139940
 2011-09-16 20:58:38 +00:00
Jim Grosbach
13af7198d5 Thumb2 assembly parsing and encoding for STMIA. 
llvm-svn: 139938
 2011-09-16 20:50:13 +00:00
Jim Grosbach
0c71c46758 Thumb2 assembly parsing and encoding for SSUB16/SSUB8. 
llvm-svn: 139931
 2011-09-16 18:52:36 +00:00
Jim Grosbach
47ff106753 Thumb2 assembly parsing and encoding for SSAX. 
llvm-svn: 139929
 2011-09-16 18:37:10 +00:00
Jim Grosbach
eb47e416c2 Thumb2 assembly parsing and encoding for SSAT16. 
llvm-svn: 139927
 2011-09-16 18:33:22 +00:00
Jim Grosbach
6f6453f64b Thumb2 assembly parsing and encoding for SSAT. 
llvm-svn: 139926
 2011-09-16 18:32:30 +00:00
Jim Grosbach
5a8b63fe51 Thumb2 assembly parsing and encoding for SRS. 
llvm-svn: 139925
 2011-09-16 18:25:22 +00:00
Jim Grosbach
3cac04dd75 Thumb2 assembly parsing and encoding for SMMUSD/SMUSDX. 
llvm-svn: 139923
 2011-09-16 18:08:48 +00:00
Jim Grosbach
b8b9febaa7 Thumb2 assembly parsing and encoding for SMMULWB/SMULWT. 
llvm-svn: 139922
 2011-09-16 18:07:18 +00:00
Jim Grosbach
0f1615c381 Thumb2 assembly parsing and encoding for SMMULL. 
llvm-svn: 139921
 2011-09-16 18:05:48 +00:00
Jim Grosbach
4c944a22e2 Fix comment. 
llvm-svn: 139919
 2011-09-16 18:03:00 +00:00
Jim Grosbach
f39a3fcb4f Thumb2 assembly parsing and encoding for SMULBB/SMULBT/SMULTB/SMULTT. 
llvm-svn: 139918
 2011-09-16 18:02:36 +00:00
Jim Grosbach
0066bd4289 Thumb2 assembly parsing and encoding for SMMUAD'dib. 
llvm-svn: 139917
 2011-09-16 17:58:21 +00:00
Jim Grosbach
89777cb2f9 Thumb2 assembly parsing and encoding for SMMUL/SMMULR. 
llvm-svn: 139916
 2011-09-16 17:56:06 +00:00
Owen Anderson
ceb2fb9548 Port over more Thumb2 assembly tests to disassembly tests. 
llvm-svn: 139915
 2011-09-16 17:56:04 +00:00
Owen Anderson
8bc7120609 Port over more Thumb2 assembly tests to disassembly tests. 
llvm-svn: 139912
 2011-09-16 17:22:48 +00:00
Jim Grosbach
fa3986ddbe Thumb2 assembly parsing and encoding for SMMLS/SMMLSR. 
llvm-svn: 139911
 2011-09-16 17:16:55 +00:00
Jim Grosbach
25e57a3e7a Thumb2 assembly parsing and encoding for SMMLA/SMMLAR. 
llvm-svn: 139910
 2011-09-16 17:15:18 +00:00
Jim Grosbach
3c3a9393ab Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX. 
llvm-svn: 139909
 2011-09-16 17:10:44 +00:00
Jim Grosbach
5d7af41c05 Thumb2 assembly parsing and encoding for SMLSD/SMLSDX. 
llvm-svn: 139908
 2011-09-16 17:08:45 +00:00
Jim Grosbach
599dd49609 Thumb2 assembly parsing and encoding for SMLAWB/SMLAWT. 
llvm-svn: 139907
 2011-09-16 17:03:01 +00:00
Jim Grosbach
9e471afd9c Thumb2 assembly parsing and encoding for SMLALD/SMLALDX. 
llvm-svn: 139906
 2011-09-16 16:58:03 +00:00
Jim Grosbach
77ece5c9a0 Thumb2 assembly parsing and encoding for SMLALBB/SMLALBT/SMLALTB/SMLALTT. 
llvm-svn: 139905
 2011-09-16 16:53:25 +00:00
Jim Grosbach
d382581509 Thumb2 assembly parsing and encoding for SMLAL. 
llvm-svn: 139902
 2011-09-16 16:38:00 +00:00
Andrew Trick
10ea51b841 Test case trial and error. Not sure the proper way to check MBB names. 
llvm-svn: 139900
 2011-09-16 03:57:19 +00:00
Andrew Trick
5be06c8057 Reduced a stronger test case for coalescer bug PR10920. 
llvm-svn: 139898
 2011-09-16 03:46:49 +00:00
Jim Grosbach
5147a59e59 Thumb2 assembly parsing and encoding for SMLAD/SMLADX. 
llvm-svn: 139884
 2011-09-16 00:09:37 +00:00
Jim Grosbach
9fb6f7e9fc Thumb2 assembly parsing and encoding for SMLABB/SMLABT/SMLATB/SMLATT. 
llvm-svn: 139881
 2011-09-16 00:00:23 +00:00
Jim Grosbach
85838cdb51 Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8. 
llvm-svn: 139880
 2011-09-15 23:58:56 +00:00
Jim Grosbach
eee3717b95 Thumb2 assembly parsing and encoding for SHADD16/SHADD8. 
llvm-svn: 139871
 2011-09-15 22:36:10 +00:00
Jim Grosbach
423aae30b2 Thumb2 assembly parsing and encoding for SHASX/SHSAX. 
llvm-svn: 139870
 2011-09-15 22:34:29 +00:00
Jim Grosbach
68e3ea237e Thumb2 assembly parsing and encoding for SEV.W. 
llvm-svn: 139866
 2011-09-15 22:24:20 +00:00
Jim Grosbach
29e503aec9 Thumb2 assembly parsing and encoding for SEL. 
llvm-svn: 139861
 2011-09-15 22:01:09 +00:00
Jim Grosbach
b9ba7e59b7 Thumb2 assembly parsing and encoding for SBFX. 
llvm-svn: 139858
 2011-09-15 21:58:42 +00:00
Eli Friedman
f7bb39b592 Some legalization fixes for atomic load and store. 
llvm-svn: 139851
 2011-09-15 21:20:49 +00:00
Jim Grosbach
aeb7320fa5 Add some missing 'CHECK' lines and tidy up others. 
llvm-svn: 139849
 2011-09-15 21:17:38 +00:00
Jim Grosbach
8ceb22b769 Thumb2 assembly parsing and encoding for SBC. 
llvm-svn: 139844
 2011-09-15 21:04:10 +00:00
Jim Grosbach
1ac9dd8a72 Thumb2 assembly parsing and encoding for SASX. 
llvm-svn: 139843
 2011-09-15 21:01:23 +00:00
Andrew Trick
1dfb51c692 Reapply r139759. Disable IV rewriting by default. See PR10916. 
llvm-svn: 139842
 2011-09-15 20:58:37 +00:00
Jim Grosbach
eaeb10930f Thumb2 assembly parsing and encoding for SADD16/SADD8. 
llvm-svn: 139841
 2011-09-15 20:57:39 +00:00
Jim Grosbach
553692fcce Thumb2 assembly parsing and encoding for RSB. 
llvm-svn: 139839
 2011-09-15 20:54:14 +00:00
Jim Grosbach
267610ed2a Thumb2 assembly parsing and encoding for RRX. 
llvm-svn: 139831
 2011-09-15 19:52:43 +00:00
Jim Grosbach
ee202d43fe Thumb2 assembly parsing and encoding for ROR. 
llvm-svn: 139830
 2011-09-15 19:50:04 +00:00
Jim Grosbach
50ee930e9a Thumb2 assembly parsing and encoding for REV16/REVSH. 
llvm-svn: 139828
 2011-09-15 19:46:13 +00:00
Jakob Stoklund Olesen
b36a98d18f VirtRegMap is counting spill slots, not register spills. 
Fix the stats counters to reflect that.

llvm-svn: 139819
 2011-09-15 18:31:13 +00:00
Bruno Cardoso Lopes
8e702bba63 Change all checks regarding the presence of any SSE level to always 
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite

llvm-svn: 139817
 2011-09-15 18:27:36 +00:00
Jim Grosbach
9d7aa9bcbc Thumb2 assembly parsing and encoding for REV. 
llvm-svn: 139813
 2011-09-15 18:13:30 +00:00
Jim Grosbach
7c1422b068 Thumb2 assembly parsing and encoding for RBIT. 
llvm-svn: 139811
 2011-09-15 18:07:14 +00:00
Jim Grosbach
d6993cb54c Thumb2 assembly parsing and encoding for signed saturating arithmetic insns. 
llvm-svn: 139810
 2011-09-15 18:06:15 +00:00
Jim Grosbach
5742cbd63f Re-order test. 
llvm-svn: 139795
 2011-09-15 16:04:13 +00:00
Eli Friedman
2109f34467 Make demanded-elt simplification for shufflevector slightly stronger. Spotted by inspection. 
llvm-svn: 139768
 2011-09-15 01:14:29 +00:00
Andrew Trick
e5bb7267ff [regcoalescing] bug fix for RegistersDefinedFromSameValue. 
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal.
Fixes PR10920 401.bzip2 miscompile with no IV rewrite.

llvm-svn: 139765
 2011-09-15 01:09:33 +00:00
Jim Grosbach
68de69f1c9 Thumb2 assembly parsing and encoding for PLI. 
llvm-svn: 139757
 2011-09-14 23:29:05 +00:00
Jim Grosbach
4d7b859fab Thumb2 assembly parsing and encoding for PLD. 
llvm-svn: 139756
 2011-09-14 23:26:12 +00:00
Jim Grosbach
669e269758 Thumb2 assembly parsing and encoding for PKH. 
llvm-svn: 139754
 2011-09-14 23:16:41 +00:00
Owen Anderson
86f1fb2955 Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
llvm-svn: 139747
 2011-09-14 22:46:14 +00:00
Jim Grosbach
3908f7f2b7 Thumb2 assembly parsing and encoding for ORR. 
llvm-svn: 139742
 2011-09-14 21:43:57 +00:00
Jim Grosbach
4d891badcb Thumb2 assembly parsing and encoding for ORN. 
llvm-svn: 139741
 2011-09-14 21:29:54 +00:00
Jim Grosbach
528142a13d Thumb2 assembly parsing and encoding for NOP.W. 
llvm-svn: 139740
 2011-09-14 21:26:25 +00:00
Jim Grosbach
e841adae12 Thumb2 assembly parsing and encoding for MVN. 
llvm-svn: 139739
 2011-09-14 21:24:41 +00:00
Jim Grosbach
585e3c779f Thumb2 assembly parsing and encoding for MUL. 
llvm-svn: 139735
 2011-09-14 21:00:40 +00:00
Jim Grosbach
b1c70aab3e Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721
 2011-09-14 20:03:46 +00:00
Jim Grosbach
e260140b99 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
llvm-svn: 139717
 2011-09-14 19:28:49 +00:00
Jim Grosbach
807e68b8db Thumb2 assembly parsing and encoding for MOVT. 
llvm-svn: 139715
 2011-09-14 19:15:15 +00:00
Jim Grosbach
932d409524 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714
 2011-09-14 19:12:11 +00:00
Dan Gohman
223fdfc56f objc_retainBlock is not NoModRef because it can update forwarding pointers 
in memory relevant to the optimizer. rdar://10050579.

llvm-svn: 139708
 2011-09-14 18:13:00 +00:00
Jim Grosbach
41c8bdfdd9 ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707
 2011-09-14 18:08:35 +00:00
Nadav Rotem
8e3edccebe Add integer promotion support for vselect 
llvm-svn: 139692
 2011-09-14 14:42:15 +00:00
Craig Topper
60719c7bfb Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler. 
llvm-svn: 139691
 2011-09-14 06:41:26 +00:00
Craig Topper
25e81ae604 Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917. 
llvm-svn: 139690
 2011-09-14 05:55:28 +00:00
Craig Topper
d707457c41 Add test case for PR10851. 
llvm-svn: 139689
 2011-09-14 04:36:54 +00:00
Bruno Cardoso Lopes
3e6b9661d1 Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss". 
llvm-svn: 139686
 2011-09-14 02:36:14 +00:00
Devang Patel
75c70b2315 Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 
llvm-svn: 139675
 2011-09-14 00:29:50 +00:00
Devang Patel
f9dcd6261d Remove unnecessary old test. 
llvm-svn: 139674
 2011-09-14 00:28:54 +00:00
Devang Patel
d8a51ce4a9 Update tests. Remove irrelevant tests. 
llvm-svn: 139658
 2011-09-13 23:07:41 +00:00
Akira Hatanaka
3d26b79a9a Delete test cases that generate code for allegrex/psp and cannot be repurposed. 
llvm-svn: 139652
 2011-09-13 22:29:13 +00:00
Owen Anderson
1037a3e60b Make use of Eli's FileCheck sorcery to improve this test. 
llvm-svn: 139645
 2011-09-13 21:37:50 +00:00
Eli Friedman
f13b5ef0e1 Error out on CodeGen of unaligned load/store. Fix test so it isn't accidentally testing that case. 
llvm-svn: 139641
 2011-09-13 20:50:54 +00:00
Owen Anderson
d0121fe635 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
llvm-svn: 139639
 2011-09-13 20:46:26 +00:00
Akira Hatanaka
44c745931f Add pattern used to match MipsLo, which is needed when the instruction selector 
tries to match a dead MipsLo node (explanation in the link below).

http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead

llvm-svn: 139634
 2011-09-13 20:13:58 +00:00
Akira Hatanaka
1376e1eabf Disable tests which generate code for allegrex or psp. 
llvm-svn: 139632
 2011-09-13 20:00:35 +00:00
Nadav Rotem
5ea703debf update checked pattern 
llvm-svn: 139631
 2011-09-13 19:59:18 +00:00
Nadav Rotem
60df99b809 Add vselect target support for targets that do not support blend but do support 
xor/and/or (For example SSE2).

llvm-svn: 139623
 2011-09-13 19:17:42 +00:00
Owen Anderson
b4ed08c465 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
llvm-svn: 139610
 2011-09-13 17:59:19 +00:00
Owen Anderson
5982d4d51b Fix encoding of Thumb2 shifted register operands with RRX shifts. 
llvm-svn: 139606
 2011-09-13 17:34:32 +00:00
Craig Topper
03c833ff84 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. 
llvm-svn: 139588
 2011-09-13 06:54:58 +00:00
Andrew Trick
2e22ddc364 [indvars] Revert r139579 until 401.bzip -arch i386 miscompilation is fixed. PR10920. 
llvm-svn: 139583
 2011-09-13 05:23:49 +00:00
Andrew Trick
2bfa2824c6 Disable IV rewriting by default. See PR10916. 
llvm-svn: 139579
 2011-09-13 03:23:21 +00:00
Andrew Trick
3faad5fc36 Generalize test case to handle multiple indvars modes. 
llvm-svn: 139578
 2011-09-13 03:17:25 +00:00
Andrew Trick
a534a558a2 Generalize this test's CHECK statements to handle different indvars modes. 
llvm-svn: 139577
 2011-09-13 02:46:27 +00:00
Andrew Trick
fe292d43c0 This test only makes sense with -enable-iv-rewrite. 
llvm-svn: 139576
 2011-09-13 02:45:26 +00:00
Andrew Trick
2cc8637af2 [indvars] Fix bugs in floating point IV range checks noticed by inspection. 
llvm-svn: 139574
 2011-09-13 01:59:32 +00:00
Andrew Trick
cc7f5a609a Conditionalize indvars test that relies on SCEV expansion of geps, 
which is only relevant with canonical IVs

llvm-svn: 139556
 2011-09-12 23:13:57 +00:00
Bruno Cardoso Lopes
eb09ab7c3f Change testcase commandline to be more strict and silence buildbots 
llvm-svn: 139554
 2011-09-12 22:59:26 +00:00
Bruno Cardoso Lopes
a4d2bdfa40 Fix PR10845. SUBREG_TO_REG shouldn't be used when the input and 
destination types are equal!

llvm-svn: 139553
 2011-09-12 22:59:23 +00:00
Andrew Trick
a3c28142a5 indvars test only relevant for -enable-iv-rewrite. 
Otherwise this case is now covered by no-iv-rewrite.ll.

llvm-svn: 139552
 2011-09-12 22:59:00 +00:00
Owen Anderson
ebcf543265 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? 
llvm-svn: 139549
 2011-09-12 22:40:31 +00:00
Owen Anderson
a1a10ed5c6 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 
llvm-svn: 139542
 2011-09-12 21:28:46 +00:00
Bruno Cardoso Lopes
64e2e852f9 Revert the wrong part of r139528, and fix testcases. 
llvm-svn: 139541
 2011-09-12 21:24:07 +00:00
Owen Anderson
0081444d87 Fix encoding of PC-relative LDRSHW with an immediate offset. 
llvm-svn: 139537
 2011-09-12 20:36:51 +00:00
Andrew Trick
bf1bc9a077 Conditionalize indvars tests that rely on SCEV expansion of geps, 
which is relevant with canonical IVs. Anything else being checked by
these tests is already covered by early CSE.

llvm-svn: 139535
 2011-09-12 20:26:34 +00:00
Bruno Cardoso Lopes
c67e996fc3 Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't. 
However with this fix it does now.

Basically the operand order for the x86 target specific node
is not the same as the instruction, but since the intrinsic need that
specific order at the instruction definition, just change the order
during legalization. Also, there were some wrong invertions of condition
codes, such as GE => LE, GT => LT, fix that too. Fix PR10907.

llvm-svn: 139528
 2011-09-12 19:30:40 +00:00
Owen Anderson
05ef2c122d Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. 
llvm-svn: 139522
 2011-09-12 18:56:30 +00:00
Andrew Trick
efe8cdcf20 Removing indvars tests that directly test canonical IVs and nothing else. 
llvm-svn: 139518
 2011-09-12 18:33:08 +00:00
Andrew Trick
09cf4287c2 Rename -disable-iv-rewrite to -enable-iv-rewrite=false in preparation for default change. 
llvm-svn: 139517
 2011-09-12 18:28:44 +00:00
Eli Friedman
08926ecbfb Fix mistake in test runline. 
llvm-svn: 139505
 2011-09-12 17:32:58 +00:00
Andrew Trick
19f9e653cd Test case for r139453, WidenIV::GetExtendedOperandRecurrence. 
llvm-svn: 139504
 2011-09-12 17:20:57 +00:00
Richard Osborne
962b1ca071 Associate a MemOperand with LDWCP nodes introduced during ISel. 
This information is required if we want LDWCP to be hoisted out of loops.

llvm-svn: 139495
 2011-09-12 14:43:23 +00:00
Craig Topper
5ffd0cb080 Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. 
llvm-svn: 139486
 2011-09-11 23:19:54 +00:00
Craig Topper
a9b27eecc9 Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. 
llvm-svn: 139485
 2011-09-11 21:41:45 +00:00
Craig Topper
8361de67b5 Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W. 
llvm-svn: 139484
 2011-09-11 20:23:20 +00:00
Eli Friedman
2275f7612e Really un-XFAIL the testcase, like I said I would in r139458. 
llvm-svn: 139459
 2011-09-10 02:02:27 +00:00
Richard Trieu
0485e133f2 Fixed an assert from: 
assert("not implemented for target shuffle node");

to:

  assert(0 && "not implemented for target shuffle node");

This causes a test failure in CodeGen/X86/palignr.ll which has
been marked as XFAIL for the time being.
Test failure filed at PR10901.

llvm-svn: 139454
 2011-09-10 01:26:21 +00:00
Jim Grosbach
52492b1cf3 Thumb2 parsing and encoding for MOV(immediate). 
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

llvm-svn: 139440
 2011-09-10 00:15:36 +00:00
Akira Hatanaka
a8f0f7babb Fix test cases. 
Generate code for Mips32r1 unless a Mips32r2 feature is tested.

llvm-svn: 139433
 2011-09-09 23:14:58 +00:00
Owen Anderson
9cd21ce8c9 LDM writeback is not allowed if Rn is in the target register list. 
llvm-svn: 139432
 2011-09-09 23:13:33 +00:00
Owen Anderson
dbe77fc5a1 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands. 
llvm-svn: 139422
 2011-09-09 22:24:36 +00:00
Owen Anderson
a7838cb723 Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches. 
llvm-svn: 139415
 2011-09-09 21:48:23 +00:00
Eli Friedman
4bae1c4f70 Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897. 
llvm-svn: 139407
 2011-09-09 21:04:06 +00:00
Akira Hatanaka
f65d050693 Drop support for Mips1 and Mips2. 
llvm-svn: 139405
 2011-09-09 20:45:50 +00:00
Nadav Rotem
ccb46031e6 Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type 
llvm-svn: 139400
 2011-09-09 20:29:17 +00:00
Jim Grosbach
6225a96bf5 Thumb2 assembly parsing and encoding for MLA and MLS. 
llvm-svn: 139399
 2011-09-09 20:24:45 +00:00
Jim Grosbach
5f87c06a64 Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2. 
llvm-svn: 139397
 2011-09-09 20:19:28 +00:00
Jim Grosbach
f310295150 Tidy up formatting a bit. 
llvm-svn: 139396
 2011-09-09 20:17:49 +00:00
Jim Grosbach
f7d8e569b3 Thumb2 assembly parsing and encoding for LSL. 
llvm-svn: 139395
 2011-09-09 20:05:38 +00:00
Jim Grosbach
69e67f206d Thumb2 assembly parsing and encoding for LDRT. 
llvm-svn: 139393
 2011-09-09 20:02:15 +00:00
Jim Grosbach
abd54fb32c Thumb2 assembly parsing and encoding for LDRSHT. 
llvm-svn: 139392
 2011-09-09 20:01:18 +00:00
Jim Grosbach
c6aa5be010 Thumb2 assembly parsing and encoding for LDRSH. 
llvm-svn: 139391
 2011-09-09 19:54:30 +00:00
Jim Grosbach
022da868a5 Thumb2 assembly parsing and encoding for LDRSBT. 
llvm-svn: 139390
 2011-09-09 19:49:06 +00:00
Jim Grosbach
915ba5189e Thumb2 assembly parsing and encoding for LDRSB. 
llvm-svn: 139389
 2011-09-09 19:42:40 +00:00
Jim Grosbach
6faf547463 Thumb2 assembly parsing and encoding for LDRH. 
llvm-svn: 139386
 2011-09-09 19:13:53 +00:00
Jim Grosbach
26f684d4ff Shuffle a bit. 
llvm-svn: 139385
 2011-09-09 19:09:54 +00:00
Akira Hatanaka
17df2dfe8c Drop support for Allegrex. Allegrex implements a variant of Mips2. 
llvm-svn: 139383
 2011-09-09 19:00:51 +00:00
Jim Grosbach
eb2d668899 Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. 
llvm-svn: 139381
 2011-09-09 18:37:27 +00:00
Jim Grosbach
1091b2913d Add FIXME. 
llvm-svn: 139371
 2011-09-09 16:45:31 +00:00
Duncan Sands
6fc4c521c9 Mark the eh.typeid.for intrinsic as being 'const', which it is inside 
any given function.  As pointed out by John McCall, this is needed to
have redundant eh.typeid.for tests be eliminated in the presence of
cleanups.

llvm-svn: 139360
 2011-09-09 07:50:37 +00:00
Craig Topper
23adfa4738 Add disassembler test for Intel syntax. Tests r139353. 
llvm-svn: 139356
 2011-09-09 06:35:44 +00:00
Akira Hatanaka
e1eb015eb9 Change default target architecture from Mips1 to Mips32r1 in preparation for 
removing support for Mips1 and Mips2. 

This change and the ones that follow have been discussed with and approved by
Bruno.

llvm-svn: 139344
 2011-09-09 01:13:27 +00:00
Devang Patel
ba2d56b1ef Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 
llvm-svn: 139330
 2011-09-08 22:59:09 +00:00
Owen Anderson
d7127e0c27 Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. 
llvm-svn: 139328
 2011-09-08 22:42:49 +00:00
Jim Grosbach
9f150bfedf Thumb2 assembly parsing and encoding for LDRD(immediate). 
Refactor operand handling for STRD as well. Tests for that forthcoming.

llvm-svn: 139322
 2011-09-08 22:07:06 +00:00
Bruno Cardoso Lopes
54962ac233 Add a AVX version of a simple i64 -> f64 bitcast. This could be 
triggered using llc with -O0, which wouldn't let it be folded and
expose the lack of this pattern.

llvm-svn: 139320
 2011-09-08 21:52:33 +00:00
Bruno Cardoso Lopes
50596b096c Reapply testcase from r139309! 
llvm-svn: 139318
 2011-09-08 21:05:43 +00:00
Kevin Enderby
16f9df1f05 Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 
without a base symbol that must not have a relocation entry.

llvm-svn: 139316
 2011-09-08 20:53:44 +00:00
Bruno Cardoso Lopes
3ecc7a69fd Remove this crashing test, until I figure out what's going wrong here 
llvm-svn: 139309
 2011-09-08 18:32:36 +00:00
Bruno Cardoso Lopes
74a67e22b0 Add AVX versions of blend vector operations and fix some issues noticed 
in Nadav's r139285 and r139287 commits.

1) Rename vsel.ll to a more descriptive name
2) Change the order of BLEND operands to "Op1, Op2, Cond", this is
necessary because PBLENDVB is already used in different places with
this order, and it was being emitted in the wrong way for vselect
3) Add AVX patterns and tests for the same SSE41 instructions

llvm-svn: 139305
 2011-09-08 18:05:08 +00:00
Bruno Cardoso Lopes
84c53e3965 Fix PR10844: Add patterns to cover non foldable versions of X86vzmovl. 
Triggered using llc -O0. Also fix some SET0PS patterns to their AVX
forms and test it on the testcase.

llvm-svn: 139304
 2011-09-08 18:05:02 +00:00
Jim Grosbach
222a102bd1 Add tests for Thumb2 LDRB indexed addressing w/ writeback. 
llvm-svn: 139292
 2011-09-08 16:49:36 +00:00
Nadav Rotem
fd68584146 This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll 
llvm-svn: 139288
 2011-09-08 08:43:23 +00:00
Nadav Rotem
dbfa2c8810 add a testcase for the previous patch 
llvm-svn: 139287
 2011-09-08 08:31:31 +00:00
Nadav Rotem
b461f2190e Add X86-SSE4 codegen support for vector-select. 
llvm-svn: 139285
 2011-09-08 08:11:19 +00:00
Eli Friedman
6e9cab83b0 Fix the logic in BasicAliasAnalysis::aliasGEP for comparing GEP's with variable differences so that it actually does something sane. Fixes PR10881. 
llvm-svn: 139276
 2011-09-08 02:23:31 +00:00
Jim Grosbach
5ac3aa158b Thumb2 assembly parsing and encoding for LDR post-indexed. 
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

llvm-svn: 139272
 2011-09-08 01:01:32 +00:00
Jim Grosbach
1aa191032a Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback. 
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

llvm-svn: 139270
 2011-09-08 00:39:19 +00:00
Jim Grosbach
8b54d19514 Thumb2 assembly parsing and encoding for LDRBT. 
llvm-svn: 139267
 2011-09-07 23:39:14 +00:00
Jim Grosbach
7482c11b79 Thumb2 assembly parsing and encoding for LDRB(register). 
llvm-svn: 139266
 2011-09-07 23:17:00 +00:00
Jim Grosbach
a3ff9eeb85 Thumb2 assembly parsing and encoding for LDR(register). 
llvm-svn: 139264
 2011-09-07 23:10:15 +00:00
Jim Grosbach
d640c62856 Thumb2 assembly parsing and encoding for LDRB(immediate). 
llvm-svn: 139258
 2011-09-07 21:41:25 +00:00
Jim Grosbach
deb3c78242 Thumb2 assembly parsing and encoding for LDR(literal). 
Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.

llvm-svn: 139257
 2011-09-07 21:33:16 +00:00
Owen Anderson
26467730c1 Create Thumb2 versions of STC/LDC, and reenable the relevant tests. 
llvm-svn: 139256
 2011-09-07 21:10:42 +00:00
Jim Grosbach
53b836a088 Add tests for Thumb2 LDR(immediate) from r139254. 
llvm-svn: 139255
 2011-09-07 21:06:46 +00:00
Jim Grosbach
054b346e46 Thumb2 parsing and encoding for LDMDB. 
llvm-svn: 139251
 2011-09-07 19:57:53 +00:00
James Molloy
ac057f13a5 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 
llvm-svn: 139250
 2011-09-07 19:42:28 +00:00
Eli Friedman
9ea5599729 Fix atomic load and store on x86 to pass -verify-machineinstrs (and possibly fix some subtle bugs involving passes which check mayStore()). 
This isn't exactly ideal, but it is good enough for the moment.

llvm-svn: 139245
 2011-09-07 18:48:32 +00:00
Jim Grosbach
f5f321c4ce Update test for 139243 
llvm-svn: 139244
 2011-09-07 18:40:06 +00:00
Jim Grosbach
20689d28e7 Thumb2 parsing and encoding for LDMIA. 
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.

llvm-svn: 139242
 2011-09-07 18:05:34 +00:00
Owen Anderson
4106b9fb31 Port more assembler tests over to disassembler tests, and fix a minor logic error that exposed. 
llvm-svn: 139240
 2011-09-07 17:55:19 +00:00
Duncan Sands
b027f19035 When inlining exception handling code into another function, ensure that 
duplicate tests are eliminated (for example if the two functions both have
a catch clause catching the same type, ensure the redundant one is removed).
Note that it would probably be safe to say that eh.typeid.for is 'const',
but since two calls to it with the same argument can give different results
(but only if the calls are in different functions), it seems more correct to
mark it only 'pure'; this doesn't get in the way of the optimization.

llvm-svn: 139236
 2011-09-07 16:44:14 +00:00
Duncan Sands
8df5170d0d Another forgotten trampoline testcase. 
llvm-svn: 139230
 2011-09-07 10:05:14 +00:00
Duncan Sands
ccd8b589f7 Forgot to add this trampoline testcase. 
llvm-svn: 139229
 2011-09-07 09:21:38 +00:00
Eli Friedman
6a45370c0f Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM. 
(The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.)

llvm-svn: 139221
 2011-09-07 02:23:42 +00:00
Devang Patel
f4483238b6 While sinking machine instructions, sink matching DBG_VALUEs also otherwise live debug variable pass will drop DBG_VALUEs on the floor. 
llvm-svn: 139208
 2011-09-07 00:07:58 +00:00
Owen Anderson
483f94e8d1 Teach BasicAA about the aliasing properties of memset_pattern16. 
Fixes PR10872 and <rdar://problem/10065079>.

llvm-svn: 139204
 2011-09-06 23:33:25 +00:00
Jim Grosbach
14720bed32 Thumb2 parsing and encoding for ISB. 
llvm-svn: 139200
 2011-09-06 22:53:27 +00:00
Jim Grosbach
521a061450 Thumb2 parsing and encoding for EOR. 
llvm-svn: 139199
 2011-09-06 22:44:50 +00:00
Jim Grosbach
463bf279d6 Thumb2 parsing and encoding for DSB. 
llvm-svn: 139194
 2011-09-06 22:19:40 +00:00
Jim Grosbach
276e51888c Thumb2 parsing and encoding for DMB. 
llvm-svn: 139193
 2011-09-06 22:14:58 +00:00