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6998 Commits

Author SHA1 Message Date
Reid Spencer
10804f3fcb Make sign extension work correctly for unusual bit widths. 
llvm-svn: 36635
 2007-05-02 02:17:41 +00:00
Dale Johannesen
2a293b718e Add some support for (Darwin) code-generating directives in getInlineAsmLength. 
Support is incomplete, but more accurate than gcc's.

llvm-svn: 36634
 2007-05-02 01:02:40 +00:00
Anton Korobeynikov
6e6bfcaf4d Fix couple of bugs connected with eh info: 
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.

llvm-svn: 36633
 2007-05-01 22:23:12 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
01853831d2 Doh. PC displacement is between the constantpool and the add instruction. 
llvm-svn: 36630
 2007-05-01 20:27:19 +00:00
Anton Korobeynikov
f808ab1e97 Use correct PC symbol 
llvm-svn: 36628
 2007-05-01 10:19:31 +00:00
Anton Korobeynikov
82d11e006a Adjust correct EH-related sections 
llvm-svn: 36627
 2007-05-01 10:16:06 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Nate Begeman
767ee95d29 llvm bug #1350, parts 1, 2, and 3. 
llvm-svn: 36618
 2007-05-01 05:57:02 +00:00
Evan Cheng
248de25fb5 Under normal circumstances, when a frame pointer is not required, we reserve 
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607
 2007-05-01 00:52:08 +00:00
Dale Johannesen
d6f582af9d Remove item: thumb padding in constant islands 
llvm-svn: 36586
 2007-04-30 00:32:06 +00:00
Dale Johannesen
3fe0bbd6fb remove unused variable 
llvm-svn: 36585
 2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
727156d5f0 Enable protected visibility on ARM. 
llvm-svn: 36583
 2007-04-30 00:23:51 +00:00
Dale Johannesen
7c3b78cf98 Rewrite of Thumb constant islands handling (exact allowance for padding 
around islands and jump tables).

llvm-svn: 36573
 2007-04-29 19:19:30 +00:00
Dale Johannesen
1ee5f128f6 Make ARM-specific version of getInlineAsmLength 
llvm-svn: 36572
 2007-04-29 19:17:45 +00:00
Anton Korobeynikov
3d95e52ea2 Implement protected visibility. This partly implements PR1363. Linker 
should be taught to deal with protected symbols.

llvm-svn: 36565
 2007-04-29 18:35:00 +00:00
Dale Johannesen
0a4acbf6ac change per review 
llvm-svn: 36519
 2007-04-28 00:36:37 +00:00
Dale Johannesen
74feb7979a Prevent Thumb code from generating ARM instructions 
llvm-svn: 36518
 2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
54544c8835 add parenthesis. 
llvm-svn: 36514
 2007-04-27 20:10:08 +00:00
Evan Cheng
5f4f03b9b9 Doh. ARM::LEApcrel is a single instruction MI. 
llvm-svn: 36513
 2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
f9641d332a In Thumb mode, the frame register must be R7. 
llvm-svn: 36512
 2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
f385b56870 ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
llvm-svn: 36506
 2007-04-27 13:54:47 +00:00
Evan Cheng
a1593a9ec6 Darwin runtime library does not have these. 
llvm-svn: 36505
 2007-04-27 08:15:43 +00:00
Evan Cheng
2da659afa3 Special handling of LEApcrel and tLEApcrel. 
llvm-svn: 36504
 2007-04-27 08:14:15 +00:00
Evan Cheng
75ed5c5cb2 Back out previous check-in. Incorrect. 
llvm-svn: 36503
 2007-04-27 07:50:02 +00:00
Evan Cheng
b54f757b65 tLEApcrel is a AddrModeTs, i.e. pc relative. 
llvm-svn: 36502
 2007-04-27 07:37:22 +00:00
Dan Gohman
6cd8e14d68 Fix PR1339 and CodeGen/X86/dollar-name.ll 
llvm-svn: 36495
 2007-04-26 21:07:05 +00:00
Bill Wendling
d380bc565b Have MMX registers clobbered in x86-64 too. 
llvm-svn: 36494
 2007-04-26 21:06:48 +00:00
Evan Cheng
eff332e3e1 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
llvm-svn: 36483
 2007-04-26 19:00:32 +00:00
Evan Cheng
c6fa6cb4c5 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
llvm-svn: 36456
 2007-04-26 01:09:28 +00:00
Evan Cheng
7f44e880dc Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Bill Wendling
552e4ff1be Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers 
clobbered by a call.

llvm-svn: 36448
 2007-04-25 21:31:48 +00:00
Chris Lattner
fd730d86e3 do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits

llvm-svn: 36442
 2007-04-25 17:23:53 +00:00
Lauro Ramos Venancio
d922b8ca9b remember to emit weak reference in one more case. 
llvm-svn: 36438
 2007-04-25 14:50:40 +00:00
Anton Korobeynikov
25dc9a61cb Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part 
will follow.

llvm-svn: 36435
 2007-04-25 14:27:10 +00:00
Evan Cheng
de9468373e Relex assertions to account for additional implicit def / use operands. 
llvm-svn: 36430
 2007-04-25 07:12:14 +00:00
Chris Lattner
ca7480e8cb support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner
452294cb99 support >4G stack frames 
llvm-svn: 36423
 2007-04-25 04:25:10 +00:00
Chris Lattner
583fd8343e Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll 
llvm-svn: 36410
 2007-04-24 22:51:03 +00:00
Bill Wendling
8127d9ce82 Update. 
llvm-svn: 36407
 2007-04-24 21:20:03 +00:00
Bill Wendling
54134a37e0 Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Bill Wendling
498c102df6 Add the final MMX instructions. Correct a few wrong patterns. 
llvm-svn: 36405
 2007-04-24 21:18:37 +00:00
Bill Wendling
fed8496c6b Remove some invalid instructions from this check. 
llvm-svn: 36404
 2007-04-24 21:17:46 +00:00
Bill Wendling
6856e741fa Support for the special case of a vector with the canonical form: 
vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.

llvm-svn: 36403
 2007-04-24 21:16:55 +00:00
Dale Johannesen
5f27e8bcc4 Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining 
BBOffsets and BBSizes when adjusting conditional branches.

llvm-svn: 36372
 2007-04-23 20:09:04 +00:00
Dale Johannesen
f7d3443fa7 add Align field, and use when generating function alignment 
llvm-svn: 36371
 2007-04-23 20:07:25 +00:00
Dale Johannesen
9dce0dffd1 add isThumb (unused as yet) 
llvm-svn: 36370
 2007-04-23 20:04:35 +00:00
Dale Johannesen
b51e8d6592 Fix generic getInlineAsmLength 
llvm-svn: 36369
 2007-04-23 20:00:17 +00:00
Lauro Ramos Venancio
b75c6c5cbc X86 TLS: optimize the implementation of "local exec" model. 
llvm-svn: 36359
 2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
b1a101f0e7 X86 TLS: fix and optimize the implementation of "initial exec" model. 
llvm-svn: 36355
 2007-04-22 22:50:52 +00:00