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11 Commits

Author SHA1 Message Date
Akira Hatanaka
d1b2b96ed5 1. introduce MipsPat in place of Pat in order to exclude those from 
being used by Mips16 or Micro Mips
2. clean up a few lines too long encountered

Patch by Reed Kotler.

llvm-svn: 158470
 2012-06-14 21:03:23 +00:00
Akira Hatanaka
2a600ff5f4 This patch adds a predicate to existing mips32 and mips64 so that those 
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.

llvm-svn: 157234
 2012-05-22 03:10:09 +00:00
Akira Hatanaka
574e68feec Add another peephole pattern for conditional moves. 
llvm-svn: 156460
 2012-05-09 02:29:29 +00:00
Akira Hatanaka
ecb1cd1ce4 Add disassembler to MIPS. 
Patch by Vladimir Medic. 

llvm-svn: 154935
 2012-04-17 18:03:21 +00:00
Akira Hatanaka
cecb440c11 Revert r153924. There were buildbot failures. 
llvm-svn: 153925
 2012-04-03 02:51:09 +00:00
Akira Hatanaka
058b0cfb55 MIPS disassembler support. 
Patch by Vladimir Medic.

llvm-svn: 153924
 2012-04-03 02:20:58 +00:00
Jia Liu
bdcd314be3 remove blanks, and some code format 
llvm-svn: 151625
 2012-02-28 07:46:26 +00:00
Jia Liu
ecc08b8cfe add Emacs tag and fix some comment error in file headers 
llvm-svn: 150775
 2012-02-17 01:23:50 +00:00
Bruno Cardoso Lopes
edc2e30d42 Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

llvm-svn: 142378
 2011-10-18 17:50:36 +00:00
Akira Hatanaka
4939842b5a Add definitions of conditional moves with 64-bit operands. Comment out code for 
expanding conditional moves, which is not needed since architectures that lack
support for conditional moves have been removed. 

llvm-svn: 142226
 2011-10-17 18:53:29 +00:00
Akira Hatanaka
e8cb50da87 Move class and instruction definitions for conditional moves to a seperate file. 
llvm-svn: 142220
 2011-10-17 18:43:19 +00:00