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Commit Graph

34 Commits

Author SHA1 Message Date
Chris Lattner
b27d60ccf1 Rename MachineInstrInfo -> TargetInstrInfo
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
Chris Lattner
21c83b54c0 * Implement rudimentary output of the constant pool
* Implement support for MRMS?m instructions
* Add Arg64 support
* Add support for frame indexes and constant pool indexes
*

llvm-svn: 5225
2003-01-13 00:35:03 +00:00
Chris Lattner
be4392473a * Convert to a MachineFunctionPass
* Don't take a TM as a ctor parameter
* Print [X - Y] instead of [X + -Y] when possible

llvm-svn: 5180
2002-12-28 20:25:38 +00:00
Chris Lattner
68a2c5d133 Add printer support for Pseudo instructions
llvm-svn: 5150
2002-12-25 05:09:01 +00:00
Chris Lattner
9e13907a4f Add support for the bswap instruction
llvm-svn: 5114
2002-12-23 23:46:00 +00:00
Chris Lattner
ea2d8ad746 Give passes nice names!
llvm-svn: 5059
2002-12-15 21:13:40 +00:00
Chris Lattner
534876a78c Use MachineOperand::isFoo methods instead of our own global functions
llvm-svn: 5033
2002-12-15 08:01:39 +00:00
Chris Lattner
505ace489e Print X86 PHI nodes in a sane manner
llvm-svn: 5003
2002-12-13 09:59:26 +00:00
Brian Gaeke
5da234a1d7 InstSelectSimple.cpp: Give promote32 a comment. Add initial
implementation of getReg() for arguments.

MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
 displacement (whew!) due to Chris.

Printer.cpp: Fix printing out index and scale in memory references.

llvm-svn: 4998
2002-12-13 07:56:18 +00:00
Chris Lattner
723ca2522d Rename MemArg* to Arg*
llvm-svn: 4979
2002-12-13 03:51:55 +00:00
Brian Gaeke
dbc34a2a95 Target/X86/Printer.cpp: Add sizePtr function, and use it instead of
" <SIZE> PTR " string when emitting assembly.

Target/X86/X86InstrInfo.def: Tidy up a bit:
 Squashed everything down to 118 chars wide, wrapping lines so that
 comment is at the same point on each line. Rename "NoImpRegs" as
 "NoIR". (most instructions have NoImpRegs twice on a line, so this
 saves 10 columns).

 Also, annotate various instructions with flags for size of memory operand.
  (MemArg16, MemArg32, MemArg64, etc.)

Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
 (MemArg16, MemArg32, MemArg64, etc.)

llvm-svn: 4932
2002-12-05 08:30:40 +00:00
Chris Lattner
96edaabdb2 Fix bogus assertion failures
llvm-svn: 4919
2002-12-04 17:32:52 +00:00
Chris Lattner
b538ae0dba Avoid bad assertion
llvm-svn: 4918
2002-12-04 17:28:40 +00:00
Chris Lattner
73ac28801e Add support for referencing global variables/functions
llvm-svn: 4907
2002-12-04 06:45:19 +00:00
Chris Lattner
5f0614914e Split the machine code emitter completely out of the printer
llvm-svn: 4882
2002-12-03 06:34:06 +00:00
Chris Lattner
e8640c05cc Remove comment
Remove handling of OtherFrm

llvm-svn: 4867
2002-12-02 21:40:46 +00:00
Chris Lattner
89de3f1fc5 Add rawfrm flags
llvm-svn: 4841
2002-12-01 23:25:59 +00:00
Chris Lattner
fe85dd13d2 Handle cmp Reg, 0 correctly
llvm-svn: 4819
2002-11-21 23:30:00 +00:00
Chris Lattner
de36dd3a36 Fix off by one bug
llvm-svn: 4816
2002-11-21 22:48:15 +00:00
Chris Lattner
93c5c3ff44 Minor code cleanups
llvm-svn: 4814
2002-11-21 21:04:50 +00:00
Chris Lattner
af8c29b47d Implement printing of store instructions
llvm-svn: 4813
2002-11-21 21:03:39 +00:00
Chris Lattner
918179475a The big change here is to handle printing/emission of X86II::MRMSrcMem
instructions.  Right now the only users are load instructions, and Misha's
spill code

llvm-svn: 4812
2002-11-21 20:44:15 +00:00
Chris Lattner
766d0da035 Add printing support for /0 /1 type instructions
llvm-svn: 4803
2002-11-21 17:09:01 +00:00
Chris Lattner
2f9488d131 Support Registers of the form (B8+ rd) for example
llvm-svn: 4798
2002-11-21 02:00:20 +00:00
Chris Lattner
aa8aa73902 Implement printing more, implement opcode output more
llvm-svn: 4796
2002-11-21 01:33:44 +00:00
Chris Lattner
228180c2ae Print another class of instructions correctly, giving us: xorl EDX, EDX
for example.

llvm-svn: 4793
2002-11-21 00:30:01 +00:00
Misha Brukman
42f51b24e1 Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
printing out assembly. After all, we want the real thing too.

llvm-svn: 4783
2002-11-20 18:56:41 +00:00
Chris Lattner
cd1f56fc36 Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
llvm-svn: 4743
2002-11-18 06:56:51 +00:00
Chris Lattner
a7d7b16161 Arrange to have a TargetMachine available in X86InstrInfo::print
llvm-svn: 4734
2002-11-17 23:20:37 +00:00
Chris Lattner
5374a3be97 Reorganize printing interface a bit
llvm-svn: 4728
2002-11-17 22:53:13 +00:00
Brian Gaeke
492e05ba01 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.

llvm-svn: 4707
2002-11-14 22:32:30 +00:00
Chris Lattner
d3b57a0084 Convert backend to use passes, implement X86TargetMachine
llvm-svn: 4421
2002-10-29 22:37:54 +00:00
Chris Lattner
152b53fc64 Initial stab at MachineInstr'ication
llvm-svn: 4367
2002-10-28 23:55:19 +00:00
Chris Lattner
d25a097994 Initial checkin of X86 backend.
We can instruction select exactly one instruction 'ret void'.  Wow.

llvm-svn: 4284
2002-10-25 22:55:53 +00:00