Chris Lattner
dfc686541d
pass "is64Bit" flag into PPC TAI ctors instead of a whole targetmachine.
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llvm-svn: 78743
2009-08-11 22:51:34 +00:00
Chris Lattner
0ff895cd83
eliminate asmflavor from subtarget, PPCTAI is the only client
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and each callee knows that it returns.
llvm-svn: 78742
2009-08-11 22:49:34 +00:00
Chris Lattner
a74023896f
Change the asmprinter to print the comment character before the
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"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character. This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character. This also allows hoisting the darwin stuff up to the
shared TAI class.
llvm-svn: 78737
2009-08-11 22:39:40 +00:00
David Goodwin
2686178489
Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter.
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llvm-svn: 78736
2009-08-11 22:38:43 +00:00
Chris Lattner
f27d5f6662
factorize more darwin TAI stuff. Note that this gives
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darwin/arm support for .no_dead_strip
llvm-svn: 78734
2009-08-11 22:31:42 +00:00
Daniel Dunbar
514498ccec
X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.
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llvm-svn: 78733
2009-08-11 22:24:40 +00:00
Chris Lattner
7015f75b6a
factorize darwin ProtectedDirective and SetDirective.
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llvm-svn: 78732
2009-08-11 22:22:44 +00:00
Daniel Dunbar
63f93255ae
Add 'isCodeGenOnly' bit to Instruction .td records.
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- Used to mark fake instructions which don't correspond to an actual machine
instruction (or are duplicates of a real instruction). This is to be used for
"special cases" in the .td files, which should be ignored by things like the
assembler and disassembler. We still need a good solution to handle pervasive
duplication, like with the Int_ instructions.
- Set the bit on fake "mov 0" style instructions, which allows turning an
assembler matcher warning into a hard error.
- -2 FIXMEs.
llvm-svn: 78731
2009-08-11 22:17:52 +00:00
Chris Lattner
bf7a1a3e38
all darwin targets have .space and .zerofill, pull up.
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llvm-svn: 78730
2009-08-11 22:17:31 +00:00
Chris Lattner
44a2fda8c1
eliminate template from arm TAI
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llvm-svn: 78729
2009-08-11 22:14:59 +00:00
Chris Lattner
b460bd4895
fix a bug I introduced in r78724 that caused failures in:
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CodeGen/X86/dll-linkage.ll & CodeGen/X86/mingw-alloca.ll
llvm-svn: 78728
2009-08-11 22:12:58 +00:00
Chris Lattner
8c7eb509d3
move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate
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template in PPC backend for TAI.
llvm-svn: 78727
2009-08-11 22:06:07 +00:00
Owen Anderson
75ebfc8728
Fix warnings.
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llvm-svn: 78725
2009-08-11 21:59:30 +00:00
Chris Lattner
05bde58b5e
eliminate the X86TargetAsmInfo template.
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llvm-svn: 78724
2009-08-11 21:57:08 +00:00
Sean Callanan
b2288f269b
Added ADD instructions with rAX as one parameter to the Intel instruction
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tables.
llvm-svn: 78721
2009-08-11 21:26:06 +00:00
Evan Cheng
783028063e
Shrinkify Thumb2 load / store multiple instructions.
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llvm-svn: 78717
2009-08-11 21:11:32 +00:00
Daniel Dunbar
186ba504b3
llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be
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used to strip hard coded comments out of .td assembly strings.
llvm-svn: 78716
2009-08-11 20:59:47 +00:00
Owen Anderson
48f2f0ae72
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
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the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Chris Lattner
30d9c39337
pass the TargetTriple down from each target ctor to the
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LLVMTargetMachine ctor. It is currently unused.
llvm-svn: 78711
2009-08-11 20:42:37 +00:00
Chris Lattner
40af6d5199
now that JumpTableDirective can differentate picness itself, MIPS TAI
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no longer needs a targetmachine to initialize itself.
llvm-svn: 78710
2009-08-11 20:32:51 +00:00
Chris Lattner
45bdc96988
split "JumpTableDirective" (an existing hack) into a PIC and nonPIC
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version. This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.
The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.
llvm-svn: 78709
2009-08-11 20:30:58 +00:00
Jim Grosbach
67841ae0a8
Add Thumb2 eh_sjlj_setjmp implementation
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llvm-svn: 78701
2009-08-11 19:42:21 +00:00
Jim Grosbach
c80da41574
fix GetInstSizeInBytes for eh_sjlj_setjmp
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llvm-svn: 78683
2009-08-11 17:08:15 +00:00
Chris Lattner
edb3daa5e9
move some 32-bit instrs to x86instrinfo.td
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llvm-svn: 78680
2009-08-11 16:58:39 +00:00
Benjamin Kramer
0481803d2a
This void is implicit in C++.
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llvm-svn: 78678
2009-08-11 16:03:08 +00:00
Dan Gohman
24939b2c4f
Tidy #includes.
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llvm-svn: 78677
2009-08-11 16:02:12 +00:00
Dan Gohman
9fbdb3de0d
Simplify this code. The case where one class is GR64RegClass and the
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other is a subclass of it is effectively handled by the prior tests.
llvm-svn: 78676
2009-08-11 15:59:48 +00:00
Jim Grosbach
3c898a99bd
Whitespace cleanup. Remove trailing whitespace.
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llvm-svn: 78666
2009-08-11 15:33:49 +00:00
Jim Grosbach
d5fc7e81b2
Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include <cstdlib> in the header.
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llvm-svn: 78665
2009-08-11 15:26:27 +00:00
Evan Cheng
249f07cf57
Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions.
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llvm-svn: 78659
2009-08-11 09:37:40 +00:00
Evan Cheng
434a66fa9b
Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to
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match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.
llvm-svn: 78658
2009-08-11 08:52:18 +00:00
Evan Cheng
9fdf9b4435
80 column violation.
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llvm-svn: 78657
2009-08-11 08:47:46 +00:00
Evan Cheng
766c076bea
Cosmetic changes.
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llvm-svn: 78655
2009-08-11 07:36:14 +00:00
Evan Cheng
dbccf353d1
Adding a blank line back.
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llvm-svn: 78654
2009-08-11 07:32:58 +00:00
Bob Wilson
d64e304671
Use vAny type to get rid of Neon intrinsics that differed only in whether
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the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.
If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.
llvm-svn: 78646
2009-08-11 05:39:44 +00:00
Daniel Dunbar
4e0d543e35
llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).
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llvm-svn: 78642
2009-08-11 05:00:25 +00:00
Sanjiv Gupta
239a8992f6
Fixed more problems caused by 78142.
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Passing of indirect arguments starts after return value on the callee's frame.
llvm-svn: 78635
2009-08-11 01:51:55 +00:00
Bob Wilson
1c75a23299
Use new EVT::vAny type to combine Neon intrinsics for VPADD.
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llvm-svn: 78632
2009-08-11 01:15:26 +00:00
Sean Callanan
b6295e7143
Added the x86 INT instructions; both the special-case INT 3 and the general-case
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INT i8. These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.
llvm-svn: 78630
2009-08-11 01:09:06 +00:00
David Goodwin
8ca187462c
Fix bug in NEON convert for single-precision FP. This also fixes the tblgen warnings.
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llvm-svn: 78629
2009-08-11 01:07:38 +00:00
Jim Grosbach
c2fd915309
Add stdlib.h
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llvm-svn: 78627
2009-08-11 00:20:00 +00:00
Jim Grosbach
c9a1dd9291
SjLj based exception handling unwinding support. This patch is nasty, brutish
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and short. Well, it's kinda short. Definitely nasty and brutish.
The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.
Built on Darwin and verified no llvm-core "make check" regressions.
llvm-svn: 78625
2009-08-11 00:09:57 +00:00
Evan Cheng
49aac700f4
Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.
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llvm-svn: 78622
2009-08-10 23:56:04 +00:00
Dan Gohman
888bcd3483
Fix a bug where DAGCombine was producing an illegal ConstantFP
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node after legalize, and remove the workaround code from the
ARM backend.
llvm-svn: 78615
2009-08-10 23:15:10 +00:00
Owen Anderson
b4bce99769
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
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llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Eric Christopher
e1bfb18ec3
Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes.
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No functional change.
llvm-svn: 78608
2009-08-10 22:37:37 +00:00
David Goodwin
36a5b02e4f
Use NEON for single-precision int<->FP conversions.
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llvm-svn: 78604
2009-08-10 22:17:39 +00:00
Devang Patel
d56797d16f
Do not rely on magic "llvm.dbg.*" global variable name to find debug info.
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PIC16 developers, please verify.
llvm-svn: 78603
2009-08-10 22:11:20 +00:00
Eric Christopher
88514e18ca
Fix up whitespace, remove commented out code.
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llvm-svn: 78600
2009-08-10 21:48:58 +00:00
Daniel Dunbar
1ff8dc01aa
llvm-mc/AsmParser: Disambiguate i64i8imm.
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llvm-svn: 78598
2009-08-10 21:06:41 +00:00