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10337 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
e00538e23e Avoid using a live std::multimap iterator while editing the map. It looks like 
we sometimes compare singular iterators, reported by ENABLE_EXPENSIVE_CHECKS.
This fixes PR7825.

llvm-svn: 110355
 2010-08-05 18:12:19 +00:00
Bill Wendling
446a54d234 The lower invoke pass needs to have unreachable code elimination run after it 
because it could create such things. This fixes a MingW buildbot test failure.

llvm-svn: 110279
 2010-08-04 23:36:02 +00:00
Jakob Stoklund Olesen
dc6e812510 Coalesce stack slot accesses that arise when spilling both sides of a COPY. 
This helps avoid silly code:

    %R0<def = LOAD <fi#5>
    STORE <fi#5>, %R0<kill>

llvm-svn: 110266
 2010-08-04 22:35:11 +00:00
Jakob Stoklund Olesen
ecaa9f6ba4 Checkpoint SplitKit progress. 
We are now at a point where we can split around simple single-entry, single-exit
loops, although still with some bugs.

llvm-svn: 110257
 2010-08-04 22:08:39 +00:00
Devang Patel
4c36d66bde Use location entry only of the location described by DBG_VALUE is valid. 
llvm-svn: 110255
 2010-08-04 22:07:27 +00:00
Bill Wendling
249580ed17 The EH prepare passes really want to be the last passes run before code-gen. 
llvm-svn: 110248
 2010-08-04 21:44:13 +00:00
Devang Patel
35e3dd45c0 Fix typo in comment. 
llvm-svn: 110244
 2010-08-04 20:32:36 +00:00
Dan Gohman
670b397ecc Change this llvm_unreachable to report_fatal_error, since it can 
be triggered by valid, if dubious, IR.

llvm-svn: 110240
 2010-08-04 18:51:09 +00:00
Devang Patel
cd5912c7bf While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack. 
llvm-svn: 110235
 2010-08-04 18:42:02 +00:00
Devang Patel
eb7cff69c8 If a variable is spilled by code generator then use DW_OP_fbreg to describe its location on stack. 
llvm-svn: 110234
 2010-08-04 18:40:52 +00:00
Dan Gohman
227c4f64ac Eliminate unnecessary empty string literals. 
llvm-svn: 110183
 2010-08-04 01:39:08 +00:00
Jakob Stoklund Olesen
38a3f83da5 Oops. Don't normalize spill weights twice. 
When the normalizeSpillWeights function was introduced, I forgot to remove this
normalization.

This change could affect register allocation. Hopefully for the better.

llvm-svn: 110119
 2010-08-03 17:21:16 +00:00
Bill Wendling
9cd35987d2 Early exit and reduce indentation. No functionality change. 
llvm-svn: 110069
 2010-08-02 22:06:08 +00:00
Devang Patel
8a18e29b50 Free DbgScope created for dead functions. 
llvm-svn: 110045
 2010-08-02 17:32:15 +00:00
Oscar Fuentes
4742c01c2a Prefix next' iterator operation with llvm::'. 
Fixes potential ambiguity problems on VS 2010.

Patch by nobled!

llvm-svn: 110029
 2010-08-02 06:00:15 +00:00
Eli Friedman
081daa15e1 PR7586: Make sure we don't claim that unknown bits are actually known in the 
ISD::AND case of TargetLowering::SimplifyDemandedBits.

llvm-svn: 110019
 2010-08-02 04:42:25 +00:00
Bill Wendling
36376df573 Reference the personalities. Don't copy them into a new vector. 
llvm-svn: 109966
 2010-08-01 01:34:21 +00:00
Eli Friedman
bea7c851cf Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly 
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.

llvm-svn: 109854
 2010-07-30 06:44:31 +00:00
Benjamin Kramer
d1340209a1 Plug the remaining MC leaks by giving MCObjectStreamer/MCAsmStreamer ownership of the TargetAsmBackend and the MCCodeEmitter. 
llvm-svn: 109767
 2010-07-29 17:48:06 +00:00
Dale Johannesen
71204e008b Comment typo. 
llvm-svn: 109765
 2010-07-29 17:45:24 +00:00
Jakob Stoklund Olesen
7f337a8e64 Fix a bug in the -regalloc=fast handling of exotic two-address instruction with 
multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715
 2010-07-29 00:52:19 +00:00
Jakob Stoklund Olesen
7ac201b2e3 Print out the regclass of any virtual registers used by a machine instruction. 
llvm-svn: 109608
 2010-07-28 18:35:46 +00:00
Devang Patel
38a7221118 It is FE's responsibility to emit proper directory name. 
llvm-svn: 109538
 2010-07-27 20:51:15 +00:00
Jim Grosbach
2f4adcee5f Grammar 
llvm-svn: 109525
 2010-07-27 18:36:27 +00:00
Nate Begeman
15fe179ecb Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself 
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.

llvm-svn: 109519
 2010-07-27 18:02:18 +00:00
Jim Grosbach
4d81e796cb 80 column 
llvm-svn: 109513
 2010-07-27 17:38:47 +00:00
Jim Grosbach
7e561eb81c fix typo 
llvm-svn: 109511
 2010-07-27 17:14:29 +00:00
Bill Wendling
bb2398331b It's better to have the arrays, which would trigger the creation of stack 
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.

llvm-svn: 109481
 2010-07-27 01:55:19 +00:00
Jakob Stoklund Olesen
2b379c4339 Add SplitEditor to SplitKit. This class will be used to edit live intervals and 
rewrite instructions for live range splitting.

Still work in progress.

llvm-svn: 109469
 2010-07-26 23:44:11 +00:00
Dan Gohman
64157c1919 Fix a use-after-free. 
llvm-svn: 109468
 2010-07-26 23:40:24 +00:00
Bill Wendling
efed27734e Using llvm.eh.catch.all.value instead of .llvm.eh.catch.all.value. 
llvm-svn: 109462
 2010-07-26 22:36:52 +00:00
Evan Cheng
e5f7eaf10c The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling. 
llvm-svn: 109449
 2010-07-26 21:49:07 +00:00
Dan Gohman
52e662a7f7 Handle Values with no value in getCopyFromRegs. 
llvm-svn: 109415
 2010-07-26 18:15:41 +00:00
Dan Gohman
8f7e88352a A block dominates itself, by definition. 
llvm-svn: 109402
 2010-07-26 17:38:15 +00:00
Duncan Sands
0f0329ea35 Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter) 
may be used uninitialized in the callers of HighRegPressure.

llvm-svn: 109393
 2010-07-26 07:54:17 +00:00
Lang Hames
998b522009 Factored out a bit of common code to mark VNInfos for deletion. 
llvm-svn: 109388
 2010-07-26 01:49:41 +00:00
Evan Cheng
94e820829a Add comments. 
llvm-svn: 109383
 2010-07-25 18:59:43 +00:00
Bob Wilson
4f9b0d9fad Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on 
those.  Radar 8231572.

llvm-svn: 109367
 2010-07-25 05:34:27 +00:00
Anton Korobeynikov
2a0715eb1b Add hook to insert late LLVM=>LLVM passes just before isel 
llvm-svn: 109354
 2010-07-24 20:48:54 +00:00
Bob Wilson
59114a12b8 Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectors 
instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K
won't cause a compile time performance regression.

llvm-svn: 109330
 2010-07-24 06:01:53 +00:00
Devang Patel
df9f5bf991 Use current working directory when Dirname is empty. This only happens when absolute source file path is used on compiler command line. 
llvm-svn: 109302
 2010-07-24 00:53:22 +00:00
Evan Cheng
a0b74d8804 Add an ILP scheduler. This is a register pressure aware scheduler that's 
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.

On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.

llvm-svn: 109300
 2010-07-24 00:39:05 +00:00
Jim Grosbach
30d0fca117 Remove too-strict assertion. We may want the vreg copy of the physical register 
to be of a different register class. For example, in Thumb1 if the live-in is
a high register, we want the vreg to be a low register. rdar://8224931

llvm-svn: 109291
 2010-07-23 23:48:02 +00:00
Devang Patel
7049c83125 Revert r109262. 
llvm-svn: 109285
 2010-07-23 23:04:41 +00:00
Evan Cheng
f215e55d5f - Allow target to specify when is register pressure "too high". In most cases, 
it's too late to start backing off aggressive latency scheduling when most
  of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
  For ARM, this is almost always a win on # of instructions. It's runtime
  neutral for most of the tests. But for some kernels with high register
  pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
  54 and sped up by 20%.

llvm-svn: 109279
 2010-07-23 22:39:59 +00:00
Dan Gohman
1694c4352a Use the proper type for shift counts. This fixes a bootstrap error. 
llvm-svn: 109265
 2010-07-23 21:08:12 +00:00
Devang Patel
01d5937192 IF directory name is empty then try to extract one using absolute file name. 
llvm-svn: 109262
 2010-07-23 20:36:13 +00:00
Dan Gohman
8859ab786b DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits 
are not demanded. This often allows the anyext to be folded away.

llvm-svn: 109242
 2010-07-23 18:03:30 +00:00
Dan Gohman
b5a26419b8 Make SDNode::dump() print a newline at the end. 
llvm-svn: 109234
 2010-07-23 16:37:47 +00:00
Eric Christopher
308237108d 80-col. 
llvm-svn: 109205
 2010-07-23 01:05:59 +00:00