Evan Cheng
e458553c73
Bye bye HACKTROCITY.
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llvm-svn: 24935
2005-12-22 02:26:21 +00:00
Evan Cheng
fb6413e05a
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Evan Cheng
add305de26
Oops. Accidentally deleted RET pattern. It's still needed for return void;
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llvm-svn: 24920
2005-12-21 22:22:16 +00:00
Jim Laskey
d82881490c
Disengage DEBUG_LOC from non-PPC targets.
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llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Chris Lattner
347c6eedae
This was meant to go in
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llvm-svn: 24900
2005-12-21 07:50:26 +00:00
Chris Lattner
884def40f4
Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns
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that were overloaded to work before and after the stackifier runs. With the
new clean world, it is possible to write patterns for these instructions: woo!
This also adds a few simple patterns here and there, though there are a lot
still missing. These should be easy to add though. :)
See the comments under "Floating Point Stack Support" for more details on
the new world order.
This patch as absolutely no effect on the generated code, woo!
llvm-svn: 24899
2005-12-21 07:47:04 +00:00
Chris Lattner
ee15b5393f
Wrap some long lines: no functionality change
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llvm-svn: 24898
2005-12-21 05:34:58 +00:00
Evan Cheng
cab6710034
Remove ISD::RET select code. Now tblgen'd.
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llvm-svn: 24889
2005-12-21 02:41:57 +00:00
Evan Cheng
0226113ed5
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
ace8f1fafa
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
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llvm-svn: 24886
2005-12-20 22:59:51 +00:00
Evan Cheng
1c3ea75ffc
Added X86 readport patterns.
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llvm-svn: 24879
2005-12-20 07:38:38 +00:00
Evan Cheng
44e4e6a57f
Added a hook to print out names of target specific DAG nodes.
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llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Evan Cheng
bb34a50cb0
X86 conditional branch support.
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llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
c87099506c
It's essential we clear CodeGenMap after isel every basic block!
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llvm-svn: 24867
2005-12-19 22:36:02 +00:00
Chris Lattner
399dfec939
eliminate some redundancy
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llvm-svn: 24781
2005-12-17 19:47:05 +00:00
Evan Cheng
56649f9616
Darwin API issue: indirect load of external and weak symbols.
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llvm-svn: 24775
2005-12-17 09:13:43 +00:00
Evan Cheng
a3ff796fda
Remove a few lines of dead code.
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llvm-svn: 24768
2005-12-17 07:18:44 +00:00
Evan Cheng
de142995a1
Added an idea about any_extend for performance tuning.
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llvm-svn: 24763
2005-12-17 06:54:43 +00:00
Evan Cheng
c308dfb801
Added truncate.
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llvm-svn: 24760
2005-12-17 02:02:50 +00:00
Evan Cheng
6a94c77c55
Added anyext, modelled as zext on X86.
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llvm-svn: 24759
2005-12-17 01:47:57 +00:00
Evan Cheng
19550821d1
Added some isel ideas.
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llvm-svn: 24757
2005-12-17 01:25:19 +00:00
Evan Cheng
5d90b26707
Added support for cmp, test, and conditional move instructions.
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llvm-svn: 24756
2005-12-17 01:24:02 +00:00
Evan Cheng
566600c17d
Only lower SELECT when using DAG based isel.
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llvm-svn: 24755
2005-12-17 01:22:13 +00:00
Evan Cheng
d51da93a03
X86 lowers SELECT to a cmp / test followed by a conditional move.
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llvm-svn: 24754
2005-12-17 01:21:05 +00:00
Chris Lattner
71443a0e36
Don't globalize internal functions
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llvm-svn: 24727
2005-12-16 00:07:30 +00:00
Evan Cheng
43152cb8b6
* Promote all 1 bit entities to 8 bit.
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* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
llvm-svn: 24726
2005-12-15 19:49:23 +00:00
Evan Cheng
f72e7055c0
Added frameindex, constpool, globaladdr, and externalsym as root nodes of
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leaaddr.
llvm-svn: 24724
2005-12-15 08:31:04 +00:00
Evan Cheng
cc6efa8b6f
Handling zero extension of 1 bit value.
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llvm-svn: 24722
2005-12-15 01:02:48 +00:00
Evan Cheng
576b826f71
Use MOV8rm to load 1 bit value.
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llvm-svn: 24721
2005-12-15 00:59:17 +00:00
Evan Cheng
40e397521c
Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
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llvm-svn: 24717
2005-12-14 22:28:18 +00:00
Evan Cheng
3b094e89fb
Added sext and zext patterns.
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llvm-svn: 24705
2005-12-14 02:22:27 +00:00
Evan Cheng
ad1e2fd14a
Add load + store folding srl and sra patterns.
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llvm-svn: 24696
2005-12-13 07:24:22 +00:00
Chris Lattner
95555853ad
Use the shared asmprinter code for printing special llvm globals
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llvm-svn: 24695
2005-12-13 06:32:50 +00:00
Chris Lattner
0975e89328
Add ELF and darwin support for static ctors and dtors
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llvm-svn: 24693
2005-12-13 04:53:51 +00:00
Evan Cheng
63f60d3edb
Beautify a few patterns.
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llvm-svn: 24690
2005-12-13 02:40:18 +00:00
Evan Cheng
95d46be9e6
Some shl patterns which do load + store folding.
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llvm-svn: 24689
2005-12-13 02:34:51 +00:00
Evan Cheng
6beadf1c29
A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
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llvm-svn: 24688
2005-12-13 01:57:51 +00:00
Evan Cheng
d233c28d29
Add and, or, and xor patterns which fold load + stores.
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llvm-svn: 24687
2005-12-13 01:41:36 +00:00
Evan Cheng
62999d6c5d
Add inc + dec patterns which fold load + stores.
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llvm-svn: 24686
2005-12-13 01:02:47 +00:00
Evan Cheng
7f9fb7b095
Add neg and not patterns which fold load + stores.
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llvm-svn: 24685
2005-12-13 00:54:44 +00:00
Evan Cheng
240071c011
Missed a couple redundant explicit type casts.
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llvm-svn: 24684
2005-12-13 00:25:07 +00:00
Evan Cheng
e80ec06aaf
Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
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llvm-svn: 24683
2005-12-13 00:14:11 +00:00
Evan Cheng
ea7f208813
* Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
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This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.
llvm-svn: 24682
2005-12-13 00:01:09 +00:00
Evan Cheng
0ee9dc460a
Add some integer mul patterns.
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llvm-svn: 24681
2005-12-12 23:47:46 +00:00
Evan Cheng
6c9f9ea7ec
Add some sub patterns.
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llvm-svn: 24675
2005-12-12 21:54:05 +00:00
Evan Cheng
76923d3512
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
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base or index operands being selected.
llvm-svn: 24674
2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
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first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
llvm-svn: 24673
2005-12-12 20:32:18 +00:00
Chris Lattner
08c38b28db
remove some never-completed and now-obsolete code.
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llvm-svn: 24671
2005-12-12 20:12:20 +00:00
Evan Cheng
145318aefb
Add a few more add / store patterns. e.g. ADD32mi8.
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llvm-svn: 24670
2005-12-12 19:45:23 +00:00