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Commit Graph

134942 Commits

Author SHA1 Message Date
Vedant Kumar
e0a446097e [llvm-cov] Improve error messages
While we're at it, extend an existing test to make sure that error
messages look reasonable.

llvm-svn: 275520
2016-07-15 01:53:39 +00:00
Lang Hames
f3982b3804 [Kaleidoscope][BuildingAJIT] Start filling in text for chapter 3.
llvm-svn: 275518
2016-07-15 01:39:49 +00:00
Vedant Kumar
9bd027cb2c [llvm-cov] Fix a use-after-free
Taking a lock before appending to a vector does no good unless threads
reading from the vector also take the lock, because the vector could be
re-sized.

I don't have a good isolated test for this. I found the issue with ASan
while testing a large project.  I'm working on a bot that does this.

llvm-svn: 275516
2016-07-15 01:19:36 +00:00
Vedant Kumar
fe8fff3fe2 [llvm-cov] Clean up an awkward capture-by-reference (NFC)
Writing `for (StringRef &SourceFile : ...)` is strange to begin with.
Subsequently capturing "SourceFile" by reference is even stranger. Just
copy the StringRef, since that's cheap to do.

llvm-svn: 275515
2016-07-15 01:19:35 +00:00
Vedant Kumar
493ce5ef6c [Coverage] Mark a few more methods const (NFC)
llvm-svn: 275514
2016-07-15 01:19:33 +00:00
Matt Arsenault
30ac294bf5 AMDGPU: Fix not expanding control flow after some kill blocks
Also stop trying to insert skip blocks at end_cf. This
was inserting them at the end of the block which doesn't make
sense. The skip should be inserted at the beginning of the block
right after the end cf. Just remove this for now since no tests
seem to stress this and I think this can be handled more generally
later.

Fixes bug 28550

llvm-svn: 275510
2016-07-15 00:58:15 +00:00
Matt Arsenault
fc17b3d32f AMDGPU: Fix trying to skip from a block with no successors
Found while reducing bug 28550

llvm-svn: 275509
2016-07-15 00:58:13 +00:00
Matt Arsenault
74e8d16a75 AMDGPU: Fix splitting kill blocks with defs before kill
llvm-svn: 275508
2016-07-15 00:58:09 +00:00
Haicheng Wu
2eca9fbfd4 [AArch64] Set COPY ZR isAsCheapAsAMove when needed.
If a subtarget has both ZCZeroing and CustomCheapAsMoveHandling features (now
only Kryo has both), set COPY (W|X)ZR isAsCheapAsAMove.

Differential Revision: http://reviews.llvm.org/D22360

llvm-svn: 275503
2016-07-15 00:27:01 +00:00
Reid Kleckner
1257a0ef0f [codeview] Shrink inlined call site line info tables
For a fully inlined call chain like a -> b -> c -> d, we were emitting
line info for 'd' 3 separate times: once for d's actual InlineSite line
table, and twice for 'b' and 'c'. This is particularly inefficient when
all these functions are in different headers, because now we need to
encode the file change. Windbg was coping with our suboptimal output, so
this should not be noticeable from the debugger.

llvm-svn: 275502
2016-07-14 23:47:15 +00:00
Tim Northover
fa62fe2415 llvm-objdump: extend __mh_execute_header handling to other special syms
We don't need to print any of the special __mh_*_header symbols when
disassembling. Since they point at the beginning of the segment (not where the
actual code is) they're pretty misleading.

Should also fix lld bots.

llvm-svn: 275498
2016-07-14 23:13:03 +00:00
Simon Pilgrim
590f1569f5 [X86][AVX2] Allow VPERMPD/VPERMQ shuffles to call combineShuffle (reapplied)
This improves the situation discussed in D19228 where we were forcing VPERMPD/VPERMQ where VPERM2F128/VPERM2I128 would have been better.

This was incorrectly reverted in rL275421 during triage of PR28552.

llvm-svn: 275497
2016-07-14 23:05:09 +00:00
Adam Nemet
8e42eac458 [LoopDist] Fix typo in diagnostic
llvm-svn: 275495
2016-07-14 22:33:46 +00:00
Tim Northover
e1d0ae5c7a llvm-objdump: handle stubbed and malformed dylibs better
We were quite happy to read past the end of the valid section data when
disassembling. Instead we entirely skip stub dylibs, and tell the user what's
happened if their section only has partial data.

llvm-svn: 275487
2016-07-14 22:13:32 +00:00
Ekaterina Romanova
6c28f8233c [GVN] Fold constant expression in GVN.
Fix for PR 28418.

opt never finishes compiling a test when -gvn option is passed.
The problem is caused by the fact that GVN fails to fold a constant expression.

Differential Revision: https://reviews.llvm.org/D22185

llvm-svn: 275483
2016-07-14 22:02:25 +00:00
Peter Collingbourne
b54bee8ab7 Move legacy LTO interface headers to legacy/ directory.
Differential Revision: https://reviews.llvm.org/D22173

llvm-svn: 275476
2016-07-14 21:21:16 +00:00
Teresa Johnson
8ec572f211 [ThinLTO/gold] Perform index-based weak/linkonce resolution
Summary:
Invoke the weak/linkonce symbol resolution support (already used by
libLTO) that operates via the summary index.

This ensures prevailing linkonce are kept, by making them weak, and
marks preempted copies as available_externally when possible.

With this change, the older support for keeping the prevailing linkonce
(by changing their symbol resolution) is removed.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: http://reviews.llvm.org/D22302

llvm-svn: 275474
2016-07-14 21:13:24 +00:00
Matthew Simpson
94a623f838 [LV] Rename StrideAccesses to AccessStrideInfo (NFC)
We now collect all accesses with a constant stride, not just the ones with a
stride greater than one. This change was requested in the review of D19984.

llvm-svn: 275473
2016-07-14 21:05:08 +00:00
Matthew Simpson
b1999c4c21 [LV] Allow interleaved accesses in loops with predicated blocks
This patch allows the formation of interleaved access groups in loops
containing predicated blocks. However, the predicated accesses are prevented
from forming groups.

Differential Revision: https://reviews.llvm.org/D19694

llvm-svn: 275471
2016-07-14 20:59:47 +00:00
Sanjay Patel
713c88d012 don't repeat function names in comments; NFC
llvm-svn: 275470
2016-07-14 20:54:43 +00:00
Lang Hames
d1a7c9bf5c [Object] Change Archive::findSym to return an Expected<Optional<Child>>.
As suggested by Rafael in review of D22079 - this was accidentally left out of
the final commit (r275316).

llvm-svn: 275469
2016-07-14 20:44:27 +00:00
Davide Italiano
a99bed9654 [SCCP] Pass the Solver by reference, copies are expensive ...
.. enough to cause LTO compile time to regress insanely.
Thanks *a lot* to Rafael for reporting the problem and testing
the fix!

llvm-svn: 275468
2016-07-14 20:25:54 +00:00
Mehdi Amini
82224ee8b4 Add recently added TargetOptions::EnableIPRA member to operator==
llvm-svn: 275467
2016-07-14 20:22:13 +00:00
Sanjoy Das
f04600393d [ValueTracking] Use Instruction::getFunction; NFC
llvm-svn: 275465
2016-07-14 20:19:01 +00:00
Justin Lebar
7133008e1f s/constexpr/LLVM_CONSTEXPR in AArch64InstrInfo.cpp.
Yet again.

llvm-svn: 275463
2016-07-14 20:08:23 +00:00
Krzysztof Parzyszek
6edea3d184 [Hexagon] Packetize function call arguments with tail call instructions
On Hexagon is it legal to packetize the instructions setting up call
arguments with the call instruction itself. This was already done,
except for tail calls. Make sure tail calls are handled as well.

llvm-svn: 275458
2016-07-14 19:30:55 +00:00
Evandro Menezes
b9597d4640 [AArch64] Adjust the scheduling model for Exynos-M1.
Enable use-postra-scheduler. (NFC)

llvm-svn: 275457
2016-07-14 19:25:46 +00:00
Sanjoy Das
57f741eb50 [JumpThreading] PRE unordered loads
Summary: Extend JumpThreading's PRE to unordered atomic loads.

Reviewers: hfinkel, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D22326

llvm-svn: 275456
2016-07-14 19:21:15 +00:00
Krzysztof Parzyszek
7382f64ece Add debugging code to the packetizer
llvm-svn: 275455
2016-07-14 19:04:26 +00:00
Jun Bum Lim
11a2b91ee2 [PM] Port Dead Loop Deletion Pass to the new PM
Summary: Port Dead Loop Deletion Pass to the new pass manager.

Reviewers: silvas, davide

Subscribers: llvm-commits, sanjoy, mcrosier

Differential Revision: https://reviews.llvm.org/D21483

llvm-svn: 275453
2016-07-14 18:28:29 +00:00
Justin Lebar
3ba0e89767 [CodeGen] Refactor MachineMemOperand::Flags's target-specific flags.
Summary:
Make the target-specific flags in MachineMemOperand::Flags real, bona
fide enum values.  This simplifies users, prevents various constants
from going out of sync, and avoids the false sense of security provided
by declaring static members in classes and then forgetting to define
them inside of cpp files.

Reviewers: MatzeB

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22372

llvm-svn: 275451
2016-07-14 18:15:20 +00:00
Justin Bogner
45e70b6850 TableGen: Fix a confusing use of both i and I as variables. NFC
llvm-svn: 275450
2016-07-14 18:08:33 +00:00
Kostya Serebryany
9281d8bfeb [sanitizer-coverage] make sure that calls to __sanitizer_cov_trace_pc are not merged (otherwise different calls get the same PC and confuse fuzzers)
llvm-svn: 275449
2016-07-14 17:59:01 +00:00
Nirav Dave
29b7bfa64f [X86][MC] Fix bracket expression parsing in intel-style assembly.
Only perform struct field check on Identifier tokens.

Fixes PR28547.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22361

llvm-svn: 275445
2016-07-14 17:37:05 +00:00
Ahmed Bougacha
af512cd747 [GlobalISel] Fix G_OR opcode after the addition of a TargetOpcode.
r275367 fixed G_ADD and G_BR, but not G_OR.

llvm-svn: 275444
2016-07-14 17:29:49 +00:00
Ahmed Bougacha
a8ae6ae537 [CodeGen] Simplify reg bank/class union is+get into dyn_cast. NFC.
llvm-svn: 275443
2016-07-14 17:29:46 +00:00
Saleem Abdulrasool
f5a822f094 X86: handle external tail calls in Windows JIT
If there was a tail call, we would incorrectly handle the relocation.  It would
end up indexing into the array with an incorrect section id.  The symbol was
external to the module, so the Section ID was UNDEFINED (-1).  We would then
index the SmallVector with this ID, triggering an assertion.  Use the Value
rather than the section load address in this case.

llvm-svn: 275442
2016-07-14 17:27:06 +00:00
Justin Lebar
2fcb5c4212 [CodeGen] s/constexpr/LLVM_CONSTEXPR/ in MachineMemOperand.h.
llvm-svn: 275441
2016-07-14 17:16:40 +00:00
Sanjay Patel
7273ff2021 auto-generate checks
Note: I removed the checks after each jump because that's noise, but we apparently 
need branches rather than returning i1 to see the bt codegen in some cases.

llvm-svn: 275439
2016-07-14 17:07:55 +00:00
Justin Lebar
5b54478715 [CodeGen] Refactor MachineMemOperand's Flags enum.
Summary:
- Give it a shorter name (because we're going to refer to it often from
  SelectionDAG and friends).

- Split the flags and alignment into separate variables.

- Specialize FlagsEnumTraits for it, so we can do bitwise ops on it
  without losing type information.

- Make some enum values constants in MachineMemOperand instead.
  MOMaxBits should not be a valid Flag.

- Simplify some of the bitwise ops for dealing with Flags.

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D22281

llvm-svn: 275438
2016-07-14 17:07:44 +00:00
Tim Northover
71f4182372 ARM: fix vmov.i64 immediate validity check
Typo meant we were only checking the low byte (repeatedly).

llvm-svn: 275437
2016-07-14 17:04:34 +00:00
Tom Stellard
f071f36723 GlobalsAA: Functions with the argmemonly attribute won't read arbitrary globals
Summary:
In preparation for changing GlobalsAA to stop assuming that intrinsics
can't read arbitrary globals, we need to make sure GlobalsAA is querying
function attributes rather than relying on this assumption.

This patch was inspired by: http://reviews.llvm.org/D20206

Reviewers: jmolloy, hfinkel

Subscribers: eli.friedman, llvm-commits

Differential Revision: https://reviews.llvm.org/D21318

llvm-svn: 275433
2016-07-14 15:50:27 +00:00
Nico Weber
c1714f06d7 Don't optimize movs to pushes in -O0 builds.
https://reviews.llvm.org/D22362

llvm-svn: 275431
2016-07-14 15:40:22 +00:00
Nico Weber
9a98abcd5d Delete some trailing whitespace.
llvm-svn: 275429
2016-07-14 15:07:44 +00:00
Ahmed Bougacha
9d56162be1 [X86] Decode MPX BND registers.
We were able to assemble, but not disassemble.

Note that fixupRMValue was truncating EA_REG_BND0-3 because we hit
the uint8_t max.  The control registers were already squarely above
it, but I don't think they ever go in .r/m, only in .reg.

I also did notice an extra REX.W in our encoding, but I think that's
fine.

llvm-svn: 275427
2016-07-14 14:53:21 +00:00
Ahmed Bougacha
2e4800fe66 [X86] Don't mark addressing mode operands as "outs". NFC-ish.
Nothing in-tree can tell the difference, but it's incorrect: the
addressing mode registers aren't what's defined.

llvm-svn: 275426
2016-07-14 14:53:17 +00:00
Ahmed Bougacha
72f3c45c2f [TableGen] Autobrief-ize Record. NFC.
llvm-svn: 275425
2016-07-14 14:53:14 +00:00
Ahmed Bougacha
34b0efb1cb [TableGen] Cleanup Record comments. NFC.
LLVM doesn't use exceptions anymore.
Also remove the implementation comments. Some of them diverged.

llvm-svn: 275424
2016-07-14 14:53:11 +00:00
Ahmed Bougacha
c114d59245 [GlobalISel] Fix #include ordering/spacing. NFC.
llvm-svn: 275423
2016-07-14 14:52:55 +00:00
Sam Kolton
b241673741 [AMDGPU] Assembler: fix row_bcast parsing
Summary: This change fix bug 28538

Reviewers: tstellarAMD, vpykhtin

Subscribers: arsenm, kzhuravl

Differential Revision: https://reviews.llvm.org/D22355

llvm-svn: 275422
2016-07-14 14:50:35 +00:00