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Commit Graph

41151 Commits

Author SHA1 Message Date
Florian Hahn
e1717245c4 [BreakCritEdges] Add option to opt-out of perserving loop-simplify.
This patch adds a new option to CriticalEdgeSplittingOptions to control
whether loop-simplify form must be preserved. It is them used by GVN to
indicate that loop-simplify form does not have to be preserved.

This fixes a crash exposed by 189efe295b6e.

If the critical edge we are splitting goes from a block inside a loop to
a block outside the loop, splitting the edge will create a new exit
block. As a result, the new block will branch to the original exit
block, which will add a non-loop predecessor, breaking loop-simplify
form. To preserve loop-simplify form, the predecessor blocks of the
original exit are split, but that does not work for blocks with
indirectbr terminators. If preserving loop-simplify form is requested,
bail out , before making any changes.

Reviewers: reames, hfinkel, davide, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D81582
2020-06-12 11:47:13 +01:00
Raphael Isemann
7f1836ef62 Add missing IRBuilder include to IndirectThunks.h
This file didn't build with enabled modules.
2020-06-12 11:31:58 +02:00
Cyndy Ishida
fd46376e35 [llvm][llvm-nm] add TextAPI/MachO support
Summary:
This completes the needed glueing to support reading tbd files from nm.
This includes specifying which slice filtering with `--arch` and a new
option specifically for tbd files `--add-inlinedinfo` which will show
the reexported libraries that are appended in the tbd file.

Reviewers: ributzka, steven_wu, JDevlieghere, jhenderson

Reviewed By: JDevlieghere

Subscribers: hiraditya, MaskRay, dexonsmith, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81614
2020-06-11 18:54:16 -07:00
Reid Kleckner
6a61ba0a54 Re-land "Migrate the rest of COFFObjectFile to Error"
This reverts commit 101fbc01382edd89ea7b671104c68b30b2446cc0.

Remove leftover debugging attribute.

Update LLDB as well, which was missed before.
2020-06-11 14:46:16 -07:00
diggerlin
9ad4371a4e [NFC] clean up the AsmPrinter::emitLinkage for AIX part
SUMMARY:

Since we deal with aix emitLinkage in the PPCAIXAsmPrinter::emitLinkage() in the patch https://reviews.llvm.org/D75866. It do not go to AsmPrinter::emitLinkage() any more, we clean up some aix related code in the AsmPrinter::emitLinkage()

Reviewers:  Jason liu

Differential Revision: https://reviews.llvm.org/D81613
2020-06-11 13:33:51 -04:00
Mircea Trofin
3bb35f9974 [llvm][NFC] Factor some common data in InlineAdvice
Summary:
Other derivations will all want to emit optimization remarks and, as
part of that, use debug info.

Additionally, drive-by const-ing.

Reviewers: davidxl, dblaikie

Subscribers: aprantl, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81507
2020-06-11 08:01:00 -07:00
serge-sans-paille
ccfe6b9c85 Fix return status of DataFlowSanitizer pass
Take into account added functions, global values and attribute change.

Differential Revision: https://reviews.llvm.org/D81239
2020-06-11 16:05:17 +02:00
Jay Foad
3e1ffcd6f3 [IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.

Reapply with a bug fix: don't drop the "!KeepOneInputPHIs" argument when
removePredecessor calls PHINode::removeIncomingValue.

Differential Revision: https://reviews.llvm.org/D80206
2020-06-11 14:53:01 +01:00
Jay Foad
4e02859d39 Revert "[IR] Clean up dead instructions after simplifying a conditional branch"
This reverts commit 4494e45316a0bfaabb6bb1450fb0f49a0e6832af.

It caused problems for sanitizer buildbots.
2020-06-11 14:22:16 +01:00
Jay Foad
6d416f5420 [IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.

Differential Revision: https://reviews.llvm.org/D80206
2020-06-11 13:28:10 +01:00
Jay Foad
9fd181aeca [MemCpyOptimizer] Simplify API of processStore and processMem* functions
Previously these functions either returned a "changed" flag or a "repeat
instruction" flag, and could also modify an iterator to control which
instruction would be processed next.

Simplify this by always returning a "changed" flag, and handling all of
the "repeat instruction" functionality by modifying the iterator.

No functional change intended except in this case:
// If the source and destination of the memcpy are the same, then zap it.
... where the previous code failed to process the instruction after the
zapped memcpy.

Differential Revision: https://reviews.llvm.org/D81540
2020-06-11 12:48:09 +01:00
Chris Jackson
392b4a7829 [DebugInfo] Refactor SalvageDebugInfo and SalvageDebugInfoForDbgValues
- Simplify the salvaging interface and the algorithm in InstCombine

Reviewers: vsk, aprantl, Orlando, jmorse, TWeaver

Reviewed by: Orlando

Differential Revision: https://reviews.llvm.org/D79863
2020-06-11 11:13:46 +01:00
Kristof Beyls
c44f71b357 [NFC] Refactor ThunkInserter to make it available for all targets.
By moving target-independent code from
llvm/lib/Target/X86/X86IndirectThunks.cpp
to
llvm/include/llvm/CodeGen/IndirectThunks.h

Differential Revision: https://reviews.llvm.org/D81401
2020-06-11 08:38:44 +01:00
Craig Topper
a946100e5c [X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC 2020-06-10 22:06:34 -07:00
Craig Topper
e134b6d7b8 Revert "[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC"
This reverts commit 874800b4f7e4312a283b0638e832ec92a88540f4.

Forgot to update the clang includes
2020-06-10 21:24:44 -07:00
Craig Topper
a2010ebc11 [X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC 2020-06-10 21:18:32 -07:00
Vitaly Buka
436769363c [StackSafety] Pass summary into codegen
Summary:
The patch wraps ThinLTO index into immutable
pass which can be used by StackSafety analysis.

Reviewers: eugenis, pcc

Reviewed By: eugenis

Subscribers: hiraditya, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80985
2020-06-10 21:02:54 -07:00
Xing GUO
cb2b5ffc50 [DWARFYAML][debug_ranges] Make the "Offset" field optional.
Before this patch, we have to calculate the offset for the current range list entry. This patch helps make the "Offset" field optional.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D81220
2020-06-11 08:36:44 +08:00
Hongtao Yu
9bce9489e7 [LLD][ThinLTO] Add --thinlto-single-module to allow compiling partial modules.
This change introduces an LLD switch --thinlto-single-module to allow compiling only a part of the input modules. This is specifically enables:

  1. Fast investigating/debugging modules of interest without spending time on compiling unrelated modules.
  2. Compiler debug dump with -mllvm -debug-only= for specific modules.

It will be useful for large applications which has 1K+ input modules for thinLTO.

The switch can be combined with `--lto-obj-path=` or `--lto-emit-asm` to obtain intermediate object files or assembly files. So far the module name matching is implemented as a fuzzy name lookup where the modules with name containing the switch value are compiled.

E.g,
Command:
     ld.lld main.o thin.a --thinlto-single-module=thin.a --lto-obj-path=single.o
log:
     [ThinLTO] Selecting thin.a(thin1.o at 168) to compile
     [ThinLTO] Selecting thin.a(thin2.o at 228) to compile
Command:
     ld.lld main.o thin.a --thinlto-single-module=thin1.o --lto-obj-path=single.o
log:
     [ThinLTO] Selecting thin.a(thin1.o at 168) to compile

Differential Revision: https://reviews.llvm.org/D80406
2020-06-10 15:32:30 -07:00
Saiyedul Islam
7246ade333 [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 2
Summary:
New file include to support platform dependent grid constants. It will be
used by clang, libomptarget plugins, and deviceRTLs to access constant
values consistently and with fast access in the deviceRTLs.

Originally authored by Greg Rodgers (@gregrodgers).

Reviewers: arsenm, sameerds, jdoerfert, yaxunl, b-sumner, scchan, JonChesterfield

Reviewed By: arsenm

Subscribers: llvm-commits, pdhaliwal, jholewinski, jvesely, wdng, nhaehnle, guansong, kerbowa, sstefan1, cfe-commits, ronlieb, gregrodgers

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80917
2020-06-10 18:09:59 +00:00
Matt Arsenault
d31b214b3c GlobalISel: Move LegalizerHelper members around
MIRBuilder was in the middle of of a bunch of methods and not group
with the other member variables, which made it harder to see what
state this carries around. Move these to the top as is the usual
convention.
2020-06-10 13:56:53 -04:00
Matt Arsenault
4211eac508 GlobalISel: Make default implementation of legalizeCustom unreachable
If the target explicitly requested custom legalization, it should be
required to implement this. Also move default legalizeIntrinsic
implementation into the header so it's next to the related
legalizeCustom.
2020-06-10 11:05:59 -04:00
Pavel Labath
87448dfa0c [DWARFDebugLine] Use truncating data extractors for prologue parsing
Summary:
This makes the code easier to reason about, as it will behave the same
way regardless of whether there is any more data coming after the
presumed end of the prologue.

Reviewers: jhenderson, dblaikie, probinson, ikudrin

Subscribers: hiraditya, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77557
2020-06-10 16:12:53 +02:00
Kuter Dinel
8fa5621950 Reland: [Attributor] Split the Attributor::run() into multiple functions.
Summary:
This patch splits the Attributor::run() function into multiple
functions.

Simple Logic changes to make this possible:
  # Moved iteration count verification earlier.
  # NumFinalAAs get set a little bit later.

Reviewers: jdoerfert, sstefan1, uenoku

Reviewed By: jdoerfert

Subscribers: hiraditya, uenoku, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81022
2020-06-10 13:21:22 +00:00
Peter Smith
364d6a7c2d [ELF][AArch64] Correct relocation codes for R_<CLS>_PLT32
The relocation codes for R_<CLS>_PLT32 are incorrectly in the dynamic
relocation range that starts at 1024 for AArch64 and 180 for AArch64_32.

Correct these so that they start at the next available static relocation
code in the non-TLS range. The R_<CLS>_PLT32 description is currently in
unpublished so this change corrects LLVM to match the values that will
appear in the final ELF for the 64-bit Arm Architecture document.

Differential Revision: https://reviews.llvm.org/D81410
2020-06-10 14:16:41 +01:00
Marco Elver
84b64ccdba [KernelAddressSanitizer] Make globals constructors compatible with kernel [v2]
[ v1 was reverted by c6ec352a6bde1995794c523adc2ebab802ccdf0a due to
  modpost failing; v2 fixes this. More info:
  https://github.com/ClangBuiltLinux/linux/issues/1045#issuecomment-640381783 ]

This makes -fsanitize=kernel-address emit the correct globals
constructors for the kernel. We had to do the following:

* Disable generation of constructors that rely on linker features such
  as dead-global elimination.

* Only instrument globals *not* in explicit sections. The kernel uses
  sections for special globals, which we should not touch.

* Do not instrument globals that are prefixed with "__" nor that are
  aliased by a symbol that is prefixed with "__". For example, modpost
  relies on specially named aliases to find globals and checks their
  contents. Unfortunately modpost relies on size stored as ELF debug info
  and any padding of globals currently causes the debug info to cause size
  reported to be *with* redzone which throws modpost off.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203493

Tested:
* With 'clang/test/CodeGen/asan-globals.cpp'.

* With test_kasan.ko, we can see:

  	BUG: KASAN: global-out-of-bounds in kasan_global_oob+0xb3/0xba [test_kasan]

* allyesconfig, allmodconfig (x86_64)

Reviewed By: glider

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81390
2020-06-10 15:08:42 +02:00
Sander de Smalen
06cf56579b [AArch64][SVE] Change pointer type of struct load/store intrinsics.
Instead of loading from e.g. `<vscale x 16 x i8>*`, load from element
pointer `i8*`. This is more in line with the other load/store
intrinsics for SVE.

Reviewers: fpetrogalli, c-rhodes, rengolin, efriedma

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81458
2020-06-10 14:02:35 +01:00
Georgii Rymar
ed47bccbaf [yaml2obj] - Introduce a 10 Mb limit of the output by default and a --max-size option.
Multiple times we faced an issue of huge outputs due to unexpected behavior
or incorrect test cases. The last one was https://reviews.llvm.org/D80629#2073066.

This patch limits the output to 10 Mb for ELF and introduces the --max-size to change this
limit.

I've tried to keep the implementation non-intrusive.

The current logic we have is that we prepare section content in a buffer first and write
it to the output later. This patch checks the available limit on each writing attempt to this buffer
and stops writing when the limit is reached and raises the internal error flag.
Later, this flag is is checked before the actual writing to a file happens and
an error is reported.

Differential revision: https://reviews.llvm.org/D81258
2020-06-10 15:23:59 +03:00
sstefan1
73a99e6115 Revert "[Attributor] Split the Attributor::run() into multiple functions."
This reverts commit 0ee47cc92f510e4f21b584dc265105f4d51776a0.
2020-06-10 10:10:49 +00:00
stefan
9f2452c3d9 [Attributor] Split the Attributor::run() into multiple functions.
Summary:
This patch splits the Attributor::run() function into multiple functions.

Simple Logic changes to make this possible:
  # Moved iteration count verification earlier.
  # NumFinalAAs get set a little bit later.

Reviewers: jdoerfert, sstefan1, uenoku

Reviewed By: jdoerfert

Subscribers: hiraditya, uenoku, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81022
2020-06-10 09:48:58 +00:00
Vitaly Buka
63df17ad8b [StackSafety] Add info into function summary
Summary:
This patch adds optional field into function summary,
implements asm and bitcode serialization. YAML
serialization is omitted and can be added later if
needed.

This patch includes this information into summary only
if module contains at least one sanitize_memtag function.
In a near future MTE is the user of the analysis.
Later if needed we can provede more direct control
on when information is included into summary.

Reviewers: eugenis

Subscribers: hiraditya, steven_wu, dexonsmith, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80908
2020-06-10 02:43:28 -07:00
Sam Parker
8ae1625e78 [CostModel] Unify Shuffle and InsertElement Costs
Extract the existing code from getInstructionThroughput into
TTImpl::getUserCost. The duplicated code in the AMDGPU backend has
also been removed.

Differential Revision: https://reviews.llvm.org/D81448
2020-06-10 09:13:34 +01:00
Sam Parker
6ffd0e23b3 [CostModel] Unify getArithmeticInstrCost
Add the remaining arithmetic opcodes into the generic implementation
of getUserCost and then call this from getInstructionThroughput. Most
of the backends have been modified to return the base implementation
for cost kinds other RecipThroughput. The outlier here is AMDGPU
which already uses getArithmeticInstrCost for all the cost kinds.
This change means that most of the opcodes can be removed from that
backends implementation of getUserCost.

Differential Revision: https://reviews.llvm.org/D80992
2020-06-10 09:08:45 +01:00
Craig Topper
141a2eff87 [X86] Assign a feature to tremont, goldmont, goldmont-plus, icelake-client, and icelake for target multiversioning priority.
Without this these CPUs all caused the compiler to assert when
used for multiversioning.
2020-06-09 16:39:41 -07:00
diggerlin
d98ed2e336 [AIX] supporting the visibility attribute for aix assembly
SUMMARY:

in the aix assembly , it do not have .hidden and .protected directive.
in current llvm. if a function or a variable which has visibility attribute, it will generate something like the .hidden or .protected , it can not recognize by aix as.
in aix assembly, the visibility attribute are support in the pseudo-op like
.extern Name [ , Visibility ]
.globl Name [, Visibility ]
.weak Name [, Visibility ]

in this patch, we implement the visibility attribute for the global variable, function or extern function .

for example.

extern __attribute__ ((visibility ("hidden"))) int
  bar(int* ip);
__attribute__ ((visibility ("hidden"))) int b = 0;
__attribute__ ((visibility ("hidden"))) int
  foo(int* ip){
   return (*ip)++;
}
the visibility of .comm linkage do not support , we will have a separate patch for it.
we have the unsupported cases ("default" and "internal") , we will implement them in a a separate patch for it.

Reviewers: Jason Liu ,hubert.reinterpretcast,James Henderson

Differential Revision: https://reviews.llvm.org/D75866
2020-06-09 16:15:06 -04:00
Craig Topper
461e54845b [X86] Move CPUKind enum from clang to llvm/lib/Support. NFCI
Similar to what some other targets have done. This information
could be reused by other frontends so doesn't make sense to live
in clang.

-Rename CK_Generic to CK_None to better reflect its illegalness.
-Move function for translating from string to enum into llvm.
-Call checkCPUKind directly from the string to enum translation
and update CPU kind to CK_None accordinly. Caller will use CK_None
as sentinel for bad CPU.

I'm planning to move all the CPU to feature mapping out next. As
part of that I want to devise a better way to express CPUs inheriting
features from an earlier CPU. Allowing this to be expressed in a
less rigid way than just falling through a switch. Or using gotos
as we've had to do lately.

Differential Revision: https://reviews.llvm.org/D81439
2020-06-09 12:52:41 -07:00
Matt Arsenault
832e0c0296 GlobalISel: Improve MachineIRBuilder construction
The current relationship between LegalizerHelper and MachineIRBuilder
confuses me, because the LegalizerHelper modifies the MachineIRBuilder
which it does not own. Constructing a LegalizerHelper destroys the
insert point, since the constructor calls setMF, which clears all the
fields. Try to separate these functions, so it's possible to construct
a LegalizerHelper from an existing MachineIRBuilder without losing the
insert point/debug loc.
2020-06-09 15:05:04 -04:00
Matt Arsenault
1f25ea44b1 GlobalISel: Move some trivial MIRBuilder methods into the header
The construction APIs for MachineIRBuilder don't make much sense, and
it's been annoying to sort through it with these trivial functions
separate from the declaration.
2020-06-09 15:04:48 -04:00
Thomas Lively
e0fb71605e [WebAssembly] Implement prototype SIMD rounding instructions
Summary:
As specified in https://github.com/WebAssembly/simd/pull/232. These
instructions are implemented as LLVM intrinsics for now rather than
normal ISel patterns to make these instructions opt-in. Once the
instructions are merged to the spec proposal, the intrinsics will be
replaced with proper ISel patterns.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81222
2020-06-09 10:14:14 -07:00
Aaron Puchert
b9b65b60ee Add LLVM_ATTRIBUTE_NORETURN to report_bad_alloc_error
Summary:
The attribute just means that there will be no regular return, it still
leaves room for exceptions to be thrown. It is easily verified: there
are no direct returns and the last statement is either a throw or a call
to abort.

Having the annotation helps static analyzers with this code from
Support/MemAlloc.h (slightly simplified):

LLVM_ATTRIBUTE_RETURNS_NONNULL inline void *safe_malloc(size_t Sz) {
  void *Result = std::malloc(Sz);
  if (Result == nullptr)
    report_bad_alloc_error("Allocation failed");
  return Result;
}

Were report_bad_alloc_error to return regularly, the function would
return nullptr, contradicting the attribute.

Reviewers: rnk, sepavloff, dblaikie, aaron.ballman

Reviewed By: dblaikie, aaron.ballman

Differential Revision: https://reviews.llvm.org/D81318
2020-06-09 17:45:12 +02:00
Florian Hahn
fa86d844ec [PatternMatch] Support matching intrinsics with 6 arguments.
I couldn't find a generic intrinsic with 6 arguments in tree for a
unit test, but soon there will be one.
2020-06-09 15:59:26 +01:00
James Henderson
7c86978535 [DebugInfo] Print non-verbose output at some point as verbose output
Verbose and non-verbose parsing of .debug_line produced their output at
different points in the program. The most obvious impact of this was
that error messages were produced at different times, but it also
potentially reduced what clients could do by customising the stream or
warning/error handlers.

This change makes the two variants consistent by printing non-verbose
output inline, the same as verbose output.

Testing of the error messages has been modified to check the messages
always appear in the same location to illustrate the behaviour.

Reviewed by: JDevlieghere, dblaikie, MaskRay, labath

Differential Revision: https://reviews.llvm.org/D80989
2020-06-09 14:24:53 +01:00
serge-sans-paille
b8f042119c Fix MemCpyOptimizer return status
Differential Revision: https://reviews.llvm.org/D81229
2020-06-09 14:24:33 +02:00
James Henderson
17d5bec07f [Support] Add stream tie function and use it for errs()
errs() is now tied to outs() so that if something prints to errs(),
outs() will be flushed before the printing occurs. This avoids
interleaving output between the two and is consistent with standard cout
and cerr behaviour.

Reviewed by: labath, JDevlieghere, MaskRay

Differential Revision: https://reviews.llvm.org/D81156
2020-06-09 12:51:02 +01:00
Simon Pilgrim
c7c985802b Magic.h - reduce includes to forward declarations. NFC. 2020-06-09 11:54:51 +01:00
Xing GUO
34262b7f8b [DWARFYAML][debug_ranges] Emit an error message for invalid offset.
This patch helps make yaml2obj emit an error message when we try to assign an invalid offset to the entry of the 'debug_ranges' section.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D81357
2020-06-09 18:53:38 +08:00
Guillaume Chatelet
9bd39147ee Revert "[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess"
This reverts commit f21c52667ed147903015a94643b0057319189d4e.
2020-06-09 10:43:59 +00:00
Guillaume Chatelet
a5cbfdd90d [Alignment][NFC] TargetLowering::allowsMisalignedMemoryAccesses
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMisalignedMemoryAccesses` without marking it override.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81374
2020-06-09 10:17:42 +00:00
Guillaume Chatelet
574b28f02f [Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess
Summary:
Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::allowsMemoryAccess` without marking it override.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81379
2020-06-09 10:11:07 +00:00
Cullen Rhodes
39fead6fda [AArch64][SVE] Implement structured load intrinsics
Summary:
This patch adds initial support for the following instrinsics:

    * llvm.aarch64.sve.ld2
    * llvm.aarch64.sve.ld3
    * llvm.aarch64.sve.ld4

For loading two, three and four vectors worth of data. Basic codegen is
implemented with reg+reg and reg+imm addressing modes being addressed
in a later patch.

The types returned by these intrinsics have a number of elements that is a
multiple of the elements in a 128-bit vector for a given type and N, where N is
the number of vectors being loaded, i.e. 2, 3 or 4. Thus, for 32-bit elements
the types are:

    LD2 : <vscale x 8 x i32>
    LD3 : <vscale x 12 x i32>
    LD4 : <vscale x 16 x i32>

This is implemented with target-specific intrinsics for each variant that take
the same operands as the IR intrinsic but return N values, where the type of
each value is a full vector, i.e. <vscale x 4 x i32> in the above example.
These values are then concatenated using the standard concat_vector intrinsic
to maintain type legality with the IR.

These intrinsics are intended for use in the Arm C Language
Extension (ACLE).

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D75751
2020-06-09 08:51:58 +00:00