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11874 Commits

Author SHA1 Message Date
Rafael Espindola
e223c0aa14 Fix PR8878. 
llvm-svn: 122658
 2011-01-01 19:05:35 +00:00
Duncan Sands
ec8b2b4cc5 Fix a README item by having InstructionSimplify do a mild form of value 
numbering, in which it considers (for example) "%a = add i32 %x, %y" and
"%b = add i32 %x, %y" to be equal because the operands are equal and the
result of the instructions only depends on the values of the operands.
This has almost no effect (it removes 4 instructions from gcc-as-one-file),
and perhaps slows down compilation: I measured a 0.4% slowdown on the large
gcc-as-one-file testcase, but it wasn't statistically significant.

llvm-svn: 122654
 2011-01-01 16:12:09 +00:00
Che-Liang Chiou
a188cfb574 ptx: remove reg-reg addressing mode and st.const 
llvm-svn: 122653
 2011-01-01 11:58:58 +00:00
Che-Liang Chiou
995a853724 ptx: add store instruction 
llvm-svn: 122652
 2011-01-01 10:50:37 +00:00
Nick Lewycky
5cb84ee2cf Add another non-commutable instruction that gas accepts commuted forms for. 
Fixes PR8861.

llvm-svn: 122641
 2010-12-30 22:10:49 +00:00
Che-Liang Chiou
f4aaa1b2e1 ptx: add state spaces 
llvm-svn: 122638
 2010-12-30 10:41:27 +00:00
Daniel Dunbar
9ee74282a6 MC/Mach-O/Thumb: Set the thumb bit in the symbol table. 
llvm-svn: 122630
 2010-12-29 14:14:06 +00:00
Rafael Espindola
7b1b3f5d82 Correctly encode pcrel|indirect. 
llvm-svn: 122624
 2010-12-29 04:31:26 +00:00
NAKAMURA Takumi
68063487b1 test/Transforms/ConstProp/logicaltest.ll: FileCheck-ize. 
llvm-svn: 122620
 2010-12-29 03:58:56 +00:00
NAKAMURA Takumi
e16c40416e test/CodeGen/X86/negative-sin.ll: FileCheck-ize. 
llvm-svn: 122619
 2010-12-29 03:58:47 +00:00
NAKAMURA Takumi
d66bcf9ada test/CodeGen/X86/fp-in-intregs.ll: FileCheck-ize. 
llvm-svn: 122618
 2010-12-29 03:58:36 +00:00
Rafael Espindola
0408a378e9 Fix bug when trying to output uint16_t or uint32_t. 
llvm-svn: 122615
 2010-12-29 02:30:49 +00:00
Rafael Espindola
d51ed1fc6a Implement cfi_def_cfa. Also don't convert to dwarf reg numbers twice. Looks 
like 6 is a fixed point of that and so the previous tests were OK :-)

llvm-svn: 122614
 2010-12-29 01:42:56 +00:00
Rafael Espindola
257de5c4a2 Implement cfi_def_cfa_register. 
llvm-svn: 122612
 2010-12-29 00:26:06 +00:00
Rafael Espindola
061209eaf3 Initial .cfi_offset implementation. 
llvm-svn: 122611
 2010-12-29 00:09:59 +00:00
Rafael Espindola
d93ec3572d Don't produce a "DW_CFA_advance_loc 0". 
llvm-svn: 122609
 2010-12-28 23:38:03 +00:00
Rafael Espindola
3fdd045643 Implement .cfi_remember_state and .cfi_restore_state. 
llvm-svn: 122602
 2010-12-28 18:36:23 +00:00
Rafael Espindola
c97d642bf7 Relax address updates in the eh_frame section. 
llvm-svn: 122591
 2010-12-28 05:39:27 +00:00
Rafael Espindola
0552cb0638 Start adding basic support for emitting the call frame instructions. 
llvm-svn: 122590
 2010-12-28 04:15:37 +00:00
Rafael Espindola
12c30aed07 Add support for .cfi_lsda. 
llvm-svn: 122584
 2010-12-27 15:56:22 +00:00
Daniel Dunbar
2d0cf8e149 MC/Mach-O/Thumb: Select appropriate relocation types for Thumb. 
llvm-svn: 122583
 2010-12-27 14:49:49 +00:00
Rafael Espindola
7f947794d7 Handle reloc_riprel_4byte_movq_load. Should make the bots happy. 
llvm-svn: 122579
 2010-12-27 02:03:24 +00:00
Rafael Espindola
e7e67fce10 Add support for the same encodings of the personality function that gnu as 
supports.

llvm-svn: 122577
 2010-12-27 00:36:05 +00:00
Chris Lattner
d4daf9f002 implement enough of the memset inference algorithm to recognize and insert 
memsets.  This is still missing one important validity check, but this is enough
to compile stuff like this:

void test0(std::vector<char> &X) {
  for (std::vector<char>::iterator I = X.begin(), E = X.end(); I != E; ++I)
    *I = 0;
}

void test1(std::vector<int> &X) {
  for (long i = 0, e = X.size(); i != e; ++i)
    X[i] = 0x01010101;
}

With:
 $ clang t.cpp -S -o - -O2 -emit-llvm | opt -loop-idiom | opt -O3 | llc 

to:

__Z5test0RSt6vectorIcSaIcEE:            ## @_Z5test0RSt6vectorIcSaIcEE
## BB#0:                                ## %entry
	subq	$8, %rsp
	movq	(%rdi), %rax
	movq	8(%rdi), %rsi
	cmpq	%rsi, %rax
	je	LBB0_2
## BB#1:                                ## %bb.nph
	subq	%rax, %rsi
	movq	%rax, %rdi
	callq	___bzero
LBB0_2:                                 ## %for.end
	addq	$8, %rsp
	ret
...
__Z5test1RSt6vectorIiSaIiEE:            ## @_Z5test1RSt6vectorIiSaIiEE
## BB#0:                                ## %entry
	subq	$8, %rsp
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	cmpq	$4, %rdx
	jb	LBB1_2
## BB#1:                                ## %for.body.preheader
	andq	$-4, %rdx
	movl	$1, %esi
	movq	%rax, %rdi
	callq	_memset
LBB1_2:                                 ## %for.end
	addq	$8, %rsp
	ret

llvm-svn: 122573
 2010-12-26 23:42:51 +00:00
Chris Lattner
9007b56712 start using irbuilder to make mem intrinsics in a few passes. 
llvm-svn: 122572
 2010-12-26 22:57:41 +00:00
Rafael Espindola
2ebe553431 Add support for @note. Patch by Jörg Sonnenberger. 
llvm-svn: 122568
 2010-12-26 21:30:59 +00:00
Rafael Espindola
99f1527316 Add basic support for .cfi_personality. 
llvm-svn: 122566
 2010-12-26 20:20:31 +00:00
Chris Lattner
2129ce0891 Generalize a previous change, fixing PR8855 - an valid large immediate 
rejected by the mc assembler.

llvm-svn: 122557
 2010-12-25 21:36:35 +00:00
Benjamin Kramer
49e40d4c4b MemCpyOpt: Turn memcpys from a constant into a memset if possible. 
This allows us to compile "int cst[] = {-1, -1, -1};" into
  movl  $-1, 16(%rsp)
  movq  $-1, 8(%rsp)
instead of
  movl  _cst+8(%rip), %eax
  movl  %eax, 16(%rsp)
  movq  _cst(%rip), %rax
  movq  %rax, 8(%rsp)

llvm-svn: 122548
 2010-12-24 21:17:12 +00:00
Daniel Dunbar
592854a10a MC/Mach-O/ARM: Start handling some Thumb branches. 
llvm-svn: 122547
 2010-12-24 16:41:46 +00:00
Kevin Enderby
ff7e68c5e7 In llvm-mc parse a Hash token as a full line comment. Allows handling of 
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.

llvm-svn: 122531
 2010-12-24 00:12:02 +00:00
Owen Anderson
6afd90810e When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero 
are not the low bits of x, but the bits that WILL be the low bits after the operation completes.

llvm-svn: 122529
 2010-12-23 23:56:24 +00:00
Bob Wilson
85dbc89f44 Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. 
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

llvm-svn: 122521
 2010-12-23 22:45:49 +00:00
Torok Edwin
cfd30fdf42 XFAIL vg_leak the new test as the rest. 
llvm-svn: 122517
 2010-12-23 21:22:09 +00:00
Torok Edwin
2acdd67db2 Fix OCaml bindings crash, PR8847. 
See http://caml.inria.fr/mantis/view.php?id=4166
If we call only external functions from a module, then its 'let _' bindings
don't get executed, which means that the exceptions don't get registered for use
in the C code.
This in turn causes llvm_raise to call raise_with_arg() with a NULL pointer and
cause a segmentation fault.

The workaround is to declare all 'external' functions as 'val' in these .mli
files.

Also added a separate testcase (the testcase must call only external functions
for the bug to occur).

llvm-svn: 122497
 2010-12-23 15:49:26 +00:00
Andrew Trick
cc701bcfdc Fixes PR8823: add-with-overflow-128.ll 
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.

llvm-svn: 122472
 2010-12-23 03:15:51 +00:00
Benjamin Kramer
49942a90b7 DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code. 
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]

llvm-svn: 122455
 2010-12-22 23:17:45 +00:00
Benjamin Kramer
27d13684f5 InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1. 
llvm-svn: 122453
 2010-12-22 23:12:15 +00:00
Benjamin Kramer
d8387aa9bd X86: Lower a select directly to a setcc_carry if possible. 
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]

llvm-svn: 122451
 2010-12-22 23:09:28 +00:00
Daniel Dunbar
e6ec0e7149 MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups. 
llvm-svn: 122441
 2010-12-22 21:26:43 +00:00
Rafael Espindola
5004de4d8b Add reduced test from 8845. 
llvm-svn: 122438
 2010-12-22 21:15:13 +00:00
Duncan Sands
68d969c2f5 When determining whether the new instruction was already present in 
the original instruction, half the cases were missed (making it not
wrong but suboptimal).  Also correct a typo (A <-> B) in the second
chunk. 

llvm-svn: 122414
 2010-12-22 17:15:25 +00:00
Duncan Sands
e1522867e6 Make this test not depend on how the variable is named. 
llvm-svn: 122413
 2010-12-22 17:08:04 +00:00
Daniel Dunbar
cb8ac619a2 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is 
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

llvm-svn: 122412
 2010-12-22 16:52:19 +00:00
Daniel Dunbar
e44a2c1166 MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations. 
llvm-svn: 122407
 2010-12-22 16:19:24 +00:00
Rafael Espindola
7c995a90fc Simplify the handling of .size expressions. 
llvm-svn: 122404
 2010-12-22 16:03:00 +00:00
Duncan Sands
922251757b Add a generic expansion transform: A op (B op' C) -> (A op B) op' (A op C) 
if both A op B and A op C simplify.  This fires fairly often but doesn't
make that much difference.  On gcc-as-one-file it removes two "and"s and
turns one branch into a select.

llvm-svn: 122399
 2010-12-22 13:36:08 +00:00
Che-Liang Chiou
e73ad4387e ptx: add ld instruction and test 
llvm-svn: 122398
 2010-12-22 10:38:51 +00:00
Chris Lattner
04ef853e23 Fix a bug in ReduceLoadWidth that wasn't handling extending 
loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.

llvm-svn: 122392
 2010-12-22 08:02:57 +00:00
Owen Anderson
b4f1511864 Give GVN back the ability to perform simple conditional propagation on conditional branch values. 
I still think that LVI should be handling this, but that capability is some ways off in the future,
and this matters for some significant benchmarks.

llvm-svn: 122378
 2010-12-21 23:54:34 +00:00