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Commit Graph

169378 Commits

Author SHA1 Message Date
Simon Pilgrim
960c5ec77f [TableGen] CodeGenDAGPatterns::GenerateVariants - full caching of matching predicates
Further extension to D51035, this patch avoids all repeated predicates[] matching by caching as it collects the patterns that have multiple variants.

Saves around 25secs in debug builds of x86 -gen-dag-isel.

Differential Revision: https://reviews.llvm.org/D51839

llvm-svn: 342467
2018-09-18 11:30:30 +00:00
Guillaume Chatelet
52b299b2e1 [llvm-exegesis] Improve Register Setup.
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342466
2018-09-18 11:26:48 +00:00
Guillaume Chatelet
369049ce40 Added function to set a register to a particular value + tests.
llvm-svn: 342465
2018-09-18 11:26:35 +00:00
Guillaume Chatelet
4107d8cd61 Improve Register Setup
llvm-svn: 342464
2018-09-18 11:26:27 +00:00
Alexander Kornienko
4fd6b65aec Remove trailing whitespace introduced in r342440.
llvm-svn: 342463
2018-09-18 10:53:13 +00:00
Simon Pilgrim
6442f17c49 [X86][SSE] LowerShift - pull out repeated getTargetVShiftUniformOpcode calls. NFCI.
llvm-svn: 342462
2018-09-18 10:44:44 +00:00
David Carlier
3947adc7f0 [Xray] llvm-xray fix possible segfault
top argument when superior to the instrumentated code list capacity can lead to a segfault.

Reviewers: dberris

Reviewed By: dberris

Differential Revision: https://reviews.llvm.org/D52224

llvm-svn: 342461
2018-09-18 10:31:10 +00:00
Yury Gribov
2c6a4f8f98 Fixes removal of dead elements from PressureDiff (PR37252).
Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D51495

llvm-svn: 342457
2018-09-18 09:53:42 +00:00
David Green
4fe2509252 [AArch64] Attempt to parse more operands as expressions
This tries to make use of evaluateAsRelocatable in AArch64AsmParser::classifySymbolRef
to parse more complex expressions as relocatable operands. It is hopefully better than
the existing code which only handles Symbol +- Constant.

This allows us to parse more complex adr/adrp, mov, ldr/str and add operands. It also
loosens the requirements on parsing addends in ld/st and mov's and adds a number of
tests.

Differential Revision: https://reviews.llvm.org/D51792

llvm-svn: 342455
2018-09-18 09:44:53 +00:00
Martin Storsjo
68f27314f3 [benchmark] Lowercase windows specific includes
The windows SDK headers don't have self-consistent casing anyway,
so we consistently use lowercase for these in other places, in order
to fix crosscompilation with mingw headers.

This applies an upstream commit:
5261307982

Differential Revision: https://reviews.llvm.org/D52181

llvm-svn: 342450
2018-09-18 08:44:57 +00:00
Max Kazantsev
9ebfe61ba0 [IndVars] Remove unreasonable checks in rewriteLoopExitValues
A piece of logic in rewriteLoopExitValues has a weird check on number of
users which allowed an unprofitable transform in case if an instruction has
more than 6 users.

Differential Revision: https://reviews.llvm.org/D51404
Reviewed By: etherzhhb

llvm-svn: 342444
2018-09-18 04:57:18 +00:00
Matt Arsenault
a633ed5e07 AMDGPU: Don't form fmed3 if it will require materialization
If there is a single use constant, it can be folded into the
min/max, but not into med3.

llvm-svn: 342443
2018-09-18 02:34:54 +00:00
Matt Arsenault
08bc0b95f1 LSV: Fix adjust alloca alignment trick for AMDGPU
This was checking the hardcoded address space 0 for the stack.
Additionally, this should be checking for legality with
the adjusted alignment, so defer the alignment check.

Also try to split if the unaligned access isn't allowed.

llvm-svn: 342442
2018-09-18 02:05:44 +00:00
QingShan Zhang
c8ba016eba [PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8
When doing some instruction scheduling work, we noticed some missing itineraries.
Before we switch to machine scheduler, those missing itineraries might not have impact to actually scheduling, 
because we can still get same latency due to default values.

With machine scheduler, however, itineraries will have impact to scheduling.
eg: NumMicroOps will default to be 0 if there is NO itineraries for specific instruction class.
And most of the instruction class with itineraries will have NumMicroOps default to 1.

This will has impact on the count of RetiredMOps, affects the Pending/Available Queue, 
then causing different scheduling or suboptimal scheduling further.

Patch By: jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D52040

llvm-svn: 342441
2018-09-18 02:05:18 +00:00
QingShan Zhang
4ec3981cd1 [PowerPC][NFC] Add a mulld testcase for scheduling check.
This patch add a mulld testcase for scheduling check.

Patch By: jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D52039

llvm-svn: 342440
2018-09-18 01:59:22 +00:00
Matt Arsenault
6ac0a8443c AMDGPU: Expand vector canonicalizes
llvm-svn: 342439
2018-09-18 01:51:33 +00:00
whitequark
d8fee92aa0 [OCaml] Add OCaml API for LLVMIsCleanup
Summary: Expose test for whether or not a landingpad is a cleanup.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52205

llvm-svn: 342438
2018-09-18 01:48:01 +00:00
whitequark
d5143ce079 [NFC][OCaml] Fix copy paste error in file header
Summary: Just copypasta resulting in the wrong file name in the header.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52215

llvm-svn: 342437
2018-09-18 01:47:53 +00:00
whitequark
0bb017451a [NFC][OCaml] Fix implicit declaration compilation warnings
Summary:
2dd4f35c7fc75639920ebc473a4a57ea91864c10 moved LLVMAddLowerSwitchPass
and LLVMAddPromoteMemoryToRegisterPass declarations from
llvm-c/Transforms/Scalar.h to llvm-c/Transforms/Utils.h

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52214

llvm-svn: 342436
2018-09-18 01:47:44 +00:00
whitequark
881fd24d9c [LLVM-C][OCaml] Add C and OCaml APIs for llvm::StructType::isLiteral
Summary:
This patch adds LLVMIsLiteralStruct to the C API to expose
StructType::isLiteral. This is then used to implement the analogous
addition to the OCaml API.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52209

llvm-svn: 342435
2018-09-18 01:47:37 +00:00
whitequark
89a3ac70aa [LLVM-C] Add support for ConstantExpr in LLVMGetNumIndices and LLVMGetIndices
Summary:
ConstantExpr supports getIndices, but prior to this patch
LLVMGetNumIndices and LLVMGetIndices would error on them.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52206

llvm-svn: 342434
2018-09-18 01:47:25 +00:00
whitequark
613357e760 [OCaml] Add OCaml APIs for Invoke arguments and destinations
Summary:
This patch adds OCaml APIs for LLVMGetNormalDest and LLVMGetUnwindDest
on InvokeInsts, as well as LLVMGetNumArgOperands on CallInsts and
InvokeInsts.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52204

llvm-svn: 342433
2018-09-18 01:47:18 +00:00
Volodymyr Sapsai
d2bca167a0 Revert "[ARM] Cleanup ARM CGP isSupportedValue"
This reverts r342395 as it caused error

> Argument value type does not match pointer operand type!
>   %0 = atomicrmw volatile xchg i8* %_Value1, i32 1 monotonic, !dbg !25
>  i8in function atomic_flag_test_and_set
> fatal error: error in backend: Broken function found, compilation aborted!

on bot http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/

More details are available at https://reviews.llvm.org/D52080

llvm-svn: 342431
2018-09-18 00:11:55 +00:00
Reid Kleckner
ab9b25c34b Work around grep vs. CRLF issue in Thumb2 test by matching excess whitespace
There seems to be a separate command line tokenization issue that
prevents just ':\s*$' from working, since then the pattern argument
isn't quoted, and grep.exe misinterprets the backslash somehow.

llvm-svn: 342430
2018-09-18 00:04:29 +00:00
whitequark
9fe59eb29b [OCaml] Add GlobalIFunc value kind to OCaml API
Summary:
The GlobalIFunc value kind has not yet been added to the OCaml
API. This patch only extends the enum, so that e.g. classify_value
will not crash. No support for manipulating or building GlobalIFuncs
is added at this point.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52198

llvm-svn: 342429
2018-09-18 00:01:12 +00:00
whitequark
bbffcf06c9 [OCaml] Add Token type to kind enum in OCaml API
Summary:
The token type has not yet been added to the OCaml API. This
patch only extends the enum, so that e.g. classify_type will not
crash. No support for manipulating or building tokens is added at this
point.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52197

llvm-svn: 342428
2018-09-18 00:01:01 +00:00
whitequark
4c155a3665 [OCaml] Add missing instruction opcodes to OCaml API
Summary:
The OCaml bindings have become out of date and several opcodes have
been added to the C API without corresponding additions to the OCaml
API.

Reviewers: whitequark, mgorny

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52196

llvm-svn: 342427
2018-09-18 00:00:53 +00:00
Alina Sbirlea
123e0cf60a [EarlyCSEwMemorySSA] Add MSSA verification and tests to make EarlyCSE failures easier to track.
Summary:
EarlyCSE can make IR changes that will leave MemorySSA with accesses claiming to be optimized, but for which a subsequent MemorySSA run will yield a different optimized result.
Due to relying on AA queries, we can't fix this in general, unless we recompute MemorySSA.
Adding some tests to track this and a basic verify for future potential failures.

Reviewers: george.burgess.iv, gberry

Subscribers: sanjoy, jlebar, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D51960

llvm-svn: 342422
2018-09-17 22:35:21 +00:00
Zachary Turner
3efc86e71e Add #include <cassert>
This should fix the broken builds on some bots.

llvm-svn: 342420
2018-09-17 22:04:56 +00:00
Simon Atanasyan
eb4a85b34a [mips] Fix MIPS N32 ABI triples support
Add support mips64(el)-linux-gnuabin32 triples, and set them to N32.
Debian architecture name mipsn32/mipsn32el are also added. Set
UseIntegratedAssembler for N32 if we can detect it.

Patch by YunQiang Su.

Differential revision: https://reviews.llvm.org/D51408

llvm-svn: 342416
2018-09-17 21:21:57 +00:00
Zachary Turner
210ae53b0e [PDB] Make the native reader support enumerators.
Previously we would dump the names of enum types, but not their
enumerator values.  This adds support for enumerator values.  In
doing so, we have to introduce a general purpose mechanism for
caching symbol indices of field list members.  Unlike global
types, FieldList members do not have a TypeIndex.  So instead,
we identify them by the pair {TypeIndexOfFieldList, IndexInFieldList}.

llvm-svn: 342415
2018-09-17 21:08:11 +00:00
Zachary Turner
1ff1310572 [PDB] Make the native reader support modified types.
Previously for cv-qualified types, we would just ignore them
and they would never get printed.  Now we can enumerate them
and cache them like any other symbol type.

llvm-svn: 342414
2018-09-17 21:07:48 +00:00
Nirav Dave
d4ce815400 [MC] Avoid inlining constant symbols with variants.
Summary:
Defer unnecessary early inlining of constants to symbol
variants. Fixes PR38945.

Reviewers: nickdesaulniers, rnk

Subscribers: nemanjai, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D52188

llvm-svn: 342412
2018-09-17 20:34:26 +00:00
Michael Kruse
6b1c0793ee [Loopinfo] Remove one latch-case in getLoopID. NFC.
getLoopID has different control flow for two cases: If there is a
single loop latch and for any other number of loop latches (0 and more
than one). The latter case should return the same result if there is
only a single latch. We can save the preceding redundant search for a
latch by handling both cases with the same code.

Differential Revision: https://reviews.llvm.org/D52118

llvm-svn: 342406
2018-09-17 18:40:29 +00:00
Jessica Paquette
ae2b11247e [MachineOutliner][NFC] Don't map more illegal instrs than you have to
We were mapping an instruction every time we saw something we couldn't map
before this. Since each illegal mapping is unique, we only have to do this once.

This makes it so that we don't map illegal instructions when the previous
mapped instruction was illegal.

In CTMark (AArch64), this results in 240 fewer instruction mappings on
average over 619 files in total. The largest improvement is 12576 fewer
mappings in one file, and the smallest is 0. The median improvement is 101
fewer mappings.

llvm-svn: 342405
2018-09-17 18:40:21 +00:00
Keno Fischer
31f2a64c4e [X86ISel] Implement byval lowering for Win64 calling convention
Summary:
The IR reference for the `byval` attribute states:

```
This indicates that the pointer parameter should really be passed by value
to the function. The attribute implies that a hidden copy of the pointee is
made between the caller and the callee, so the callee is unable to modify
the value in the caller. This attribute is only valid on LLVM pointer arguments.
```

However, on Win64, this attribute is unimplemented and the raw pointer is
passed to the callee instead. This is problematic, because frontend authors
relying on the implicit hidden copy (as happens for every other calling
convention) will see the passed value silently (if mutable memory) or
loudly (by means of a crash) modified because the callee treats the
location as scratch memory space it is allowed to mutate.

At this point, it's worth taking a step back to understand the context.
In most calling conventions, aggregates that are too large to be passed
in registers, instead get *copied* to the stack at a fixed (computable
from the signature) offset of the stack pointer. At the LLVM, we hide
this hidden copy behind the byval attribute. The caller passes a pointer
to the desired data and the callee receives a pointer, but these pointers
are not the same. In particular, the pointer that the callee receives
points to temporary stack memory allocated as part of the call lowering.
In most calling conventions, this pointer is never realized in registers
or memory. The temporary memory is simply defined by an implicit
offset from the stack pointer at function entry.

Win64, uniquely, works differently. The structure is still passed in
memory, but instead of being stored at an implicit memory offset, the
caller computes a pointer to the temporary memory and passes it to
the callee as a regular pointer (taking up a register, or if all
registers are taken up, an additional stack slot). Presumably, this
was done to allow eliding the copy when passing aggregates through
several functions on the stack.

This explains why ignoring the `byval` attribute mostly works on Win64.
The argument simply gets passed as a pointer and as long as we're ok
with the callee trampling all over that memory, there are no ill effects.
However, it does contradict the documentation of the `byval` attribute
which specifies that there is to be an implicit copy.

Frontends can of course work around this by never emitting the `byval`
attribute for Win64 and creating `alloca`s for the requisite temporary
stack slots (and that does appear to be what frontends are doing).
However, the presence of the `byval` attribute is not a trap for
frontend authors, since it seems to work, but silently modifies the
passed memory contrary to documentation.

I see two solutions:
- Disallow the `byval` attribute in the verifier if using the Win64
  calling convention.
- Make it work by simply emitting a temporary stack copy as we would
  with any other calling convention (frontends can of course always
  not use the attribute if they want to elide the copy).

This patch implements the second option (make it work), though I would
be fine with the first also.

Ref: https://github.com/JuliaLang/julia/issues/28338

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51842

llvm-svn: 342402
2018-09-17 17:37:14 +00:00
Stanislav Mekhanoshin
baca855d72 [AMDGPU] Initialize instruction itinerary from GCNSubtarget
I need to use it in the GCN codegen.

Differential Revision: https://reviews.llvm.org/D52123

llvm-svn: 342400
2018-09-17 16:04:32 +00:00
Alexander Kornienko
18af7cf9e1 Revert "[DWARF] reposting r342048, which was reverted in r342056 due to buildbot errors. Adjusted 2 test cases for ARM and darwin and fixed a bug with the original change in dsymutil."
This reverts commit r342218. Due to a number of failures under TSAN. An isolated
test case is being worked on.

llvm-svn: 342399
2018-09-17 15:40:01 +00:00
Xin Tong
6a7ed94ea8 [CVP] Handle instructions with no user. No need to create CVPLattice state. This handles terminator instructions and more.
Summary:
I tested this patch by compiling sqlite3.ll (clang -O3 -mllvm -disable-llvm-optzns sqlite3.c.)

 opt -called-value-propagation sqlite3.ll -time-passes -f -o out.ll

 I get 10+% speedup for the pass. I expect some of the gain come from skipping terminator instructions.

    === BEFORE THE PATCH ===
    ===-------------------------------------------------------------------------===
                          ... Pass execution timing report ...
    ===-------------------------------------------------------------------------===
      Total Execution Time: 0.5562 seconds (0.5582 wall clock)

       ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
       0.2485 ( 46.4%)   0.0120 ( 57.7%)   0.2605 ( 46.8%)   0.2615 ( 46.8%)  Bitcode Writer
       0.1607 ( 30.0%)   0.0079 ( 37.7%)   0.1685 ( 30.3%)   0.1693 ( 30.3%)  Called Value Propagation
       0.1262 ( 23.6%)   0.0009 (  4.5%)   0.1271 ( 22.9%)   0.1275 ( 22.8%)  Module Verifier
       0.5353 (100.0%)   0.0209 (100.0%)   0.5562 (100.0%)   0.5582 (100.0%)  Total

    === AFTER THE PATCH ===
    ===-------------------------------------------------------------------------===
                          ... Pass execution timing report ...
    ===-------------------------------------------------------------------------===
      Total Execution Time: 0.5338 seconds (0.5355 wall clock)

       ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
       0.2498 ( 48.6%)   0.0118 ( 59.3%)   0.2615 ( 49.0%)   0.2629 ( 49.1%)  Bitcode Writer
       0.1377 ( 26.8%)   0.0075 ( 37.8%)   0.1452 ( 27.2%)   0.1455 ( 27.2%)  Called Value Propagation
       0.1264 ( 24.6%)   0.0006 (  3.0%)   0.1270 ( 23.8%)   0.1271 ( 23.7%)  Module Verifier
       0.5139 (100.0%)   0.0199 (100.0%)   0.5338 (100.0%)   0.5355 (100.0%)  Total

Reviewers: davide, mssimpso

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49108

llvm-svn: 342398
2018-09-17 15:28:01 +00:00
Amara Emerson
12a3665936 Revert "Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.""
Fixed the assertion failure.

llvm-svn: 342397
2018-09-17 14:40:13 +00:00
Jonas Devlieghere
537724f5dd [DebugInfo] Remove redundant argument. [NFC]
Removes the redundant UnitType parameter from verifyUnitContents. I also
fixed  some formatting issues as I was touching the file.

llvm-svn: 342396
2018-09-17 14:23:47 +00:00
Sam Parker
dfcd3f1ff0 [ARM] Cleanup ARM CGP isSupportedValue
isSupportedValue explicitly checked and accepted many types of value,
primarily for debugging reasons. Remove most of these checks and do a
bit of refactoring now that the pass is more stable. This also enables
ZExts to be sources, but this has very little practical benefit at the
moment extend instructions will still be introduced.

Differential Revision: https://reviews.llvm.org/D52080

llvm-svn: 342395
2018-09-17 13:57:39 +00:00
Simon Pilgrim
a37e9493d8 Fix "not all control paths return a value" MSVC warning. NFCI.
llvm-svn: 342394
2018-09-17 13:56:42 +00:00
Sam Parker
77177923c8 [ARM] Disallow icmp with negative imm and overflow
We allow overflowing instructions if they're decreasing and only used
by an unsigned compare. Add the extra condition that the icmp cannot
be using a negative immediate.

Differential Revision: https://reviews.llvm.org/D52102

llvm-svn: 342392
2018-09-17 13:48:25 +00:00
Matt Arsenault
2da3e37d8b Fix vectorization of canonicalize
llvm-svn: 342390
2018-09-17 13:24:30 +00:00
Alexandros Lamprineas
efe6dfc2cf [GVNHoist] Re-enable GVNHoist by default
Rebase rL341954 since https://bugs.llvm.org/show_bug.cgi?id=38912
has been fixed by rL342055.

Precommit testing performed:
* Overnight runs of csmith comparing the output between programs
  compiled with gvn-hoist enabled/disabled.
* Bootstrap builds of clang with UbSan/ASan configurations.

llvm-svn: 342387
2018-09-17 12:24:55 +00:00
Alexander Kornienko
1dd1421fd2 Use createTemporaryFile in SampleProfTest
Create a temporary file in the system temporary directory instead of creating a
file in the current directory, which may be not writable. (Fix for an issue
introduced in r342283.)

llvm-svn: 342386
2018-09-17 12:11:01 +00:00
Guillaume Chatelet
7529169fae [llvm-exegesis] Add predefined floating point values so we can test impact of special values on latency.
Summary: This will be useful to generate many configurations and test instruction regimes (NaN, Inf, subnormal, normal).

Reviewers: courbet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51858

llvm-svn: 342369
2018-09-17 11:09:32 +00:00
Strahinja Petrovic
eefb378d79 [PowerPC] Fix label address calculation for ppc64
This patch fixes calculating address of label for non-pic ppc64.

Differential Revision: https://reviews.llvm.org/D50965

llvm-svn: 342368
2018-09-17 11:03:40 +00:00
James Henderson
cd11b8eeed Reland r342233: [ThinLTO] Allow setting of maximum cache size with 64-bit number
The original was reverted due to an apparent build-bot test failure,
but it looks like this is just a flaky test.

Also added a C-interface function for large values, and updated
llvm-lto's --thinlto-cache-max-size-bytes switch to take a type larger
than int.

The maximum cache size in terms of bytes is a 64-bit number. However,
the methods to set it only took unsigned previously, which meant that
the maximum cache size could not be specified above 4GB. That's quite
small compared to the output of some projects, so it makes sense to
provide the ability to set larger values in that field.

We also needed a C-interface function that provides a greater range
than the existing thinlto_codegen_set_cache_size_bytes, which also only
takes an unsigned, so this change also adds
hinlto_codegen_set_cache_size_megabytes.

Reviewed by: mehdi_amini, tejohnson, steven_wu

Differential Revision: https://reviews.llvm.org/D52023

llvm-svn: 342366
2018-09-17 10:21:26 +00:00