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181232 Commits

Author SHA1 Message Date
Vitaly Buka
0f648b5b0c [GN] Update build file
llvm-svn: 364583
2019-06-27 19:55:22 +00:00
Vitaly Buka
8f240244c0 [GN] Set exit code to 1 if changes are needed
llvm-svn: 364582
2019-06-27 19:55:21 +00:00
Jinsong Ji
edab883e9d [PowerPC][NFC] Remove unused (and unsupported) fusion feature bits.
FeatureFusion bits was first introduced in
https://reviews.llvm.org/rL253724. for add/load integer fusion for P8.
The only use of `hasFusion` was https://reviews.llvm.org/rL255319.

However, this was removed later in https://reviews.llvm.org/rL280440.

So, there is NO any reference to fusion in code now.

Leaving it there is misleading and confusing, so remove it for now.
We can alwasy add back if we ever support fusion in the future.

llvm-svn: 364581
2019-06-27 19:35:11 +00:00
Johannes Doerfert
6275dfc50e Use "willreturn" in isGuaranteedToTransferExecutionToSuccessor
The `willreturn` function attribute guarantees that a function call will
come back to the call site if the call is also known not to throw.
Therefore, this attribute can be used in
`isGuaranteedToTransferExecutionToSuccessor`.

Patch by Hideto Ueno (@uenoku)

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63372

llvm-svn: 364580
2019-06-27 19:29:48 +00:00
Philip Reames
2f73322fcd Update -analyze -scalar-evolution output for multiple exit loops w/computable exit values
The previous output was next to useless if *any* exit was not computable.  If we have more than one exit, show the exit count for each so that it's easier to see what's going from with SCEV analysis when debugging.

llvm-svn: 364579
2019-06-27 19:22:43 +00:00
Roman Lebedev
8d12bfc000 [NFC][CodeGen] Add negative test for X u% C == 0 fold (D63391)
The fold (D63391) uses multiplicativeInverse(),
but it is not guaranteed to always succeed,
and '100' appears to be one of the problematic values.

llvm-svn: 364578
2019-06-27 19:09:51 +00:00
Michael Liao
0a09ab5d03 Correct the file path. NFC.
llvm-svn: 364577
2019-06-27 19:05:46 +00:00
Wouter van Oortmerssen
305d7ec1ed [WebAssembly] AsmParser: better atomic inst detection
Summary:
Previously missed atomic.notify.

Fixes https://bugs.llvm.org/show_bug.cgi?id=40728

Reviewers: aheejin

Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits, dschuff

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63747

llvm-svn: 364576
2019-06-27 18:58:26 +00:00
Yuanfang Chen
6a85b9251a [llvm-objdump] Update the doc for --disassemble-functions.
Update the doc after llvm-svn: 364121 is landed.
With two more trivial fixes that are not related to
--disassemble-functions but still about llvm-objdump.

Reviewers: jhenderson, grimar, MaskRay, rupprecht, peter.smith

Reviewed by: jhenderson, MaskRay

Differential Revision: https://reviews.llvm.org/D63787

llvm-svn: 364573
2019-06-27 18:39:34 +00:00
Djordje Todorovic
23eca76948 Revert "[LiveDebugValues] Emit the debug entry values"
Appears that the 'test/DebugInfo/MIR/X86/dbginfo-entryvals.mir'
does not pass on Windows.

This reverts commit rL364553.

llvm-svn: 364571
2019-06-27 18:12:04 +00:00
Wouter van Oortmerssen
f28fdd77b7 [WebAssembly] Fix p2align in assembler.
Summary:
- Match the syntax output by InstPrinter.
- Fix it always emitting 0 for align. Had to work around fact that
  opcode is not available for GetDefaultP2Align while parsing.
- Updated tests that were erroneously happy with a p2align=0

Fixes https://bugs.llvm.org/show_bug.cgi?id=40752

Reviewers: aheejin, sbc100

Subscribers: jgravelle-google, sunfish, jfb, llvm-commits, dschuff

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63633

llvm-svn: 364570
2019-06-27 18:11:15 +00:00
Simon Pilgrim
99a05fc594 [X86] combineX86ShufflesRecursively - merge shuffles with more than 2 inputs
We already had the infrastructure for this, but were waiting for the fix for a number of regressions which were handled by the recent shuffle(extract_subvector(),extract_subvector()) -> extract_subvector(shuffle()) shuffle combines

llvm-svn: 364569
2019-06-27 17:30:51 +00:00
Roman Lebedev
ce3e084f16 Revert "[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 2)"
*Appears* to break test-suite on
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/23790

FAIL: burg.execution_time
FAIL: spiff.execution_time
FAIL: employ.execution_time
FAIL: llu.execution_time
FAIL: gramschmidt.execution_time
FAIL: fdtd-apml.execution_time

This reverts commit r364563.

llvm-svn: 364568
2019-06-27 17:22:31 +00:00
Nicolai Haehnle
eb8a53324a AMDGPU: Make fixing i1 copies robust against re-ordering
Summary:
The new test case led to incorrect code.

Change-Id: Ief48b227e97aa662dd3535c9bafb27d4a184efca

Reviewers: arsenm, david-salinas

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63871

llvm-svn: 364566
2019-06-27 16:56:44 +00:00
David Green
00c287383a [ARM] Move low overhead loop codegen tests into a separate file. NFC
llvm-svn: 364565
2019-06-27 16:56:41 +00:00
Simon Pilgrim
019c4c1c0d Use getConstantOperandAPInt instead of getConstantOperandVal for comparisons.
getConstantOperandAPInt avoids any large integer issues - these are unlikely but the fuzzers do like to mess around.....

llvm-svn: 364564
2019-06-27 16:46:00 +00:00
Roman Lebedev
4d1c445d50 [CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 2)
Summary:
I'm submitting a new revision since i don't understand how to reclaim/reopen/take over the existing one, D50222.
There is no such action in "Add Action" menu...
Original patch D50222 by @hermord (Dmytro Shynkevych)

This implements an optimization described in Hacker's Delight 10-17: when `C` is constant,
the result of `X % C == 0` can be computed more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.

Original patch author: @hermord (Dmytro Shynkevych)!

Notes:
- In principle, it's possible to also handle the `X % C1 == C2` case, as discussed on bugzilla.
  This seems to require an extra branch on overflow, so I refrained from implementing this for now.
- An explicit check for when the `REM` can be reduced to just its LHS is included:
  the `X % C` == 0 optimization breaks `test1` in `test/CodeGen/X86/jump_sign.ll` otherwise.
  I hadn't managed to find a better way to not generate worse output in this case.
- The `test/CodeGen/X86/jump_sign.ll` regresses, and is being fixed by a followup patch D63390.

Reviewers: RKSimon, craig.topper, spatel, hermord, xbolva00

Reviewed By: RKSimon, xbolva00

Subscribers: xbolva00, javed.absar, llvm-commits, hermord

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63391

llvm-svn: 364563
2019-06-27 16:45:42 +00:00
Simon Pilgrim
b556280f2a [X86] getTargetVShiftByConstNode - reduce variable scope. NFCI.
Fixes cppcheck warning.

llvm-svn: 364561
2019-06-27 16:33:44 +00:00
Sam Tebbs
d49d428271 [ARM] Fix formatting issue in ARMISelLowering.cpp
Fix a formatting error in ARMISelLowering.cpp::Expand64BitShift. My test
commit after receiving write access.

llvm-svn: 364560
2019-06-27 16:28:28 +00:00
Chris Jackson
c94cc22866 [llvm-nm] Fix for BZ41711 - Class character for a symbol with undefined
binding does not match class assigned by GNU nm

 Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=41711

 Differential Revision: https://reviews.llvm.org/D63340

llvm-svn: 364559
2019-06-27 16:27:53 +00:00
Roland Froese
80aff4d691 Recommit [PowerPC] Update P9 vector costs for insert/extract element
Recommit patch D60160 after regression fix patch D63463.

llvm-svn: 364557
2019-06-27 16:20:24 +00:00
Paul Robinson
74a400db92 [debug-info] Make a couple of tests more robust.
llvm-svn: 364556
2019-06-27 15:53:07 +00:00
Johannes Doerfert
6bf1afd2a4 [Attr] Add "willreturn" function attribute
This patch introduces a new function attribute, willreturn, to indicate
that a call of this function will either exhibit undefined behavior or
comes back and continues execution at a point in the existing call stack
that includes the current invocation.

This attribute guarantees that the function does not have any endless
loops, endless recursion, or terminating functions like abort or exit.

Patch by Hideto Ueno (@uenoku)

Reviewers: jdoerfert

Subscribers: mehdi_amini, hiraditya, steven_wu, dexonsmith, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62801

llvm-svn: 364555
2019-06-27 15:51:40 +00:00
Djordje Todorovic
3f700f1ea6 [LiveDebugValues] Emit the debug entry values
Emit replacements for clobbered parameters location if the parameter
has unmodified value throughout the funciton. This is basic scenario
where we can use the debug entry values.

([12/13] Introduce the debug entry values.)

Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>

Differential Revision: https://reviews.llvm.org/D58042

llvm-svn: 364553
2019-06-27 15:35:48 +00:00
James Henderson
b81364d0d5 [docs][llvm-nm][llvm-objdump] Improve "See Also" section
The "See Also" section for llvm-nm didn't actually contain any links,
and the tools referred to didn't make much sense (referring to non-LLVM
tools, when we have equivalents, or tools that aren't really to do with
symbol dumping). llvm-objdump's didn't refer to llvm-readelf.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D63875

llvm-svn: 364552
2019-06-27 15:18:15 +00:00
Tim Northover
861c1d68ae Bitcode: derive all types used from records instead of Values.
There is existing bitcode that we need to support where the structured nature
of pointer types is used to derive the result type of some operation. For
example a GEP's operation and result will be based on its input Type.

When pointers become opaque, the BitcodeReader will still have access to this
information because it's explicitly told how to construct the more complex
types used, but this information will not be attached to any Value that gets
looked up. This changes BitcodeReader so that in all places which use type
information in this manner, it's derived from a side-table rather than from the
Value in question.

llvm-svn: 364550
2019-06-27 14:46:51 +00:00
Djordje Todorovic
07d5684ea6 [LiveRangeEdit] Fix build failure caused by the rL364536
llvm-svn: 364549
2019-06-27 14:31:52 +00:00
Simon Pilgrim
b68374a2bb [TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
llvm-svn: 364548
2019-06-27 14:25:54 +00:00
Sanjay Patel
eeed026b8f [InstCombine] remove 'tmp' names and regenerate checks; NFC
llvm-svn: 364546
2019-06-27 14:20:10 +00:00
Jinsong Ji
147a240a34 [PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and others
This was reported in https://bugs.llvm.org/show_bug.cgi?id=41751
llvm-mc aborted when disassembling tabortdc.

This patch try to clean up TM related DAGs.

* Fixes the problem by remove explicit output of cr0, and put it as implicit def.
* Update int_ppc_tbegin pattern to accommodate the implicit def of cr0.
* Update the TCHECK operand and int_ppc_tcheck accordingly.
* Add some builtin test and disassembly tests.
* Remove unused CRRC0/crrc0

Differential Revision: https://reviews.llvm.org/D61935

llvm-svn: 364544
2019-06-27 14:11:31 +00:00
Hans Wennborg
b4f953e9f4 Revert r363658 "[SVE][IR] Scalable Vector IR Type with pr42210 fix"
We saw a 70% ThinLTO link time increase in Chromium for Android, see
crbug.com/978817. Sounds like more of PR42210.

> Recommit of D32530 with a few small changes:
>   - Stopped recursively walking through aggregates in
>     the verifier, so that we don't impose too much
>     overhead on large modules under LTO (see PR42210).
>   - Changed tests to match; the errors are slightly
>     different since they only report the array or
>     struct that actually contains a scalable vector,
>     rather than all aggregates which contain one in
>     a nested member.
>   - Corrected an older comment
>
> Reviewers: thakis, rengolin, sdesmalen
>
> Reviewed By: sdesmalen
>
> Differential Revision: https://reviews.llvm.org/D63321

llvm-svn: 364543
2019-06-27 13:55:02 +00:00
Djordje Todorovic
a77a0a3548 [DWARF] Handle the DW_OP_entry_value operand
Add the IR and the AsmPrinter parts for handling of the DW_OP_entry_values
DWARF operation.

([11/13] Introduce the debug entry values.)

Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>

Differential Revision: https://reviews.llvm.org/D60866

llvm-svn: 364542
2019-06-27 13:52:34 +00:00
Simon Pilgrim
15ac4f5d7c [TargetLowering] SimplifyDemandedBits - use DemandedElts to better identify partial splat shift amounts
llvm-svn: 364541
2019-06-27 13:48:43 +00:00
Simon Atanasyan
846ca89ea8 [mips] Mark pseudo select instructions by the hasNoSchedulingInfo tag
llvm-svn: 364540
2019-06-27 13:41:30 +00:00
Simon Atanasyan
4192a04edd [mips] Add new items to the list of features unsupported by P5600
llvm-svn: 364539
2019-06-27 13:41:23 +00:00
James Henderson
f75dcd7d67 [docs][tools] Add missing "program" tags to rst files
Sphinx allows for definitions of command-line options using
`.. option <name>` and references to those options via `:option:<name>`.
However, it looks like there is no scoping of these options by default,
meaning that links can end up pointing to incorrect documents. See for
example the llvm-mca document, which contains references to -o that,
prior to this patch, pointed to a different document. What's worse is
that these links appear to be non-deterministic in which one is picked
(on my machine, some references end up pointing to opt, whereas on the
live docs, they point to llvm-dwarfdump, for example).

The fix is to add the .. program <name> tag. This essentially namespaces
the options (definitions and references) to the named program, ensuring
that the links are kept correct.

Reviwed by: andreadb

Differential Revision: https://reviews.llvm.org/D63873

llvm-svn: 364538
2019-06-27 13:24:46 +00:00
Djordje Todorovic
fa3dcadd10 [Backend] Keep call site info valid through the backend
Handle call instruction replacements and deletions in order to preserve
valid state of the call site info of the MachineFunction.

NOTE: If the call site info is enabled for a new target, the assertion from
the MachineFunction::DeleteMachineInstr() should help to locate places
where the updateCallSiteInfo() should be called in order to preserve valid
state of the call site info.

([10/13] Introduce the debug entry values.)

Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>

Differential Revision: https://reviews.llvm.org/D61062

llvm-svn: 364536
2019-06-27 13:10:29 +00:00
Simon Tatham
0965fa0fdc [ARM] Fix bogus assertions in copyPhysReg v8.1-M cases.
The code to generate register move instructions in and out of VPR and
FPSCR_NZCV had assertions checking that the other register involved
was a GPR _pair_, instead of a single GPR as it should have been.

Reviewers: miyuki, ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63865

llvm-svn: 364534
2019-06-27 12:41:12 +00:00
Simon Tatham
27e08f00ae [ARM] Fix handling of zero offsets in LOB instructions.
The BF and WLS/WLSTP instructions have various branch-offset fields
occupying different positions and lengths in the instruction encoding,
and all of them were decoded at disassembly time by the function
DecodeBFLabelOffset() which returned SoftFail if the offset was zero.

In fact, it's perfectly fine and not even a SoftFail for most of those
offset fields to be zero. The only one that can't be zero is the 4-bit
field labelled `boff` in the architecture spec, occupying bits {26-23}
of the BF instruction family. If that one is zero, the encoding
overlaps other instructions (WLS, DLS, LETP, VCTP), so it ought to be
a full Fail.

Fixed by adding an extra template parameter to DecodeBFLabelOffset
which controls whether a zero offset is accepted or rejected. Adjusted
existing tests (only in error messages for bad disassemblies); added
extra tests to demonstrate zero offsets being accepted in all the
right places, and a few demonstrating rejection of zero `boff`.

Reviewers: DavidSpickett, ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63864

llvm-svn: 364533
2019-06-27 12:41:07 +00:00
Simon Tatham
34c206fc18 [ARM] Make coprocessor number restrictions consistent.
Different versions of the Arm architecture disallow the use of generic
coprocessor instructions like MCR and CDP on different sets of
coprocessors. This commit centralises the check of the coprocessor
number so that it's consistent between assembly and disassembly, and
also updates it for the new restrictions in Arm v8.1-M.

New tests added that check all the coprocessor numbers; old tests
updated, where they used a number that's now become illegal in the
context in question.

Reviewers: DavidSpickett, ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63863

llvm-svn: 364532
2019-06-27 12:40:55 +00:00
Simon Tatham
ca741d996f [ARM] Tighten restrictions on use of SP in v8.1-M CSEL.
In the `CSEL Rd,Rm,Rn` instruction family (also including CSINC, CSINV
and CSNEG), the architecture lists it as CONSTRAINED UNPREDICTABLE
(i.e. SoftFail) to use SP in the Rd or Rm slot, but outright illegal
to use it in the Rn slot, not least because some encodings of that
form are used by MVE instructions such as UQRSHLL.

MC was treating all three slots the same, as SoftFail. So the only
reason UQRSHLL was disassembled correctly at all was because the MVE
decode table is separate from the Thumb2 one and takes priority; if
you turned off MVE, then encodings such as `[0x5f,0xea,0x0d,0x83]`
would disassemble as spurious CSELs.

Fixed by inventing another version of the `GPRwithZR` register class,
which disallows SP completely instead of just SoftFailing it.

Reviewers: DavidSpickett, ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63862

llvm-svn: 364531
2019-06-27 12:40:40 +00:00
Simon Pilgrim
726873ad1d [X86] getFauxShuffle - add DemandedElts as a filter
This is currently benign but will be used in the future based on the elements referenced by the parent shuffle(s).

llvm-svn: 364530
2019-06-27 12:35:52 +00:00
Simon Atanasyan
3802317559 [mips] Add GPR_64 predicate to some mov[zn] instructions
llvm-svn: 364527
2019-06-27 12:08:17 +00:00
Simon Atanasyan
75813bd7a2 [mips] Fix indentation and split long lines. NFC
llvm-svn: 364526
2019-06-27 12:08:10 +00:00
Simon Atanasyan
06ac0dc094 [mips] Reformat MSA instruction definitions. NFC
llvm-svn: 364525
2019-06-27 12:08:03 +00:00
Jeremy Morse
b51a428e56 Add triple to a test I just added.
llvm-svn: 364524
2019-06-27 11:52:03 +00:00
Tim Northover
dd77b948f1 IR: compare type attributes deeply when looking into functions.
FunctionComparator attempts to produce a stable comparison of two Function
instances by looking at all available properties. Since ByVal attributes now
contain a Type pointer, they are not trivially ordered and FunctionComparator
should use its own Type comparison logic to sort them.

llvm-svn: 364523
2019-06-27 11:44:45 +00:00
George Rimar
834e65d5fb [Object/invalid.test] - Convert most of the sub tests to YAML.
Object/invalid.test is a test case that is used to check the behavior of tools
when broken inputs are used.

The most often tool tested there is llvm-readobj. I think we might want to move
such tests to test\tools\llvm-readobj. For now this patch converts
many sub-tests to use YAML and removes 12 binaries from the inputs.

Differential revision: https://reviews.llvm.org/D63762

llvm-svn: 364522
2019-06-27 11:31:43 +00:00
Stefan Stipanovic
7f06f40e4b [Attributor] Deducing existing nounwind attribute.
Adding nounwind deduction in new attributor framework.

Reviewers: jdoerfert, uenoku

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D63379

llvm-svn: 364521
2019-06-27 11:27:54 +00:00
Simon Pilgrim
dd944bb275 [X86][SSE] Regenerate v48 shuffle test on a variety of targets
llvm-svn: 364520
2019-06-27 11:22:23 +00:00