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Author SHA1 Message Date
Michael J. Spencer
e497728e76 llvm-objdump: Add relocation and archive support. 
llvm-svn: 141451
 2011-10-08 00:18:30 +00:00
Michael J. Spencer
7a13bd426f PathV2: Add simplified version of exists that returns false on error. 
llvm-svn: 141450
 2011-10-08 00:18:12 +00:00
Michael J. Spencer
edcc61ba22 Object: Add support for opening stdin. 
llvm-svn: 141449
 2011-10-08 00:17:58 +00:00
Michael J. Spencer
1acd078990 Object: constize Archive. 
llvm-svn: 141448
 2011-10-08 00:17:45 +00:00
Jim Grosbach
6322a90e2d Enable ARM mode VDUP(scalar) tests. 
llvm-svn: 141447
 2011-10-07 23:57:03 +00:00
Jim Grosbach
94980a23e6 ARM NEON assembly parsing and encoding for VDUP(scalar). 
llvm-svn: 141446
 2011-10-07 23:56:00 +00:00
Andrew Trick
75743b069e LSR should only reuse phis that match its formula. 
Fixes rdar://problem/5064068

llvm-svn: 141442
 2011-10-07 23:46:21 +00:00
Eli Friedman
433785c651 Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086. 
llvm-svn: 141441
 2011-10-07 23:40:49 +00:00
Nick Lewycky
8b0cf65af7 Don't emit the symbol table entry for the .symtab_shndx section either. 
llvm-svn: 141440
 2011-10-07 23:29:53 +00:00
Nick Lewycky
95b57a67cb Remove extraneous curlies. No functionality change. 
llvm-svn: 141439
 2011-10-07 23:28:32 +00:00
Jim Grosbach
cb48e1fe60 ARM prefix asmparser operand kind enums for readability. 
llvm-svn: 141438
 2011-10-07 23:24:09 +00:00
Bill Wendling
a95511a253 Take all of the invoke basic blocks and make the dispatch basic block their new 
successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.

This more closely resembles what the CFG is actually doing.

llvm-svn: 141436
 2011-10-07 23:18:02 +00:00
Bill Wendling
b52a154112 Add a bool value to set the IsLandingPad flag to. 
llvm-svn: 141435
 2011-10-07 23:06:01 +00:00
Bill Wendling
1f7c16c63f Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit 
it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.

llvm-svn: 141419
 2011-10-07 22:08:37 +00:00
Bill Wendling
0f5b533c48 Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to 
do. This will be useful later on with the new SJLJ stuff.

llvm-svn: 141416
 2011-10-07 21:25:38 +00:00
Nick Lewycky
fe793806e9 Don't emit a shstrtabindex in the reserved range. Spotted by inspection and 
patch by Cary Coutant!

llvm-svn: 141413
 2011-10-07 20:58:24 +00:00
Nick Lewycky
112a7ae899 Clarify/fix typo. No functionality change. 
llvm-svn: 141412
 2011-10-07 20:56:23 +00:00
Jakob Stoklund Olesen
78d177b5ce Constrain both operands on MOVZX32_NOREXrr8. 
This instruction is explicitly encoded without an REX prefix, so both
operands but be *_NOREX.

Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX
constraints are not satisfied.

This fixes a miscompilation in 20040709-2 in the gcc test suite.

llvm-svn: 141410
 2011-10-07 20:15:54 +00:00
Michael J. Spencer
7037dc0b45 Fix a few changes I missed. 
llvm-svn: 141392
 2011-10-07 19:52:41 +00:00
Michael J. Spencer
3cc26e4c5e Fix GCC again. 
llvm-svn: 141389
 2011-10-07 19:46:12 +00:00
Michael J. Spencer
022d2639d9 Fix spelling in comment. 
llvm-svn: 141386
 2011-10-07 19:25:47 +00:00
Michael J. Spencer
34d76cf95b Change relocation API to be per section. This time without breaking GCC. 
llvm-svn: 141385
 2011-10-07 19:25:32 +00:00
Jim Grosbach
d3c2b772ee Improve ARM assembly parser diagnostic for unexpected tokens. 
Consider:
  mov r8, r11 fred

Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list

^

Now we generate:
x.s:5:14: error: unexpected token in argument list
  mov r8, r11 fred
              ^

llvm-svn: 141380
 2011-10-07 18:27:04 +00:00
Bill Wendling
ecbddb2b9e Revert 141376 and 141377 due to breaking the build. 
--- Reverse-merging r141377 into '.':
U    tools/llvm-objdump/MachODump.cpp
--- Reverse-merging r141376 into '.':
U    include/llvm/Object/COFF.h
U    include/llvm/Object/ObjectFile.h
U    include/llvm-c/Object.h
U    tools/llvm-objdump/llvm-objdump.cpp
U    lib/Object/MachOObjectFile.cpp
U    lib/Object/COFFObjectFile.cpp
U    lib/Object/Object.cpp
U    lib/Object/ELFObjectFile.cpp

llvm-svn: 141379
 2011-10-07 18:25:37 +00:00
David Greene
ae3329d597 Remove Multidefs 
Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

llvm-svn: 141378
 2011-10-07 18:25:05 +00:00
Michael J. Spencer
8c104f4259 Fix spelling in comment. 
llvm-svn: 141377
 2011-10-07 18:15:40 +00:00
Michael J. Spencer
14925a859b Change relocation API to be per section. 
llvm-svn: 141376
 2011-10-07 18:15:25 +00:00
Evan Cheng
c956dcb888 Jakob is the code owner of register allocation and TableGen. 
llvm-svn: 141372
 2011-10-07 17:26:38 +00:00
Evan Cheng
99b25c827c High bits of movmskp{s|d} and pmovmskb are known zero. rdar://10247336 
llvm-svn: 141371
 2011-10-07 17:21:44 +00:00
Bob Wilson
b55a64ae72 Reenable tail calls for iOS 5.0 and later. 
llvm-svn: 141370
 2011-10-07 17:17:49 +00:00
Bob Wilson
d8856e17fe Reenable use of divmod compiler_rt functions for iOS 5.0 and later. 
llvm-svn: 141368
 2011-10-07 16:59:21 +00:00
Matt Beaumont-Gay
92f76e7901 Move default to top of switch 
llvm-svn: 141366
 2011-10-07 16:27:01 +00:00
Anton Korobeynikov
0944a4c5cc Peephole optimization for ABS on ARM. 
Patch by Ana Pazos!

llvm-svn: 141365
 2011-10-07 16:15:08 +00:00
Duncan Sands
559ef2f491 Teach GVN to also propagate switch cases. For example, in this code 
switch (n) {
    case 27:
      do_something(x);
    ...
  }
the call do_something(x) will be replaced with do_something(27).  In
gcc-as-one-big-file this results in the removal of about 500 lines of
bitcode (about 0.02%), so has about 1/10 of the effect of propagating
branch conditions.

llvm-svn: 141360
 2011-10-07 08:29:06 +00:00
Craig Topper
761bf0e7d3 Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. 
llvm-svn: 141358
 2011-10-07 07:02:24 +00:00
Andrew Trick
276ecf218a PostRA scheduler fix. Clear stale loop dependencies. 
Fixes <rdar://problem/10235725>

llvm-svn: 141357
 2011-10-07 06:33:09 +00:00
Andrew Trick
7eeb88cd98 whitespace 
llvm-svn: 141356
 2011-10-07 06:27:02 +00:00
Craig Topper
71e09ffe7b Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. 
llvm-svn: 141354
 2011-10-07 05:53:50 +00:00
Craig Topper
f083691b6d Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 
llvm-svn: 141353
 2011-10-07 05:35:38 +00:00
Bill Wendling
5492d7a175 Use the correct vreg here. 
llvm-svn: 141342
 2011-10-06 23:41:14 +00:00
Bill Wendling
e34c65724b Generate the dispatch code for a 'thumb' function. This is very similar to the 
others. They take the call site value. Determine if it's a proper value. And
then jumps to the correct call site via a jump table.

llvm-svn: 141341
 2011-10-06 23:37:36 +00:00
Owen Anderson
dc57f29896 Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue. 
llvm-svn: 141339
 2011-10-06 23:33:11 +00:00
Eli Friedman
4d63ca106a Remove the old atomic instrinsics. autoupgrade functionality is included with this patch. 
llvm-svn: 141333
 2011-10-06 23:20:49 +00:00
Bill Wendling
82b6f24ee4 Generate the dispatch table for ARM mode. 
llvm-svn: 141327
 2011-10-06 22:53:00 +00:00
Bill Wendling
3c68e1d212 Refactor some of the code that sets up the entry block for SjLj EH. No functionality change. 
llvm-svn: 141323
 2011-10-06 22:18:16 +00:00
Jim Grosbach
53b2b56db8 Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead. 
llvm-svn: 141321
 2011-10-06 22:04:05 +00:00
Bill Wendling
c8c252a859 Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!) 
Place the immediate to OR into a register so that it works.

llvm-svn: 141319
 2011-10-06 21:51:21 +00:00
Jim Grosbach
ec12700fe4 Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141318
 2011-10-06 21:32:50 +00:00
Bill Wendling
e79ca82af3 * Set the low bit of the return address when we are in thumb mode. 
* Some code cleanup.

llvm-svn: 141317
 2011-10-06 21:29:56 +00:00
Jim Grosbach
17ae6aae38 Fix and clean up tests. Un-XFAIL. 
llvm-svn: 141316
 2011-10-06 21:28:30 +00:00