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Commit Graph

855 Commits

Author SHA1 Message Date
Dan Gohman
3ea2dceca0 Prune and tidy #includes.
llvm-svn: 51697
2008-05-29 19:52:31 +00:00
Bill Wendling
b56bc61cf4 Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.

llvm-svn: 51660
2008-05-28 22:54:52 +00:00
Bill Wendling
1866fa680f Remove warnings about unused parameters and shadowed variables.
llvm-svn: 51266
2008-05-19 20:15:12 +00:00
Evan Cheng
73dadf21ce Fix typos and comments.
llvm-svn: 51165
2008-05-15 22:13:02 +00:00
Evan Cheng
778a5e27b0 Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
llvm-svn: 51140
2008-05-15 08:39:06 +00:00
Evan Cheng
fcbdc8bd6e Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
llvm-svn: 51008
2008-05-12 23:04:07 +00:00
Bill Wendling
646f3458c4 Constify the machine instruction passed into the
"is{Trivially,Really}ReMaterializable" methods.

llvm-svn: 51001
2008-05-12 20:54:26 +00:00
Evan Cheng
228cce5b2d Forgot this.
llvm-svn: 50993
2008-05-12 20:08:05 +00:00
Evan Cheng
f87942325f Make OpActionsCapacity multiple of 4.
llvm-svn: 50917
2008-05-09 21:50:23 +00:00
Duncan Sands
6f4e916c6a Output correct exception handling and frame info
on x86-64 linux.  This causes no regressions on
32 bit linux and 32 bit ppc.  More tests pass
on 64 bit ppc with no regressions.  I didn't
turn on eh on 64 bit linux because the intrinsics
needed to compile the eh runtime aren't done
yet.  But if you turn it on and link with the
mainline runtime then eh seems to work fine
on x86-64 linux with this patch.  Thanks to
Dale for testing.  The main point of the patch
is that if you output that some object is
encoded using 4 bytes you had better not output
8 bytes for it: the patch makes everything
consistent.

llvm-svn: 50825
2008-05-07 19:11:09 +00:00
Mon P Wang
84a269e023 Added addition atomic instrinsics and, or, xor, min, and max.
llvm-svn: 50663
2008-05-05 19:05:59 +00:00
Evan Cheng
d9353009b7 Fix more -Wshorten-64-to-32 warnings.
llvm-svn: 50659
2008-05-05 18:30:58 +00:00
Dan Gohman
c860d9c77c Add AsmPrinter support for emitting a directive to declare that
the code being generated does not require an executable stack.

Also, add target-specific code to make use of this on Linux
on x86. 

llvm-svn: 50634
2008-05-05 00:28:39 +00:00
Arnold Schwaighofer
f58a35e2ec Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.

llvm-svn: 50477
2008-04-30 09:16:33 +00:00
Chris Lattner
39a4281deb Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.

llvm-svn: 50315
2008-04-27 00:37:18 +00:00
Chris Lattner
b83aaaa855 Move a bunch of inline asm code out of line.
llvm-svn: 50313
2008-04-27 00:09:47 +00:00
Chris Lattner
b5bd654163 A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
  - Make LowerAsmOperandForConstraint const.
  - Make lowerXConstraint -> LowerXConstraint
  - Make LowerXConstraint return a const char* instead of taking a string byref.

llvm-svn: 50312
2008-04-26 23:02:14 +00:00
Anton Korobeynikov
b1ad6979dc Add facility for pre-RA passes
llvm-svn: 50165
2008-04-23 18:22:28 +00:00
Anton Korobeynikov
73935826d4 Make stack alignment options global for all targets
llvm-svn: 50157
2008-04-23 18:18:10 +00:00
Nicolas Geoffray
1f3211af01 Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function
the stub will resolve.

llvm-svn: 49814
2008-04-16 20:46:05 +00:00
Nicolas Geoffray
82baa2d2c6 Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Evan Cheng
cff9295e43 Sort sub-registers and super-registers lists according to super-sub register relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed).
llvm-svn: 49714
2008-04-15 07:56:03 +00:00
Dan Gohman
8d46278998 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.

llvm-svn: 49666
2008-04-14 17:55:48 +00:00
Dale Johannesen
edcba1161f Reverse sense of unwind-tables option. This means
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.

llvm-svn: 49663
2008-04-14 17:54:17 +00:00
Dan Gohman
237a69b49c Clean up some comments.
llvm-svn: 49661
2008-04-14 17:45:20 +00:00
Dan Gohman
15edbf989f Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Dan Gohman
b3a511b236 Make isVectorClearMaskLegal's operand list const.
llvm-svn: 49446
2008-04-09 20:09:42 +00:00
Dan Gohman
b05ea92f80 Fix some minor errors in comments.
llvm-svn: 49445
2008-04-09 20:08:06 +00:00
Dale Johannesen
ec0fe04044 Implement new llc flag -disable-required-unwind-tables.
Corresponds to -fno-unwind-tables (usually default in gcc).

llvm-svn: 49361
2008-04-08 00:10:24 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Chris Lattner
49e9edd6f6 Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.

llvm-svn: 48963
2008-03-30 18:22:13 +00:00
Dale Johannesen
4524d3a1d1 Fix a bug in Darwin EH: FDE->CIE pointer must
be relocatable.  Describe why .set is needed better.

llvm-svn: 48848
2008-03-26 23:31:39 +00:00
Dan Gohman
22002efa15 A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.

llvm-svn: 48800
2008-03-25 21:45:14 +00:00
Devang Patel
71f3156ea3 Add optimize-for-size knob.
llvm-svn: 48793
2008-03-25 21:02:35 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng
9af68f56c5 Remove isImplicitDef TargetInstrDesc flag.
llvm-svn: 48381
2008-03-15 00:19:36 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Evan Cheng
af1c76846d When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
llvm-svn: 48218
2008-03-11 07:19:34 +00:00
Scott Michel
bb8e8fca47 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Evan Cheng
e0b3c221ab Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.

llvm-svn: 47931
2008-03-05 01:30:59 +00:00
Anton Korobeynikov
875da2420a Use enumeration for preffered EH dwarf encoding reason
llvm-svn: 47770
2008-02-29 22:09:08 +00:00
Dale Johannesen
310201ba32 Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)

llvm-svn: 47734
2008-02-28 22:31:51 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Anton Korobeynikov
7bd4b77e30 Preparation step for some cleanup/generalization in EH information emission:
provide TAI hook for selection of EH data emission format. Currently unused.

llvm-svn: 47699
2008-02-27 23:33:50 +00:00
Dan Gohman
689d8cac04 Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.

llvm-svn: 47648
2008-02-27 00:25:32 +00:00
Bill Wendling
8fb166bf6c Rename PrintableName to Name.
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Evan Cheng
40c26c71c0 Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
llvm-svn: 47587
2008-02-26 02:33:44 +00:00