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Commit Graph

98318 Commits

Author SHA1 Message Date
Rafael Espindola
e5eb9f253d On ELF and COFF treat linker_private like private.
The linkers on these systems don't have anything special to do with these
symbols. Since the intent is for them to be absent from the final object,
just treat them as private.

llvm-svn: 197080
2013-12-11 22:18:44 +00:00
David Blaikie
d7d445afd4 Revert "DebugInfo: Move type units into the debug_types section with appropriate comdat grouping and type unit headers"
This reverts commit r197073.

The test seems to be failing on some buildbots for unknown reasons.
Reverting until I can figure that out. If anyone's got a reproduction
(.s and .o together would be great) - I'd really appreciate it.

llvm-svn: 197079
2013-12-11 22:08:39 +00:00
Roman Divacky
70398ec7f7 Remove test thats testing the same thing as tls.ll.
llvm-svn: 197074
2013-12-11 21:37:04 +00:00
David Blaikie
59b3fb2510 DebugInfo: Move type units into the debug_types section with appropriate comdat grouping and type unit headers
This commit does not complete the type units feature - there are issues
around fission support (skeletal type units, pubtypes/pubnames) and
hashing of some types including those containing references to types in
other type units.

llvm-svn: 197073
2013-12-11 21:36:27 +00:00
David Blaikie
1276403fc9 DwarfUnit: LLVM_OVERRIDE and constify some functions
llvm-svn: 197072
2013-12-11 21:14:02 +00:00
Chad Rosier
c251a82254 [AArch64] Add NEON scalar floating-point compare LLVM AArch64 intrinsics that
use f32/f64 types, rather than their vector equivalents.

llvm-svn: 197068
2013-12-11 21:03:46 +00:00
Chad Rosier
0b1fef12e8 [AArch64] Refactor the NEON scalar floating-point reciprocal step and
floating-point reciprocal square root step LLVM AArch64 intrinsics to
use f32/f64 types, rather than their vector equivalents.

llvm-svn: 197067
2013-12-11 21:03:43 +00:00
Chad Rosier
43daaa765b [AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating-
point reciprocal exponent, and floating-point reciprocal square root estimate
LLVM AArch64 intrinsics to use f32/f64 types, rather than their vector
equivalents.

llvm-svn: 197066
2013-12-11 21:03:40 +00:00
Rafael Espindola
676fc699c0 Don't set unused variable.
llvm-svn: 197064
2013-12-11 20:40:57 +00:00
Logan Chien
50a059d70f [arm] Pass -triple to llvm-mc for ARM ELF test cases.
Replace -arch with -triple so that we can guarantee that
ELF object files can be generated.

llvm-svn: 197062
2013-12-11 19:38:10 +00:00
Tom Stellard
846883f395 R600: Re-format Processors.td
This makes it a little easier to read.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 197058
2013-12-11 17:51:51 +00:00
Tom Stellard
11ea886d72 R600: Register AMDGPUCFGStructurizer pass
This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 197057
2013-12-11 17:51:47 +00:00
Tom Stellard
22354cfe07 R600: Register R600EmitClauseMarkers pass
This enables -print-before-all to dump MachineInstrs after it is run.

Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 197056
2013-12-11 17:51:41 +00:00
Logan Chien
e6b3d37d36 [arm] Implement ARM .arch directive.
llvm-svn: 197052
2013-12-11 17:16:25 +00:00
Benjamin Kramer
ebd2e18225 SelectionDAG: Fix a typo.
Found by "cppcheck". PR18208.

llvm-svn: 197047
2013-12-11 16:36:09 +00:00
Tim Northover
d66403a4e1 ARM: constrain register-class in fast-isel
The tests were no longer using fast-isel at all (MachO needs an "ios" rather
than "darwin" triple at the moment and Linux needs ARM mode). Once that was
corrected, the verifier complained about a t2ADDri created for the alloca.

llvm-svn: 197046
2013-12-11 16:04:57 +00:00
Alp Toker
603989e308 Build fix for Android NDK which has neither futimes nor futimens
Based on a patch by Neil Henning!

llvm-svn: 197045
2013-12-11 15:42:33 +00:00
Elena Demikhovsky
154413adc2 AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC.
I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).

llvm-svn: 197041
2013-12-11 14:31:04 +00:00
Richard Sandiford
533c977c68 [SystemZ] Optimize fcmp X, 0 in cases where X is also negated
In such cases it's often better to test the result of the negation instead,
since the negation also sets CC.

llvm-svn: 197032
2013-12-11 11:45:08 +00:00
Richard Sandiford
ffff4e9e61 Extend (truncate (load)) folding
DAGCombiner could fold (truncate (load)) -> smaller load if the original
load was the width of the truncation result or wider.  This patch extends
it to handle cases where the original load was narrower (and so the
extension type stays the same).

llvm-svn: 197030
2013-12-11 11:37:27 +00:00
Manuel Klimek
e3472acb45 Fix XFAIL rules.
llvm-svn: 197017
2013-12-11 08:38:42 +00:00
Rafael Espindola
857e3cbd88 Make this test a bit stricter.
The extra CHECK and CHECK-NEXT are there to show that we don't print a
linker private symbol on linux.

llvm-svn: 197003
2013-12-11 04:10:41 +00:00
Andrew Trick
bdcfd58034 Add TargetRegisterInfo::reverseLocalAssignment hook.
This hook reverses the order of assignment for local live ranges. This
will generally allocate shorter local live ranges first. For targets with
many registers, this could reduce regalloc compile time by a large
factor. It should still achieve optimal coloring; however, it can change
register eviction decisions. It is disabled by default for two reasons:
(1) Top-down allocation is simpler and easier to debug for targets that
don't benefit from reversing the order.
(2) Bottom-up allocation could result in poor evicition decisions on some
targets affecting the performance of compiled code.

llvm-svn: 197001
2013-12-11 03:40:15 +00:00
Reed Kotler
ebfdeaa94e Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.
llvm-svn: 196999
2013-12-11 03:32:44 +00:00
Kevin Qin
1453b4e3d7 [AArch64 NEON] Get instruction BSL matched to VSELECT.
llvm-svn: 196998
2013-12-11 02:33:50 +00:00
Rafael Espindola
cb6cafb631 Move mips' datalayout computation out of line and add comments.
llvm-svn: 196996
2013-12-11 01:41:10 +00:00
Rafael Espindola
082ec7aafe Move Sparc's getDataLayout out of line and add comments.
llvm-svn: 196990
2013-12-11 01:07:43 +00:00
NAKAMURA Takumi
54fa39136d Prune redundant dependencies in LLVMBuild.txt.
llvm-svn: 196988
2013-12-11 00:30:57 +00:00
Rafael Espindola
db206ff5b6 Move PPC's getDataLayoutString out of line and document it better.
llvm-svn: 196987
2013-12-11 00:09:06 +00:00
Reid Kleckner
9e1ba62c63 Revert the backend fatal error from r196939
The combination of inline asm, stack realignment, and dynamic allocas
turns out to be too common to reject out of hand.

ASan inserts empy inline asm fragments and uses aligned allocas.
Compiling any trivial function containing a dynamic alloca with ASan is
enough to trigger the check.

XFAIL the test cases that would be miscompiled and add one that uses the
relevant functionality.

llvm-svn: 196986
2013-12-10 23:23:52 +00:00
Rafael Espindola
6b7d172e52 Refactor the computation of the x86 datalayout.
llvm-svn: 196976
2013-12-10 22:05:32 +00:00
Reid Kleckner
29793e54b1 [asan] Fix the coverage.cc test broken by r196939
It was failing because ASan was adding all of the following to one
function:
- dynamic alloca
- stack realignment
- inline asm

This patch avoids making the static alloca dynamic when coverage is
used.

ASan should probably not be inserting empty inline asm blobs to inhibit
duplicate tail elimination.

llvm-svn: 196973
2013-12-10 21:49:28 +00:00
Matt Arsenault
9db19365b4 Use llvm_unreachable instead of assert(0)
llvm-svn: 196971
2013-12-10 21:37:42 +00:00
David Fang
7d43532c99 on darwin<10, fallback to .weak_definition (PPC,X86)
.weak_def_can_be_hidden was not yet supported by the system assembler

llvm-svn: 196970
2013-12-10 21:37:41 +00:00
Chad Rosier
29ed5c4552 [AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64
intrinsic to use f32/f64 types, rather than their vector equivalents.

llvm-svn: 196965
2013-12-10 21:33:59 +00:00
Chad Rosier
5394f9c916 [AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point
LLVM AArch64 intrinsics to use f32/f64, rather than their vector equivalents.

llvm-svn: 196964
2013-12-10 21:33:56 +00:00
Chad Rosier
b2112dc6c3 [AArch64] Overload NEON signed/unsigned floating-point convert to fixed-point
and fixed-point convert to floating-point LLVM AArch64 intrinsics.

llvm-svn: 196963
2013-12-10 21:33:53 +00:00
Chad Rosier
3d7979609e [AArch64] Overload NEON signed/unsigned integer convert to floating-point
LLVM AArch64 intrinsics.

llvm-svn: 196962
2013-12-10 21:33:50 +00:00
Matt Arsenault
0a974aca94 R600/SI: Add i64 cmp tests
llvm-svn: 196960
2013-12-10 21:11:55 +00:00
Matt Arsenault
ceacb41269 Fix gcc warnings.
Unused variable and unused typedef in release build.

llvm-svn: 196947
2013-12-10 18:55:37 +00:00
Reid Kleckner
b6a72325f3 Reland "Fix miscompile of MS inline assembly with stack realignment"
This re-lands commit r196876, which was reverted in r196879.

The tests have been fixed to pass on platforms with a stack alignment
larger than 4.

Update to clang side tests will land shortly.

llvm-svn: 196939
2013-12-10 18:27:32 +00:00
Tim Northover
54d769f4eb Make Triple's isOSBinFormatXXX functions partition triple-space.
Most users would be surprised if "isCOFF" and "isMachO" were simultaneously
true, unless they'd put the compiler in a box with a gun attached to a photon
detector.

This makes sure precisely one of the three formats is true for any triple and
simplifies some target logic based on that.

llvm-svn: 196934
2013-12-10 16:57:43 +00:00
Alp Toker
19ae693512 Support: Update documentation for Program functions
The docstrings were describing an older interface that has been replaced with
functions.

Also describe the performance characteristics of FindProgramByName() and
ExecuteAndWait() explaining when it's best to avoid them.

llvm-svn: 196932
2013-12-10 16:31:09 +00:00
Chad Rosier
7e9f19f92d [AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so
that they use float/double rather than the vector equivalents when appropriate.

llvm-svn: 196930
2013-12-10 16:11:39 +00:00
Chad Rosier
0b6c7be6f7 [AArch64] Refactor the Neon vector/scalar floating-point convert implementation.
Specifically, reuse the ARM intrinsics when possible.

llvm-svn: 196926
2013-12-10 15:35:33 +00:00
Andrea Di Biagio
3107b3cbaa Ensure that the backend no longer emits unnecessary vector insert instructions
immediately after SSE scalar fp instructions like addss or mulss.

Added patterns to select SSE scalar fp arithmetic instructions from a scalar
fp operation followed by a blend.

For example, given the following code:
  __m128 foo(__m128 A, __m128 B) {
    A[0] += B[0];
    return A;
  }

previously we generated:
  addss %xmm0, %xmm1
  movss %xmm1, %xmm0

now we generate:
  addss %xmm1, %xmm0

llvm-svn: 196925
2013-12-10 15:22:48 +00:00
Rafael Espindola
15e2e528f8 Use Field Lists for the types' "Overview", "Syntax" and "Examples".
Thanks to Sean Silva for the suggestion.

llvm-svn: 196924
2013-12-10 14:53:22 +00:00
Vincent Lejeune
73c6e97c15 R600: Fix an infinite loop when trying to reorganize export/tex vector input
llvm-svn: 196923
2013-12-10 14:43:31 +00:00
Vincent Lejeune
cd5d9a9849 R600: Fix input modifiers lost for Cayman
llvm-svn: 196922
2013-12-10 14:43:27 +00:00
Reed Kotler
1f7ad447b7 Next step in Mips16 prologue/epilogue cleanup.
Save S2(reg 18) only when we are calling floating point stubs that
have a return value of float or complex. Some more work to make this
better but this is the first step.

llvm-svn: 196921
2013-12-10 14:29:38 +00:00