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Author SHA1 Message Date
Jakob Stoklund Olesen
e60dea48ec Use an existing function. 
llvm-svn: 145883
 2011-12-06 00:51:12 +00:00
Jakob Stoklund Olesen
faa1b18b38 Fix unclear wording. 
llvm-svn: 145882
 2011-12-06 00:51:09 +00:00
Jim Grosbach
633ce3426c Move target-specific logic out of generic MCAssembler. 
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

llvm-svn: 145881
 2011-12-06 00:47:03 +00:00
Nick Lewycky
d59dcc5ddb Expose a switch for the new gcov format. 
llvm-svn: 145880
 2011-12-06 00:29:13 +00:00
Chad Rosier
7096fea51c Probably not a good idea to convert a single vector load into a memcpy. We 
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

llvm-svn: 145879
 2011-12-06 00:19:08 +00:00
Jim Grosbach
c3c8c0eddd Tidy up. Hard tabs. 
llvm-svn: 145878
 2011-12-06 00:13:09 +00:00
Jim Grosbach
c13dbd8744 Tidy up. Hard tabs. 
llvm-svn: 145877
 2011-12-06 00:12:12 +00:00
Nick Lewycky
6c5ac27dec All these arguments are default anyways. 
llvm-svn: 145876
 2011-12-06 00:11:58 +00:00
Jim Grosbach
5b567d6669 Tidy up. 80 columns. 
llvm-svn: 145875
 2011-12-06 00:11:13 +00:00
Jim Grosbach
93874e36fa Switch MCAssembler to method names starting w/ lower-case. 
per http://llvm.org/docs/CodingStandards.html#ll_naming

llvm-svn: 145873
 2011-12-06 00:03:48 +00:00
Jim Grosbach
fe71651f99 Simple branch relaxation for Thumb2 Bcc instructions. 
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

llvm-svn: 145871
 2011-12-05 23:45:46 +00:00
Jim Grosbach
9112c6a3ee Tidy up. 
llvm-svn: 145870
 2011-12-05 23:20:14 +00:00
Nick Lewycky
389fa6c38d Silence tsan false-positives (tsan can't track things which are only safe due to 
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.

llvm-svn: 145869
 2011-12-05 23:07:05 +00:00
Chad Rosier
4f8c6f6a9c Update comment. 
llvm-svn: 145866
 2011-12-05 22:53:09 +00:00
Chad Rosier
c50cbc5a65 Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio 
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150

llvm-svn: 145865
 2011-12-05 22:37:00 +00:00
Jim Grosbach
74bbb6454e Tweak ADDrr fix. Bad check for explicit .w 
llvm-svn: 145863
 2011-12-05 22:27:04 +00:00
Jim Grosbach
6584358d09 Update tests for r145860. Add a few new ones. 
llvm-svn: 145861
 2011-12-05 22:21:28 +00:00
Jim Grosbach
898ab7e4ec Thumb2 prefer ADD register encoding T2 to T3 when possible. 
rdar://10529664

llvm-svn: 145860
 2011-12-05 22:16:39 +00:00
Bill Wendling
77e127d56f Move 'returns_twice' definition into alphabetical place. 
llvm-svn: 145854
 2011-12-05 21:27:54 +00:00
Akira Hatanaka
bdefd49aa5 Add definitions of 64-bit extract and insert instrucions and make 
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

llvm-svn: 145853
 2011-12-05 21:26:34 +00:00
Akira Hatanaka
ba16541b01 Split ExtIns into two base classes and have instructions EXT and INS derive from 
them.

llvm-svn: 145852
 2011-12-05 21:14:28 +00:00
Jim Grosbach
655b017748 Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions. 
rdar://10529348

llvm-svn: 145851
 2011-12-05 21:06:26 +00:00
Akira Hatanaka
b119dd5891 Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and 
O32 with relocation-model=pic too.

llvm-svn: 145850
 2011-12-05 21:03:03 +00:00
Jim Grosbach
9c017fb254 ARM assembly parsing for the rest of the VMUL data type aliases. 
Finish up rdar://10522016.

llvm-svn: 145846
 2011-12-05 20:29:59 +00:00
Jim Grosbach
8a902ce8de Fix previous commit. Oops. 
llvm-svn: 145844
 2011-12-05 20:12:26 +00:00
Jim Grosbach
8681f76f38 Tidy up. No functional change. 
llvm-svn: 145843
 2011-12-05 20:09:44 +00:00
Jim Grosbach
7b62c2f71d ARM assmebler parsing for two-operand VMUL instructions. 
Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.

rdar://10522016

llvm-svn: 145842
 2011-12-05 19:55:46 +00:00
Anna Zaks
431b43fdbe Change the Dominators recalculate() function to only rely on GraphTraits 
This is a patch by Guoping Long!

As part of utilizing LLVM Dominator computation in Clang, made two changes to LLVM dominators tree implementation:

 - (1) Change the recalculate() template function to only rely on GraphTraits.
 - (2) Add a size() method to GraphTraits template class to query the number of nodes in the graph.

llvm-svn: 145837
 2011-12-05 19:17:04 +00:00
Hal Finkel
c8d6ce5e09 Add test case - this input used to crash because of duplicate generation of SPILL_CRs 
llvm-svn: 145820
 2011-12-05 17:55:22 +00:00
Hal Finkel
8b1e460cd9 enable PPC register scavenging by default (update tests and remove some FIXMEs) 
llvm-svn: 145819
 2011-12-05 17:55:17 +00:00
Hal Finkel
1a4a59ed2a don't include CR bit subregs in callee-saved list 
llvm-svn: 145818
 2011-12-05 17:55:12 +00:00
Hal Finkel
68e102ed41 remove wasted space for extra bit copies of CR2 subregs 
llvm-svn: 145817
 2011-12-05 17:55:06 +00:00
Hal Finkel
67924a349b add register pressure for CR regs 
llvm-svn: 145816
 2011-12-05 17:54:17 +00:00
Benjamin Kramer
f274d5feac Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks. 
- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.

llvm-svn: 145810
 2011-12-05 17:23:27 +00:00
NAKAMURA Takumi
c6a187dfdd test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux. 
llvm-svn: 145805
 2011-12-05 07:54:57 +00:00
Craig Topper
e873d61004 Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions. 
llvm-svn: 145804
 2011-12-05 07:27:14 +00:00
Craig Topper
02e1c33dca Clean up and optimizations to the X86 shuffle lowering code. No functional change. 
llvm-svn: 145803
 2011-12-05 06:56:46 +00:00
Nadav Rotem
1a91e4381d Add support for vectors of pointers. 
llvm-svn: 145801
 2011-12-05 06:29:09 +00:00
Jakub Staszak
2941ddc16d Fix table of contents. 
llvm-svn: 145793
 2011-12-04 20:44:25 +00:00
Jakub Staszak
01c388c624 Add 'llvm.expect' intrinsic description. 
llvm-svn: 145792
 2011-12-04 18:29:26 +00:00
Eric Christopher
5697266013 Add inline subprogram names to the name lookup table since they may 
not get there any other way.

llvm-svn: 145789
 2011-12-04 06:02:38 +00:00
Bob Wilson
f054e82281 Fix 80-column issues. 
llvm-svn: 145783
 2011-12-04 00:52:23 +00:00
Anton Korobeynikov
e2277de6a7 Emit the ctors in the proper order on ARM/EABI. 
Maybe some targets should use this as well.

Patch by Evgeniy Stepanov!

llvm-svn: 145781
 2011-12-03 23:49:37 +00:00
Venkatraman Govindaraju
a942dee2b8 Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since 
AnalyzeBranch doesn't change the successor, just the order.

llvm-svn: 145779
 2011-12-03 21:24:48 +00:00
Benjamin Kramer
ab489e4c97 Simplify code. No functionality change. 
-3% on ARMDissasembler.cpp.

llvm-svn: 145773
 2011-12-03 16:18:22 +00:00
Benjamin Kramer
4ff0db784c Clear the new cache. 
llvm-svn: 145771
 2011-12-03 15:19:55 +00:00
Benjamin Kramer
ed1cd704e0 Add a "seen blocks" cache to LVI to avoid a linear scan over the whole cache just to remove no blocks from the maps. 
-15% on ARMDisassembler.cpp (Release build).  It's not that great to add another
layer of caching to the caching-heavy LVI but I don't see a better way.

llvm-svn: 145770
 2011-12-03 15:16:45 +00:00
Sanjoy Das
fe35e107cd Check for stack space more intelligently. 
libgcc sets the stack limit field in TCB to 256 bytes above the actual
allocated stack limit.  This means if the function's stack frame needs
less than 256 bytes, we can just compare the stack pointer with the
stack limit.  This should result in lesser calls to __morestack.

llvm-svn: 145766
 2011-12-03 09:32:07 +00:00
Sanjoy Das
d1c3d82afe Fix a bug in the x86-32 code generated for segmented stacks. 
Currently LLVM pads the call to __morestack with a add and sub of 8
bytes to esp.  This isn't correct since __morestack expects the call
to be followed directly by a ret.

This commit also adjusts the relevant test-case.

llvm-svn: 145765
 2011-12-03 09:21:07 +00:00
Nick Lewycky
2b2f028dcc Creating multiple JITs on X86 in multiple threads causes multiple writes (of 
the same value) to this variable. This code could be refactored, but it doesn't
matter since the old JIT is going away. Add tsan annotations to ignore the
race.

llvm-svn: 145745
 2011-12-03 02:45:50 +00:00