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Commit Graph

138222 Commits

Author SHA1 Message Date
Vedant Kumar
e723e6ad9c [llvm-cov] Make 'adjustColumnWidths' do less work
This drops some redundant calls to get{UniqueSourceFiles,
CoveredFunctions}. We can figure out the right column widths without
re-doing this expensive work.

This isn't NFC, but I don't want to check in another binary *.covmapping
file with long filenames in it. I tested this locally on a project with
some long filenames (FileCheck).

llvm-svn: 281873
2016-09-19 00:38:16 +00:00
Vedant Kumar
c6a118fd20 [llvm-cov] Drop another redundant 'No.' suffix
llvm-svn: 281872
2016-09-19 00:38:14 +00:00
Vedant Kumar
36110a2aff [utils] Delete the 'check-coverage-regressions' script
In practice, it's way too noisy.

It's also a maintenance burden, since we apparently can't add tests for
it without breaking some Windows setups (see: D22692).

llvm-svn: 281871
2016-09-19 00:38:11 +00:00
Dehao Chen
0a9a8c9c72 Handle Invoke during sample profiler annotation: make it inlinable.
Summary: Previously we reline on inst-combine to remove inlinable invoke instructions. This causes trouble because a few extra optimizations are schedule early that could introduce too much CFG change (e.g. simplifycfg removes too much control flow). This patch handles invoke instruction in-place during sample profile annotation, so that we do not rely on instcombine to remove those invoke instructions.

Reviewers: davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24409

llvm-svn: 281870
2016-09-18 23:11:37 +00:00
Xinliang David Li
8ab1a937f7 Extend title underline
llvm-svn: 281869
2016-09-18 22:10:19 +00:00
Craig Topper
8173f1a5ca [AVX-512] Don't lower CVTPD2PS intrinsics to ISD::FP_ROUND with an X86 rounding mode encoding in the second operand. This immediate should only be 0 or 1 and indicates if the truncation loses precision.
Also enhance an assert in SelectionDAG::getNode to flag this sort of problem in the future.

llvm-svn: 281868
2016-09-18 21:49:32 +00:00
Craig Topper
040e018f7c [AVX-512] Stop lowering avx512_mask_sqrt intrinsics to ISD:FSQRT with a second operand containing an X86 specific rounding mode encoding that doesn't belong.
llvm-svn: 281867
2016-09-18 21:49:28 +00:00
Kostya Serebryany
637985cabd [libFuzzer] add -print_coverage=1 flag to print coverage directly from libFuzzer
llvm-svn: 281866
2016-09-18 21:47:08 +00:00
Simon Pilgrim
28ff0c8578 Fix covered-switch-default warning
llvm-svn: 281865
2016-09-18 21:08:35 +00:00
Simon Pilgrim
38157a81bd [CostModel][X86] Added scalar float op costs
llvm-svn: 281864
2016-09-18 21:01:20 +00:00
Simon Pilgrim
4d76cedc40 Rename tests
llvm-svn: 281863
2016-09-18 20:25:41 +00:00
Craig Topper
c385adca9d [X86] Fix typo in comment. NFC
llvm-svn: 281862
2016-09-18 18:59:38 +00:00
Craig Topper
b166011773 [AVX-512] Add memory load patterns for the legacy SSE scalar fp to integer conversion intrinsics to be consistent across all intruction sets.
llvm-svn: 281861
2016-09-18 18:59:36 +00:00
Craig Topper
fca6198042 [AVX-512] Remove COPY_TO_REGCLASS from a few patterns that already had the correct register class.
llvm-svn: 281860
2016-09-18 18:59:33 +00:00
Xinliang David Li
ca3730b14d Fix built bot failure
llvm-svn: 281859
2016-09-18 18:52:08 +00:00
Xinliang David Li
3da3a5fee4 [Profile] Implement select instruction instrumentation in IR PGO
Differential Revision: http://reviews.llvm.org/D23727

llvm-svn: 281858
2016-09-18 18:34:07 +00:00
Elena Demikhovsky
fdf2d14b30 [Loop Vectorizer] Consecutive memory access - fixed and simplified
Amended consecutive memory access detection in Loop Vectorizer.
Load/Store were not handled properly without preceding GEP instruction.

Differential Revision: https://reviews.llvm.org/D20789

llvm-svn: 281853
2016-09-18 13:56:08 +00:00
Simon Pilgrim
b15b82c418 [X86][SSE] Improve recognition of uitofp conversions that can be performed as sitofp
With D24253 we can now use SelectionDAG::SignBitIsZero with vector operations.

This patch uses SelectionDAG::SignBitIsZero to recognise that a zero sign bit means that we can use a sitofp instead of a uitofp (which is not directly support on pre-AVX512 hardware).

While AVX512 does provide support for uitofp, the conversion to sitofp should not cause any regressions.

Differential Revision: https://reviews.llvm.org/D24343

llvm-svn: 281852
2016-09-18 12:45:23 +00:00
Elena Demikhovsky
6f58841f3b [Loop vectorizer] Simplified GEP cloning. NFC.
Simplified GEP cloning in vectorizeMemoryInstruction().
Added an assertion that checks consecutive GEP, which should have only one loop-variant operand.

Differential Revision: https://reviews.llvm.org/D24557

llvm-svn: 281851
2016-09-18 09:22:54 +00:00
Wei Mi
4f31f47bed Change the order of the splitted store from high - low to low - high.
It is a trivial change which could make the testcase easier to be reused
for the store splitting in CodeGenPrepare.

llvm-svn: 281846
2016-09-18 06:10:32 +00:00
Kostya Serebryany
ad93add26c [libFuzzer] use 'if guard' instead of 'if guard >= 0' with trace-pc; change the guard type to intptr_t; use separate array for 8-bit counters
llvm-svn: 281845
2016-09-18 04:52:23 +00:00
Davide Italiano
1b427679af [llvm-objump] Simplify the code. NFCI.
llvm-svn: 281844
2016-09-18 04:39:15 +00:00
Davide Italiano
5be981977a [lib/LTO] Try harder to reduce code duplication. NFCI.
llvm-svn: 281843
2016-09-17 22:32:42 +00:00
Simon Pilgrim
02f84f8e9d [X86][SSE] Added vector udiv combine tests
llvm-svn: 281842
2016-09-17 22:02:23 +00:00
Simon Pilgrim
08eae71db6 [X86][SSE] Added vector fcopysign combine tests
Also demonstrating the poor lowering of fcopysign...

llvm-svn: 281841
2016-09-17 21:31:34 +00:00
Teresa Johnson
8d9ed1ced3 [ThinLTO] Ensure anonymous globals renamed even at -O0
Summary:
This fixes an issue when files are compiled with -flto=thin
at default -O0. We need to rename anonymous globals before attempting
to write the module summary because all values need names for
the summary. This was happening at -O1 and above, but not before
the early exit when constructing the pipeline for -O0.

Also add an internal -prepare-for-thinlto option to enable this
to be tested via opt.

Fixes PR30419.

Reviewers: mehdi_amini

Subscribers: probinson, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D24701

llvm-svn: 281840
2016-09-17 20:40:16 +00:00
Simon Pilgrim
535a47bf28 [X86][SSE] Added vector mul combine tests
llvm-svn: 281839
2016-09-17 20:06:16 +00:00
Simon Pilgrim
8b1084e1d0 [X86][SSE] Improve target shuffle mask extraction
Add ability to extract vXi64 'vzext_movl' masks on 32-bit targets

llvm-svn: 281834
2016-09-17 18:50:54 +00:00
Simon Pilgrim
466154ecbb [X86][AVX] Test target shuffle combining on 32 and 64-bit targets
llvm-svn: 281833
2016-09-17 18:42:41 +00:00
Simon Pilgrim
75052d70a3 [X86][AVX2] Add target shuffle constant folding tests
llvm-svn: 281830
2016-09-17 17:42:15 +00:00
Simon Pilgrim
b7d2d32e7a [X86][AVX] Add target shuffle constant folding tests
llvm-svn: 281829
2016-09-17 17:41:14 +00:00
Simon Pilgrim
35f14c5775 [X86][XOP] Add target shuffle constant folding tests
llvm-svn: 281828
2016-09-17 17:40:40 +00:00
Simon Pilgrim
b44df8e06b [X86][SSSE3] Add target shuffle constant folding tests
llvm-svn: 281827
2016-09-17 17:40:08 +00:00
Ron Lieberman
374b9a54f7 [Hexagon] segv while processing SUnit with nullNodePtr
Added BoundaryNode check to isBestZeroLatency function.

llvm-svn: 281825
2016-09-17 16:21:09 +00:00
Matt Arsenault
17a8bb755d AMDGPU: Fix broken FrameIndex handling
We were trying to avoid using a FrameIndex operand in non-pointer
operands in a convoluted way, and would break because of
using TargetFrameIndex. The TargetFrameIndex should only be used
in the case where it makes sense to fold it as part of the addressing
mode, otherwise it requires materialization like a normal constant.
This wasn't working reliably and failed in the added testcase, hitting
the assert when processing the frame index.

The TargetFrameIndex was coming from trying to produce an AssertZext
limiting the maximum stack size. I'm not sure this was correct to begin
with, because it is apparently possible to have a single workitem
dispatch that requires all 4G of private memory.

llvm-svn: 281824
2016-09-17 16:09:55 +00:00
Matt Arsenault
6d10bb9741 AMDGPU: Rename spill operands to match real instruction
llvm-svn: 281823
2016-09-17 15:52:37 +00:00
Matt Arsenault
8c9bd8e031 AMDGPU: Push bitcasts through build_vector
This reduces the number of copies and reg_sequences
when using fp constant vectors. This significantly
reduces the code size in local-stack-alloc-bug.ll

llvm-svn: 281822
2016-09-17 15:44:16 +00:00
Kostya Serebryany
9e8e432014 [libFuzzer] properly reset the guards when reseting the coverage. Also try to fix check-fuzzer on the bot
llvm-svn: 281814
2016-09-17 06:01:55 +00:00
Mehdi Amini
3efb00834f Don't create a SymbolTable in Function when the LLVMContext discards value names (NFC)
The ValueSymbolTable is used to detect name conflict and rename
instructions automatically. This is not needed when the value
names are automatically discarded by the LLVMContext.
No functional change intended, just saving a little bit of memory.

This is a recommit of r281806 after fixing the accessor to return
a pointer instead of a reference and updating all the call-sites.

llvm-svn: 281813
2016-09-17 06:00:02 +00:00
Mehdi Amini
0721239cf5 [MIR Parser] Fix Build!
Last-second refactoring before push was bad idea...

llvm-svn: 281812
2016-09-17 05:41:02 +00:00
Mehdi Amini
e8c86f419a MIR Parser: issue an error when the Context discard value names.
This is in line with the LLParser behavior

llvm-svn: 281811
2016-09-17 05:33:58 +00:00
Kostya Serebryany
4b0efbfd4a [libFuzzer] change trace-pc to use 8-byte guards
llvm-svn: 281810
2016-09-17 05:04:47 +00:00
Kostya Serebryany
6f62f4753a [sanitizer-coverage] change trace-pc to use 8-byte guards
llvm-svn: 281809
2016-09-17 05:03:05 +00:00
Mehdi Amini
5d436ed7a6 Revert "Don't create a SymbolTable in Function when the LLVMContext discards value names (NFC)"
This reverts commit r281806. It introduces undefined behavior as an
API is returning a reference to the Symtab

llvm-svn: 281808
2016-09-17 04:36:46 +00:00
Mehdi Amini
58f35cd01a Don't create a SymbolTable in Function when the LLVMContext discards value names (NFC)
The ValueSymbolTable is used to detect name conflict and rename
instructions automatically. This is not needed when the value
names are automatically discarded by the LLVMContext.
No functional change intended, just saving a little bit of memory.

llvm-svn: 281806
2016-09-17 03:39:01 +00:00
Matt Arsenault
4beb31bd8d AMDGPU: Use i64 scalar compare instructions
VI added eq/ne for i64, so use them.

llvm-svn: 281800
2016-09-17 02:02:19 +00:00
Tom Stellard
4715bc3836 AMDGPU/SI: Fix kernel argument ABI for HSA
Summary: i8, i16, and f16 values are not extended to 32-bit in the HSA kernel ABI.

Reviewers: arsenm

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, llvm-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D24621

llvm-svn: 281789
2016-09-16 22:20:24 +00:00
Chris Bieneman
8478fdd5dd [CMake] Support symlinks with the same name as the binary
This supports creating symlinks to tools in different directories than
the tool is built to. This is useful for the LLDB framework build which
I’m sending patches for shortly.

llvm-svn: 281788
2016-09-16 22:19:19 +00:00
Sanjay Patel
c18792fc71 [InstCombine] canonicalize vector select with constant vector condition to shuffle
As discussed on llvm-dev ( http://lists.llvm.org/pipermail/llvm-dev/2016-August/104210.html ): 
turn a vector select with constant condition operand into a shuffle as a canonicalization step.
Shuffles may be easier to reason about in conjunction with other shuffles and insert/extract.

Possible known (minor?) regressions from this change are filed as:
https://llvm.org/bugs/show_bug.cgi?id=28530 
https://llvm.org/bugs/show_bug.cgi?id=28531 
https://llvm.org/bugs/show_bug.cgi?id=30371

If something terrible happens to perf after this commit, feel free to revert until a backend
fix is in place.

Differential Revision: https://reviews.llvm.org/D24279

llvm-svn: 281787
2016-09-16 22:16:18 +00:00
Matt Arsenault
ef8518e8b1 AMDGPU: Allow some control flow intrinsics to be CSEd
These clean up some unnecessary or instructions in
cases with complex loops.

In the original testcase I noticed this, the same
or with exec was repeated 5 or 6 times in a row. With
this only one is emitted or sometimes a copy.

llvm-svn: 281786
2016-09-16 22:11:18 +00:00