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Commit Graph

166122 Commits

Author SHA1 Message Date
Clement Courbet
ea6e30ac41 [llvm-exegesis] ExegisX86Target::setRegToConstant() should depend on the subtarget features.
Summary: This fixes PR38008.

Reviewers: gchatelet, RKSimon

Subscribers: tschuett, craig.topper, llvm-commits

Differential Revision: https://reviews.llvm.org/D48820

llvm-svn: 336171
2018-07-03 06:17:05 +00:00
Chandler Carruth
9fa2159032 [ADT] Try to work around a crash in MSVC.
Putting `sizeof(T) <= 16` into the parameter of a `std::conditional`
causes every version of MSVC I've tried to crash:

  https://godbolt.org/g/eqVULL

Really frustrating, but an extra layer of indirection through an
instantiated type gives a working way to access this computed constant.

llvm-svn: 336170
2018-07-03 05:46:20 +00:00
Craig Topper
a8d96c712a [X86] Add avx512vl command line to break-false-dep.ll
llvm-svn: 336169
2018-07-03 04:43:49 +00:00
Chandler Carruth
3b0beec122 [ADT] Switch another place to llvm::is_trivially_move_constructible.
I missed this the first time around, sorry.

llvm-svn: 336166
2018-07-03 04:07:26 +00:00
Jakub Kuderski
bb148a0677 Reappl "[Dominators] Add the DomTreeUpdater class"
Summary:
This patch is the first in a series of patches related to the [[ http://lists.llvm.org/pipermail/llvm-dev/2018-June/123883.html | RFC - A new dominator tree updater for LLVM ]].

This patch introduces the DomTreeUpdater class, which provides a cleaner API to perform updates on available dominator trees (none, only DomTree, only PostDomTree, both) using different update strategies (eagerly or lazily) to simplify the updating process.

—Prior to the patch—

   - Directly calling update functions of DominatorTree updates the data structure eagerly while DeferredDominance does updates lazily.
   - DeferredDominance class cannot be used when a PostDominatorTree also needs to be updated.
   - Functions receiving DT/DDT need to branch a lot which is currently necessary.
   - Functions using both DomTree and PostDomTree need to call the update function separately on both trees.
   - People need to construct an additional DeferredDominance class to use functions only receiving DDT.

—After the patch—

Patch by Chijun Sima <simachijun@gmail.com>.

Reviewers: kuhar, brzycki, dmgreen, grosser, davide

Reviewed By: kuhar, brzycki

Author: NutshellySima

Subscribers: vsk, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D48383

llvm-svn: 336163
2018-07-03 02:06:23 +00:00
Erik Pilkington
45cd87da32 Revert r336159, r336157. Some bots failed on qualified std::max_align_t, and other on unqualified max_align_t.
I'll take another stab at this tomorrow. Any ideas for fixing this would be appreciated!

http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/23071/steps/build_Lld/logs/stdio
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/11185/steps/build-stage1-compiler/logs/stdio

llvm-svn: 336162
2018-07-03 01:30:53 +00:00
Chandler Carruth
a37bbe946c [Support] Fix llvm::unique_function when building with GCC 4.9 by
introducing llvm::trivially_{copy,move}_constructible type traits.

This uses a completely portable implementation of these traits provided
by Richard Smith. You can see it on compiler explorer in all its glory:

  https://godbolt.org/g/QEDZjW

I have transcribed it, clang-formatted it, added some comments, and made
the tests fit into a unittest file.

I have also switched llvm::unique_function over to use these new, much
more portable traits. =D

Hopefully this will fix the build bot breakage from my prior commit.

llvm-svn: 336161
2018-07-03 01:18:21 +00:00
Teresa Johnson
91ec4ddcd7 [ThinLTO] Fix printing of aliases for distributed backend indexes
Summary:
When we import an alias (which will import a copy of the aliasee), but
aren't going to import the aliasee directly, the distributed backend
index will not contain the aliasee summary. Handle this in the summary
assembly printer by printing "null" as the aliasee.

Reviewers: davidxl, dexonsmith

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, llvm-commits

Differential Revision: https://reviews.llvm.org/D48699

llvm-svn: 336160
2018-07-03 01:11:43 +00:00
Erik Pilkington
b64d68c851 Some buildbots were choking on std::max_align_t, try using the global alias.
llvm-svn: 336159
2018-07-03 00:48:27 +00:00
Erik Pilkington
96a2826f94 [demangler] Fix a MSVC alignment warning.
This should fix llvm.org/PR37944

llvm-svn: 336157
2018-07-03 00:23:18 +00:00
Chandler Carruth
8159ba335a [ADT] Add llvm::unique_function which is like std::function but
supporting move-only closures.

Most of the core optimizations for std::function are here plus
a potentially novel one that detects trivially movable and destroyable
functors and implements those with fewer indirections.

This is especially useful as we start trying to add concurrency
primitives as those often end up with move-only types (futures,
promises, etc) and wanting them to work through lambdas.

As further work, we could add better support for things like const-qualified
operator()s to support more algorithms, and r-value ref qualified operator()s
to model call-once. None of that is here though.

We can also provide our own llvm::function that has some of the optimizations
used in this class, but with copy semantics instead of move semantics.

This is motivated by increasing usage of things like executors and the task
queue where it is useful to embed move-only types like a std::promise within
a type erased function. That isn't possible without this version of a type
erased function.

Differential Revision: https://reviews.llvm.org/D48349

llvm-svn: 336156
2018-07-02 23:57:29 +00:00
Teresa Johnson
de152c8016 Remove absolute path in test
My test change in r336148 accidentally included an absolute path, clean
that up to fix bot failures.

llvm-svn: 336151
2018-07-02 23:02:07 +00:00
Lang Hames
8b63c11e19 [ORC] Verify modules when running LLLazyJIT in LLI, and deal with fallout.
The verifier identified several modules that were broken due to incorrect
linkage on declarations. To fix this, CompileOnDemandLayer2::extractFunction
has been updated to change decls to external linkage.

llvm-svn: 336150
2018-07-02 22:30:18 +00:00
Teresa Johnson
cacd7a240a [ThinLTO] Fix printing of module paths for distributed backend indexes
Summary:
In the individual index files emitted for distributed ThinLTO backends,
the module path ids are not contiguous. Assign slots to module paths in
order to handle this better and also to get contiguous numbering in the
summary assembly.

Reviewers: davidxl, dexonsmith

Subscribers: mehdi_amini, inglorion, eraman, llvm-commits, steven_wu

Differential Revision: https://reviews.llvm.org/D48698

llvm-svn: 336148
2018-07-02 22:09:23 +00:00
Heejin Ahn
e0c76f2551 [WebAssembly] Support for atomic stores
Summary: Add support for atomic store instructions.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48839

llvm-svn: 336145
2018-07-02 21:22:59 +00:00
Vadzim Dambrouski
2c8cd025cf [ARM] Fix PR37382: Don't optimize mul.with.overflow on thumbv6m.
Reviewers: efriedma, rogfer01, javed.absar

Reviewed By: efriedma, rogfer01

Subscribers: kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D48846

llvm-svn: 336144
2018-07-02 21:05:26 +00:00
Andrea Di Biagio
9758b05b3b [llvm-mca] Clear the content of map VariantDescriptors in InstrBuilder before we start analyzing a new CodeBlock. NFCI.
Different CodeBlocks don't overlap. The same MCInst cannot appear in more than
one code block because all blocks are instantiated before the simulation is run.

We should always clear the content of map VariantDescriptors before every
simulation, since VariantDescriptors cannot possibly store useful information
for the next blocks. It is also "safer" to clear its content because `MCInst*`
is used as the key type for map VariantDescriptors.

llvm-svn: 336142
2018-07-02 20:39:57 +00:00
Tim Shen
379ae77a60 [SCEV] Strengthen StrengthenNoWrapFlags (reapply r334428).
Summary:
Comment on Transforms/LoopVersioning/incorrect-phi.ll: With the change
SCEV is able to prove that the loop doesn't wrap-self (due to zext i16
to i64), disabling the entire loop versioning pass. Removed the zext and
just use i64.

Reviewers: sanjoy

Subscribers: jlebar, hiraditya, javed.absar, bixia, llvm-commits

Differential Revision: https://reviews.llvm.org/D48409

llvm-svn: 336140
2018-07-02 20:01:54 +00:00
Dan Gohman
8b8fb7355f [WebAssembly] Fix fast-isel optimization of branch conditions.
LLVM doesn't guarantee anything about the high bits of a register holding
an i1 value at the IR level, so don't translate LLVM IR i1 values directly
into WebAssembly conditional branch operands. WebAssembly's conditional
branches do demand all 32 bits be valid.

Fixes PR38019.

llvm-svn: 336138
2018-07-02 19:45:57 +00:00
Krzysztof Parzyszek
2a0fcfa9bf [X86] Add phony registers for high halves of regs with low halves
Add registers still missing after r328016 (D43353):
- for bits 15-8  of SI, DI, BP, SP (*H), and R8-R15 (*BH),
- for bits 31-16 of R8-R15 (*WH).

Thanks to Craig Topper for pointing it out.

llvm-svn: 336134
2018-07-02 19:05:09 +00:00
Alina Sbirlea
00ebfcda42 Replace "Replacable" with "Replaceable". [NFC]
llvm-svn: 336133
2018-07-02 18:53:40 +00:00
Fangrui Song
d9ba18363e Replace unused output filenames with /dev/null in tests
Similar to rLLD336129

llvm-svn: 336131
2018-07-02 18:16:44 +00:00
Farhana Aleen
d3e3e16e60 [SLP] Recognize min/max pattern using instructions producing same values.
Summary: It is common to have the following min/max pattern during the intermediate stages of SLP since we only optimize at the end. This patch tries to catch such patterns and allow more vectorization.

         %1 = extractelement <2 x i32> %a, i32 0
         %2 = extractelement <2 x i32> %a, i32 1
         %cond = icmp sgt i32 %1, %2
         %3 = extractelement <2 x i32> %a, i32 0
         %4 = extractelement <2 x i32> %a, i32 1
         %select = select i1 %cond, i32 %3, i32 %4

Author: FarhanaAleen

Reviewed By: ABataev, RKSimon, spatel

Differential Revision: https://reviews.llvm.org/D47608

llvm-svn: 336130
2018-07-02 17:55:31 +00:00
Sanjay Patel
a9bbbc0114 [InstCombine] reverse canonicalization of add --> or to allow more shuffle folding
This extends D48485 to allow another pair of binops (add/or) to be combined either
with or without a leading shuffle:
or X, C --> add X, C (when X and C have no common bits set)

Here, we need value tracking to determine that the 'or' can be reversed into an 'add',
and we've added general infrastructure to allow extending to other opcodes or moving 
to where other passes could use that functionality.

Differential Revision: https://reviews.llvm.org/D48662

llvm-svn: 336128
2018-07-02 17:42:29 +00:00
Francis Visoiu Mistrih
bb4cf24f14 [MC] Error on a .zerofill directive in a non-virtual section
On darwin, all virtual sections have zerofill type, and having a
.zerofill directive in a non-virtual section is not allowed. Instead of
asserting, show a nicer error.

In order to use the equivalent of .zerofill in a non-virtual section,
the usage of .zero of .space is required.

This patch replaces the assert with an error.

Differential Revision: https://reviews.llvm.org/D48517

llvm-svn: 336127
2018-07-02 17:29:43 +00:00
Dave Lee
1320ae98e2 nm: Add -no-weak flag for hiding weak symbols
Summary:
This adds a new -no-weak flag to nm to hide weak symbols in its output.
This also adds a -W alias for this which is analogous to -U.

Patch by Keith Smiley

Reviewers: kastiglione, enderby, compnerd

Reviewed By: kastiglione

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D48751

llvm-svn: 336126
2018-07-02 17:24:37 +00:00
Simon Pilgrim
e88119cb37 [SLPVectorizer][X86] Begin adding alternate tests for call operators
Alternate opcode handling only supports binary operators, these tests demonstrate a missed opportunity to vectorize ceil/floor calls

llvm-svn: 336125
2018-07-02 17:23:45 +00:00
Vedant Kumar
92c2c28ada Tighten up a test for -check-debugify, NFC
Use an -implicit-check-not to make sure an error which should not occur
in fact does not occur before the first CHECK line.

Suggested by Paul Robinson in post-commit feedback for r335897.

llvm-svn: 336123
2018-07-02 17:08:36 +00:00
Simon Pilgrim
378c4454d3 [CostModel][X86] Add cost tests for fp rounding intrinsics
Add cost tests for fp ceil, floor, nearbyint, rint and trunc.

llvm-svn: 336122
2018-07-02 17:07:01 +00:00
Craig Topper
b005c33640 [X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
Similarily, don't fold fp128 loads into SSE instructions if the load isn't aligned. Unless we're targeting an AMD CPU that doesn't check alignment on arithmetic instructions.

Should fix PR38001

llvm-svn: 336121
2018-07-02 17:01:54 +00:00
Amara Emerson
f59955d9a1 [AArch64][GlobalISel] Any-extend vararg parameters to stack slot size on Darwin.
We currently don't any-extend vararg parameters before storing them to the stack
locations on Darwin. However, SelectionDAG however does this, and so user code
is in the wild which inadvertently relies on this extension. This can manifest
in cases where the value stored is (int)0, but the actual parameter is interpreted
by va_arg as a pointer, and so not extending to 64 bits causes the callee to
load additional undefined bits.

llvm-svn: 336120
2018-07-02 16:39:09 +00:00
Jakub Kuderski
402ffa5a3d Revert "[Dominators] Add the DomTreeUpdater class"
Temporary revert because of a failing test on some buildbots.

This reverts commit r336114.

llvm-svn: 336117
2018-07-02 16:10:49 +00:00
Sam Clegg
f08af75bcb [WebAssembly] Convert remaining tests from elf to wasm output format
Differential Revision: https://reviews.llvm.org/D48748

llvm-svn: 336116
2018-07-02 16:03:49 +00:00
Sjoerd Meijer
438a61483e Follow up of r335953 - [ARM][AArch64] Armv8.4-A Enablement
Imply dotprod for armv8.4-a, because it is mandatory from v8.4.

llvm-svn: 336115
2018-07-02 15:38:37 +00:00
Jakub Kuderski
1f0e0f2eff [Dominators] Add the DomTreeUpdater class
Summary:
This patch is the first in a series of patches related to the [[ http://lists.llvm.org/pipermail/llvm-dev/2018-June/123883.html | RFC - A new dominator tree updater for LLVM ]].

This patch introduces the DomTreeUpdater class, which provides a cleaner API to perform updates on available dominator trees (none, only DomTree, only PostDomTree, both) using different update strategies (eagerly or lazily) to simplify the updating process.

—Prior to the patch—

   - Directly calling update functions of DominatorTree updates the data structure eagerly while DeferredDominance does updates lazily.
   - DeferredDominance class cannot be used when a PostDominatorTree also needs to be updated.
   - Functions receiving DT/DDT need to branch a lot which is currently necessary.
   - Functions using both DomTree and PostDomTree need to call the update function separately on both trees.
   - People need to construct an additional DeferredDominance class to use functions only receiving DDT.

—After the patch—

Patch by Chijun Sima <simachijun@gmail.com>.

Reviewers: kuhar, brzycki, dmgreen, grosser, davide

Reviewed By: kuhar, brzycki

Subscribers: vsk, mgorny, llvm-commits

Author: NutshellySima

Differential Revision: https://reviews.llvm.org/D48383

llvm-svn: 336114
2018-07-02 15:37:41 +00:00
Simon Pilgrim
985219526e [X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values
We were only doing this for basic blends, despite shuffle lowering now being good enough to handle more complex blends. This means that the two v8i16 splat shifts are performed in parallel instead of serially as the general shift case.

llvm-svn: 336113
2018-07-02 15:14:07 +00:00
Simon Pilgrim
160b6d087b [X86][SSE] Add v8i16 shift test for 2 shift values that doesn't match basic blend
We have special case support for 2 shift values for basic blends, but irregular shift patterns end up using the generic lowering, despite shuffle lowering being good enough to handle more complex blends.

llvm-svn: 336112
2018-07-02 14:53:41 +00:00
Sanjay Patel
6a6de709a7 [ValueTracking] allow undef elements when matching vector abs
llvm-svn: 336111
2018-07-02 14:43:40 +00:00
Yaron Keren
b51822261e Disable failing test on x86_64-pc-windows-gnu, see PR38006.
llvm-svn: 336110
2018-07-02 14:39:32 +00:00
David Stenberg
44e1f62062 [CodeGen] Make block removal order deterministic in CodeGenPrepare
Summary:
Replace use of a SmallPtrSet with a SmallSetVector to make the worklist
iteration order deterministic. This is done as the order the blocks are
removed may affect whether or not PHI nodes in successor blocks are
removed.

For example, consider the following case where %bb1 and %bb2 are
removed:

    bb1:
      br i1 undef, label %bb3, label %bb4
    bb2:
      br i1 undef, label %bb4, label %bb3
    bb3:
      pv1 = phi type [ undef, %bb1 ], [ undef, %bb2], [ v0, %other ]
      br label %bb4
    bb4:
      pv2 = phi type [ undef, %bb1 ], [ undef, %bb2 ],
                     [ pv1, %bb3 ], [ v0, %other ]

If %bb2 is removed before %bb1, the incoming values from %bb1 and %bb2
to pv1 will be removed before %bb1 is removed as a predecessor to %bb4.
The pv1 node will thus be optimized out (to v0) at the time %bb1 is
removed as a predecessor to %bb4, leaving the blocks as following when
the incoming value from %bb1 has been removed:

    bb3: ; pv1 optimized out, incoming value to pv2 is v0
      br label %bb4
    bb4:
      pv2 = phi type [ v0, %bb3 ], [ v0, %other ]

The pv2 PHI node will be optimized away by removePredecessor() as all
incoming values are identical.

In case %bb2 is removed after %bb1, pv1 will not be optimized out at the
time %bb2 is removed as a predecessor to %bb4, leaving the blocks as
following when the incoming value from %bb2 to pv2 has been removed:

    bb3:
      pv1 = phi type [ undef, %bb2 ], [ v0, %other ]
      br label %bb4
    bb4:
      pv2 = phi type [ pv1, %bb3 ], [ v0, %other ]

The pv2 PHI node will thus not be removed in this case, ultimately
leading to the following output

    bb3: ; pv1 optimized out, incoming value to pv2 is v0
      br label %bb4
    bb4:
      pv2 = phi type [ v0, %bb3 ], [ v0, %other ]

I have not looked into changing DeleteDeadBlock() so that the redundant
PHI nodes are removed.

I have not added a test case, as I was not able to create a particularly
small and (not messy) reproducer. This is likely due to SmallPtrSet
behaving deterministically when in small mode.

Reviewers: void, dexonsmith, spatel, skatkov, fhahn, bkramer, nhaehnle

Reviewed By: fhahn

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D48369

llvm-svn: 336109
2018-07-02 14:23:48 +00:00
Alex Bradbury
f2d0693efb [X86] Fix test/MC/AsmParser/exprs-invalid.s after rL336104
This was my mistake for only running test/MC/X86 and test/CodeGen/X86. 
Arguably .word should be removed from this test, as it is not supported 
universally.

llvm-svn: 336107
2018-07-02 14:13:27 +00:00
John Brawn
42883315e9 [llvm-exegesis] Change how the native architecture is determined
Currently the llvm-exegesis native architecture is determined by comparing the
llvm native architecture with X86, so to add a new target would mean adding a
new check. Change this to building up a list of the targets llvm-exegesis
supports then using that, as this means that when adding a new target you just
add the target to the list of supported targets.

Differential Revision: https://reviews.llvm.org/D48778

llvm-svn: 336105
2018-07-02 13:53:46 +00:00
Alex Bradbury
694c4ed3d7 [X86] Use addAliasForDirective to support the .word directive (reland)
The X86 asm parser currently has custom parsing logic for .word. Rather than
use this custom logic, we can just use addAliasForDirective to enable the
reuse of AsmParser::parseDirectiveValue.

See also similar changes to Sparc (rL333078), AArch64 (rL333077), and Hexagon
(rL332607) backends.

Differential Revision: https://reviews.llvm.org/D47004

This is a fixed reland of rL336100. This should have been caught in 
pre-commit testing so apologies for the noise.

llvm-svn: 336104
2018-07-02 13:49:52 +00:00
Alex Bradbury
c4121502cd Revert r336100
This was a bad change. .word == 2byte on x86.

llvm-svn: 336103
2018-07-02 13:43:45 +00:00
Simon Pilgrim
bd73b34751 [SLPVectorizer] Remove nullptr early-outs from Instruction::ShuffleVector getEntryCost
This code is only used by alternate opcodes so the InstructionsState has already confirmed that every Value is an Instruction, plus we use cast<Instruction> which will assert on failure.

llvm-svn: 336102
2018-07-02 13:41:29 +00:00
Sanjay Patel
c7319c8a0f [InstCombine] adjust shuffle tests with IR flags; NFC
Due to current limitations in constant analysis, we need flags
on add or mul to show propagation for the potential transform
suggested in these tests (no other binops currently report 
identity constants).

llvm-svn: 336101
2018-07-02 13:40:54 +00:00
Alex Bradbury
19171674be [X86] Use addAliasForDirective to support the .word directive
The X86 asm parser currently has custom parsing logic for .word. Rather than 
use this custom logic, we can just use addAliasForDirective to enable the 
reuse of AsmParser::parseDirectiveValue.

See also similar changes to Sparc (rL333078), AArch64 (rL333077), and Hexagon 
(rL332607) backends.

Differential Revision: https://reviews.llvm.org/D47004

llvm-svn: 336100
2018-07-02 13:37:15 +00:00
John Brawn
86bf3b3bb5 [llvm-exegesis] Delegate the decision of cycle counter name to the target
Currently the cycle counter is taken from the subtarget schedule model, which
isn't any use if the subtarget doesn't have one. Delegate the decision to the
target benchmark runner, as it may know better what to do in that case, with
the default being the current behaviour.

Differential Revision: https://reviews.llvm.org/D48779

llvm-svn: 336099
2018-07-02 13:14:49 +00:00
Florian Hahn
0c6c82408b Recommit r328307: [IPSCCP] Use constant range information for comparisons of parameters.
This version contains a fix to add values for which the state in ParamState change
to the worklist if the state in ValueState did not change. To avoid adding the
same value multiple times, mergeInValue returns true, if it added the value to
the worklist. The value is added to the worklist depending on its state in
ValueState.

Original message:
For comparisons with parameters, we can use the ParamState lattice
elements which also provide constant range information. This improves
the code for PR33253 further and gets us closer to use
ValueLatticeElement for all values.

Also, as we are using the range information in the solver directly, we
do not need tryToReplaceWithConstantRange afterwards anymore.

Reviewers: dberlin, mssimpso, davide, efriedma

Reviewed By: mssimpso

Differential Revision: https://reviews.llvm.org/D43762

llvm-svn: 336098
2018-07-02 12:44:04 +00:00
Sanjay Patel
8af577661c [InstCombine] add tests for shuffle-binop; NFC
This is another pattern mentioned in PR37806.

llvm-svn: 336096
2018-07-02 12:30:46 +00:00