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Commit Graph

24 Commits

Author SHA1 Message Date
Akira Hatanaka
74d45b54f1 Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.
llvm-svn: 129612
2011-04-15 21:51:11 +00:00
Akira Hatanaka
6f900185ed Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
llvm-svn: 129606
2011-04-15 21:00:26 +00:00
Bruno Cardoso Lopes
5400401372 Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira
llvm-svn: 127003
2011-03-04 17:51:39 +00:00
Chris Lattner
4cebf6ca28 reintroduce support for Mips "small" section handling. This is
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.

llvm-svn: 78900
2009-08-13 06:28:06 +00:00
Chris Lattner
fa4858791d Restore some "small section" support code, reverting my patch from r76936.
llvm-svn: 78894
2009-08-13 05:41:27 +00:00
Eli Friedman
c277c8fe13 Remove -disable-mips-abicall and -enable-mips-absolute-call command-line
options, which don't appear to be useful.  -enable-mips-absolute-call is
completely unused (and unless I'm mistaken, is supposed to have the 
same effect that -relocation-model=dynamic-no-pic should have), 
and -disable-mips-abicall appears to be effectively a 
synonym for -relocation-model=static. Adjust the few users of hasABICall
to checks which seem more appropriate.  Update MipsSubtarget, 
MipsTargetMachine, and MipselTargetMachine to synchronize with recent 
changes.

llvm-svn: 77938
2009-08-03 02:22:28 +00:00
Daniel Dunbar
0b82c938fe Normalize Subtarget constructors to take a target triple string instead of
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
2009-08-02 22:11:08 +00:00
Chris Lattner
f4c7765d30 remove more remnants of small section support.
llvm-svn: 76936
2009-07-24 03:14:35 +00:00
Bruno Cardoso Lopes
ddcbc31a99 Added support for fround, fextend and FP_TO_SINT
llvm-svn: 72483
2009-05-27 17:23:44 +00:00
Bruno Cardoso Lopes
f6ad396dfa Fixed Bug 2751
http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided 
in the command line.
The correct behavior is to disable abicall when static is
specified.

llvm-svn: 56228
2008-09-15 21:06:55 +00:00
Anton Korobeynikov
8e795209d3 Make option variables static, so they won't cause nameclash
llvm-svn: 55203
2008-08-22 21:27:49 +00:00
Bruno Cardoso Lopes
97e12b0e44 Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This
avoid the ugly instruction by instruction checking in printOperand.
Added a swap instruction present in the allegrex core.
Added two conditional instructions present in the allegrex core : MOVZ and MOVN.
They both allow a more efficient SELECT operation for integers.
Also added SELECT patterns to optimize MOVZ and MOVN usage.
The brcond and setcc patterns were cleaned: redundant and suboptimal patterns
were
removed. The suboptimals were replaced by more efficient ones.
Fixed some instructions that were using immZExt16 instead of immSExt16.

llvm-svn: 54724
2008-08-13 07:13:40 +00:00
Bruno Cardoso Lopes
f8906a40ab Support added for ctlz intrinsic, test case added.
llvm-svn: 54516
2008-08-08 06:16:31 +00:00
Bruno Cardoso Lopes
883eb4e6fa Match raw "psp" triple target, as done by the homebrew toolchain.
llvm-svn: 54514
2008-08-08 04:49:42 +00:00
Bruno Cardoso Lopes
f2a6400d3e Added new features to represent specific instructions groups
llvm-svn: 54213
2008-07-30 17:01:06 +00:00
Bruno Cardoso Lopes
e6a9345187 Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.

llvm-svn: 53869
2008-07-21 18:52:34 +00:00
Bruno Cardoso Lopes
f5a55301e0 Added Subtarget support into RegisterInfo
Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and 
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the 
default for o32 ABI. Now, both should help into a more accurate 
relocation types implementation. 
Added IsLinux is needed to choose between asm directives.
Instruction name strings cleanup.
AsmPrinter improved.

llvm-svn: 53551
2008-07-14 14:42:54 +00:00
Bruno Cardoso Lopes
5ed6e9e045 Fixed features usage.
llvm-svn: 53277
2008-07-09 05:32:22 +00:00
Bruno Cardoso Lopes
d738f1e6c7 Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
  yet, but they allow the future inclusion of features easier. Among new features,
  we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
  integer
  and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
  aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
  sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
  FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
  FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
  return copy, no homing location within EABI, non 32-bit stack objects
  arguments, and asm constraint for float.

llvm-svn: 53146
2008-07-05 19:05:21 +00:00
Bruno Cardoso Lopes
5a4d1d0fd3 Some Mips minor fixes
Added support for mips little endian arch => mipsel

llvm-svn: 51923
2008-06-04 01:45:25 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bruno Cardoso Lopes
77e5c419ec Better processor definition
llvm-svn: 43749
2007-11-06 03:15:20 +00:00
Bruno Cardoso Lopes
15cbbbb56f support for Schedule included on Mips.td
llvm-svn: 41159
2007-08-18 02:18:07 +00:00
Bruno Cardoso Lopes
709699b8d3 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
2007-06-06 07:42:06 +00:00