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Commit Graph

73259 Commits

Author SHA1 Message Date
Andrew Trick
eb9ed2c82e indvars --disable-iv-rewrite: sever ties with IVUsers.
llvm-svn: 133988
2011-06-28 03:01:46 +00:00
Andrew Trick
9f6946c3a1 indvars --disable-iv-rewrite: Defer evaluating s/zext until SCEV
evaluates all other IV exprs.

llvm-svn: 133982
2011-06-28 02:49:20 +00:00
Chandler Carruth
46b0f79168 Fix CMake build by removing this now dead file.
llvm-svn: 133981
2011-06-28 02:03:12 +00:00
Chandler Carruth
910d35b98b FileCheck-ize a test that had the strangest TCL quote I've seen yet: an
opening single quote with no closing single quote, and with {} quotes
"inside" of it. This broke some of our tools that scrape test cases.

Also, while here, make the test actually assert what the comment says it
asserts. This was essentially authored by Nick Lewycky, and merely typed
in by myself. Let me know if this is still missing the mark, but the
previous test only succeeded due to the improper quoting preventing
*anything* from matching the grep -- it had a '4(%...)' sequence in the
output!

llvm-svn: 133980
2011-06-28 02:03:10 +00:00
Evan Cheng
701aaa4bb0 Alternative name enum should go into the enum portion.
llvm-svn: 133979
2011-06-28 01:36:01 +00:00
Jakob Stoklund Olesen
bf1b7bf0c0 Fix a bad iterator dereference that Evan uncovered.
llvm-svn: 133978
2011-06-28 01:18:58 +00:00
Jim Grosbach
33470a73f0 ARM Thumb2 asm syntax optional destination operand for binary operators.
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.

For example, the following two instructions are equivalent:
and r1, #ff
and r1, r1, #ff

rdar://9672867

llvm-svn: 133973
2011-06-28 00:19:13 +00:00
Evan Cheng
f79231cbd4 Remove RegClass2VRegMap from MachineRegisterInfo.
llvm-svn: 133967
2011-06-27 23:54:40 +00:00
Jim Grosbach
190b9d7ec0 ARM Assembly support for Thumb mov-immediate.
Correctly parse the forms of the Thumb mov-immediate instruction:
  1. 8-bit immediate 0-255.
  2. 12-bit shifted-immediate.

The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic,
but is not yet supported. More parser logic necessary there due to fixups.

llvm-svn: 133966
2011-06-27 23:54:06 +00:00
Evan Cheng
b2fc68c7bc Remove RCBarriers from TargetInstrDesc.
llvm-svn: 133964
2011-06-27 23:47:21 +00:00
Evan Cheng
7df851a4ff Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges.
llvm-svn: 133962
2011-06-27 23:40:45 +00:00
Andrew Trick
a2083f5887 indvars -disable-iv-rewrite: run RLEV after SimplifyIVUsers for
a bit more control over the order SCEVs are evaluated.

llvm-svn: 133959
2011-06-27 23:17:44 +00:00
Chad Rosier
c4a49e5afd Revert r133516 "Remove some unnecessary uses of c_str()."
This was causing compile-time failures for some of the Objc and Obj-C++
benchmarks.  The specific errors were of the form: "ld: duplicate symbol …"
rdar://9660124

llvm-svn: 133955
2011-06-27 22:54:29 +00:00
Devang Patel
8fbd4b55ea During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
llvm-svn: 133953
2011-06-27 22:32:04 +00:00
Eric Christopher
10e7d517e2 Fix this test to actually check something and be able to be compiled.
llvm-svn: 133952
2011-06-27 22:30:14 +00:00
Jakub Staszak
995dfdf6ab Calculate GetBestDestForJumpOnUndef correctly.
llvm-svn: 133946
2011-06-27 21:51:12 +00:00
Jim Grosbach
e539423d3d ARM Asm parsing of Thumb2 move immediate.
Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet)
encode the instruction properly, but this gets the parsing part.

llvm-svn: 133945
2011-06-27 21:38:03 +00:00
Evan Cheng
2c06c8b3c2 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
llvm-svn: 133944
2011-06-27 21:26:13 +00:00
Owen Anderson
c1dcf312d1 Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.

llvm-svn: 133940
2011-06-27 21:06:21 +00:00
Jim Grosbach
1ae2ca427b Add exception necessitated by 133938.
llvm-svn: 133939
2011-06-27 20:59:10 +00:00
Jim Grosbach
2049205bcb ARM assembly carry set/clear condition code aliases for 'hi/lo'
llvm-svn: 133938
2011-06-27 20:40:29 +00:00
Jim Grosbach
7c950cf36c ARM assembler support for ldmfd/stmfd mnemonics.
llvm-svn: 133936
2011-06-27 20:32:18 +00:00
Eric Christopher
bb65f96b18 Allow lr in the register options here.
llvm-svn: 133935
2011-06-27 20:31:01 +00:00
Jim Grosbach
7157b0228f ARM assembler support for vpush/vpop.
Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple
writeback instructions w/ SP as the base pointer.

rdar://9683231

llvm-svn: 133932
2011-06-27 20:00:07 +00:00
Evan Cheng
e2b9caad06 Rename unnecessary forward declaration.
llvm-svn: 133928
2011-06-27 19:41:39 +00:00
Evan Cheng
84f52143c3 More refactoring. MC doesn't need know about subreg indices.
llvm-svn: 133927
2011-06-27 19:24:13 +00:00
Jim Grosbach
210c7054ac ARM Assembly syntax support for arithmetic implied dest operand.
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.

For example, the following two instructions are equivalent:
  sub r2, r2, #6
  sub r2, #6

rdar://9682597

llvm-svn: 133925
2011-06-27 19:09:15 +00:00
Owen Anderson
4acf751b6d The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.
llvm-svn: 133923
2011-06-27 18:34:12 +00:00
Evan Cheng
6fea701360 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.

llvm-svn: 133922
2011-06-27 18:32:37 +00:00
Andrew Trick
d0cdcee532 pre-RA-sched: Cleanup register pressure tracking.
Removed the check that peeks past EXTRA_SUBREG, which I don't think
makes sense any more. Intead treat it as a normal register def. No
significant affect on x86 or ARM benchmarks.

llvm-svn: 133917
2011-06-27 18:01:20 +00:00
Jakob Stoklund Olesen
58c34c0e80 Move all inline-asm-fpstack tests to a single file.
Also fix some of the tests that were actually testing wrong behavior -
An input operand in {st} is only popped by the inline asm when {st} is
also in the clobber list.

The original bug reports all had ~{st} clobbers as they should.

llvm-svn: 133916
2011-06-27 17:27:37 +00:00
Jakob Stoklund Olesen
47848d1fc2 Track live-out physical registers in MachineDCE.
Patch by Sanjoy Das!

llvm-svn: 133910
2011-06-27 15:00:36 +00:00
Nick Lewycky
0a59da4c5f Teach one piece of scalarrepl to handle lifetime markers. When transforming an
alloca that only holds a copy of a global and we're going to replace the users
of the alloca with that global, just nuke the lifetime intrinsics. Part of
PR10121.

llvm-svn: 133905
2011-06-27 05:40:02 +00:00
Nick Lewycky
4a0f5218f2 Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by other
passes as well.

llvm-svn: 133904
2011-06-27 04:20:45 +00:00
Jakob Stoklund Olesen
80238b93fb Grow the X86FloatingPoint register map to hold 16 registers.
This allows for more live scratch registers which is needed to handle
live ST registers before return and inline asm instructions.

llvm-svn: 133903
2011-06-27 04:08:36 +00:00
Jakob Stoklund Olesen
557793fb60 Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

llvm-svn: 133902
2011-06-27 04:08:33 +00:00
Jakob Stoklund Olesen
5a11bd7c81 Decode and pretty print inline asm operand descriptors.
The INLINEASM MachineInstrs have an immediate operand describing each
original inline asm operand. Decode the bits in MachineInstr::print() so
it is easier to read:

  INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def>

llvm-svn: 133901
2011-06-27 04:08:29 +00:00
Rafael Espindola
571440b926 Remove unused methods.
llvm-svn: 133900
2011-06-26 22:44:34 +00:00
Rafael Espindola
45a2fa5664 There is only one register coalescer. Merge it into the base class and
remove the analysis group.

llvm-svn: 133899
2011-06-26 22:34:10 +00:00
Rafael Espindola
50c3048b1f Merge SimpleRegisterCoalescing.cpp into RegisterCoalescer.cpp.
llvm-svn: 133897
2011-06-26 22:06:36 +00:00
Rafael Espindola
86f345ec4b merge SimpleRegisterCoalescing.h into RegisterCoalescer.h.
llvm-svn: 133896
2011-06-26 21:54:28 +00:00
Rafael Espindola
7ad658a832 Move RegisterCoalescer.h to lib/CodeGen.
llvm-svn: 133895
2011-06-26 21:41:06 +00:00
Rafael Espindola
9fc87524af Remove unnecessary wrapper.
llvm-svn: 133886
2011-06-26 19:47:36 +00:00
Dan Bailey
8de16fa817 PTX: corrected tests that were failing
llvm-svn: 133875
2011-06-25 19:41:17 +00:00
Chad Rosier
9a11e3e082 Replace dyn_cast<> with cast<> since the cast is already guarded by the necessary check.
llvm-svn: 133874
2011-06-25 18:51:28 +00:00
Dan Bailey
5b68fc5126 PTX: Reverting implementation of i8.
The .b8 operations in PTX are far more limiting than I first thought. The mov operation isn't even supported, so there's no way of converting a .pred value into a .b8 without going via .b16, which is
not sensible. An improved implementation needs to use the fact that loads and stores automatically extend and truncate to implement support for EXTLOAD and TRUNCSTORE in order to correctly support
boolean values.

llvm-svn: 133873
2011-06-25 18:16:28 +00:00
Michael J. Spencer
83e956656a Object: Add proper error handling.
llvm-svn: 133872
2011-06-25 17:55:23 +00:00
Michael J. Spencer
0e64ab8463 Modify llvm-nm to use new Binary creation method.
llvm-svn: 133871
2011-06-25 17:54:59 +00:00
Michael J. Spencer
d5934fefee Make Binary the parent of ObjectFile and update children to new interface.
llvm-svn: 133870
2011-06-25 17:54:50 +00:00
Michael J. Spencer
8cb6d93f56 Add Binary class. This is a cleaner parent than ObjectFile.
llvm-svn: 133869
2011-06-25 17:54:29 +00:00