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Commit Graph

129926 Commits

Author SHA1 Message Date
Tom Stellard
ec17b58f39 AMDGPU/SI: Insert wait states required after v_readfirstlane on SI
Summary:
We will be able to handle this case much better once the hazard recognizer
is finished, but this conservative implementation  fixes a hang with the piglit
test:

spec/arb_arrays_of_arrays/execution/sampler/fs-nested-struct-arrays-nonconst-nested-arra

Reviewers: arsenm, nhaehnle

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18988

llvm-svn: 266105
2016-04-12 18:40:43 +00:00
Matt Arsenault
0740a1bead AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32
This helps clean up some of the mess when expanding unaligned 64-bit
loads when changed to be promote to v2i32, and fixes situations
where or x, 0 was emitted after splitting 64-bit ors during moveToVALU.

I think this could be a generic combine but I'm not sure.

llvm-svn: 266104
2016-04-12 18:24:38 +00:00
Davide Italiano
eb6088708e [IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU.
Add a check to catch violations. ~60 tests were broken and prevented
this change to be committed. Adrian and I (thanks Adrian!) went
through them in the last week or so updating. The check can be
done more efficiently but I'd still like to get this in ASAP to
avoid more broken tests to be checked in (if any).

PR:  27101
llvm-svn: 266102
2016-04-12 18:22:33 +00:00
Matt Arsenault
795072118d APInt: Add overload of isMask
This mimics the version in MathExtras.h which isn't testing for a
specific mask size.

llvm-svn: 266101
2016-04-12 18:17:23 +00:00
Ahmed Bougacha
9e606d4f83 [CodeGen] Remove constant-folding dead code. NFC.
This code was specific to vector operations with scalar operands:
all the opcodes in FoldValue (via FoldConstantArithmetic) can't
match those criteria.

Replace it with an assert if that ever changes: at that point,
we might need to add back a splat BUILD_VECTOR.

llvm-svn: 266100
2016-04-12 18:15:39 +00:00
JF Bastien
cf74ca3a3d Check alloca's special state
Following up to a similar fix in MergeFunctions: r266022. This patch keeps both in sync, it would be nice to not have to do this. It doesn't look like there's an easy way to test this code directly at the moment: AFAICT all currect uses of isSameOperationAs are looking at instructions deep inside a function. IndVarSimplify/pr24952.ll and InstMerge/st_sink_* look at alloca inadvertently but are brittle tests.

llvm-svn: 266099
2016-04-12 18:06:55 +00:00
Philip Reames
53d0eef093 Introduce an GCRelocateInst class [NFC]
Previously, we were using isGCRelocate predicates.  Using a subclass of IntrinsicInst is far more idiomatic.  The refactoring also enables a couple of minor simplifications and code sharing.

llvm-svn: 266098
2016-04-12 18:05:10 +00:00
Sanjay Patel
1177075d7d fix indentation; NFC
llvm-svn: 266097
2016-04-12 18:01:48 +00:00
Nicolai Haehnle
be6e455946 AMDGPU/SI: Fix a mis-compilation of multi-level breaks
Summary:
Under certain circumstances, multi-level breaks (or what is understood by
the control flow passes as such) could be miscompiled in a way that causes
infinite loops, by emitting incorrect control flow intrinsics.

This fixes a hang in
dEQP-GLES3.functional.shaders.loops.while_dynamic_iterations.conditional_continue_vertex

Reviewers: arsenm, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18967

llvm-svn: 266088
2016-04-12 16:10:38 +00:00
Artur Pilipenko
d9a8d9a1af Support arbitrary addrspace pointers in masked load/store intrinsics
This is a resubmittion of 263158 change.

This patch fixes the problem which occurs when loop-vectorize tries to use @llvm.masked.load/store intrinsic for a non-default addrspace pointer. It fails with "Calling a function with a bad signature!" assertion in CallInst constructor because it tries to pass a non-default addrspace pointer to the pointer argument which has default addrspace.

The fix is to add pointer type as another overloaded type to @llvm.masked.load/store intrinsics.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D17270

llvm-svn: 266086
2016-04-12 15:58:04 +00:00
Davide Italiano
e11049fef8 [Bitcode] Fix + regenerate old test so that it includes a DICompileUnit.
llvm-svn: 266085
2016-04-12 15:51:23 +00:00
Geoff Berry
6cb5fc80e8 [ScheduleDAGInstrs] Handle instructions with multiple MMOs
Summary:
In getUnderlyingObjectsForInstr(): Don't give up on instructions with
multiple MMOs, instead look through all the MMOs and if they all meet
the conservative criteria previously used for single MMO instructions,
then return all of the underlying objects derived from the MMOs.

The change to ScheduleDAGInstrs::buildSchedGraph() is needed to avoid
the case where multiple underlying objects are present and are related
in such a way that successive iterations of the loop end up adding a
dependency from an instruction to itself.

Reviewers: atrick, hfinkel

Subscribers: MatzeB, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18093

llvm-svn: 266084
2016-04-12 15:50:19 +00:00
Than McIntosh
b927171cd9 Test commit, NFC.
Adds a blank line.

llvm-svn: 266082
2016-04-12 15:35:05 +00:00
Petar Jovanovic
29c4e0652e [mips] add assembler support for .set arch=octeon
This patch enables assembler support for .set arch=octeon.
It will fix issues with inline assembler when this directive is used.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D18548

llvm-svn: 266081
2016-04-12 15:28:16 +00:00
Aaron Ballman
97d20cba92 Moving llvm-test-depends and test-depends into the Tests folder; NFC, this simply cleans up the generated solution so that these targets don't live in the root folder of the IDE.
llvm-svn: 266078
2016-04-12 15:09:14 +00:00
Matt Arsenault
73354d0f62 LangRef: Update example syntax for atomic load instruction
llvm-svn: 266077
2016-04-12 14:41:03 +00:00
Matt Arsenault
007a459aa3 AMDGPU: Implement i64 global atomics
llvm-svn: 266075
2016-04-12 14:05:11 +00:00
Matt Arsenault
f100af354c AMDGPU: Add atomic_inc + atomic_dec intrinsics
These are different than atomicrmw add 1 because they have
an additional input value to clamp the result.

llvm-svn: 266074
2016-04-12 14:05:04 +00:00
Matt Arsenault
e47b7e7758 AMDGPU: Remove trailing whitespace
llvm-svn: 266073
2016-04-12 14:04:54 +00:00
Matt Arsenault
7193bf43c5 AMDGPU: Add volatile to test loads and stores
When the memory vectorizer is enabled, these tests break.
These tests don't really care about the memory instructions,
and it's easier to write check lines with the unmerged loads.

llvm-svn: 266071
2016-04-12 13:38:18 +00:00
Simon Pilgrim
c6acd56fdb [X86] Regenerated avx512 calling convention test checks
llvm-svn: 266070
2016-04-12 13:31:01 +00:00
Rafael Espindola
b04bc032f0 This reverts commit r266002, r266011 and r266016.
They broke the msan bot.

Original message:

Add __atomic_* lowering to AtomicExpandPass.

AtomicExpandPass can now lower atomic load, atomic store, atomicrmw,and
cmpxchg instructions to __atomic_* library calls, when the target
doesn't support atomics of a given size.

This is the first step towards moving all atomic lowering from clang
into llvm. When all is done, the behavior of __sync_* builtins,
__atomic_* builtins, and C11 atomics will be unified.

Previously LLVM would pass everything through to the ISelLowering
code. There, unsupported atomic instructions would turn into __sync_*
library calls. Because of that behavior, Clang currently avoids emitting
llvm IR atomic instructions when this would happen, and emits __atomic_*
library functions itself, in the frontend.

This change makes LLVM able to emit __atomic_* libcalls, and thus will
eventually allow clang to depend on LLVM to do the right thing.

It is advantageous to do the new lowering to atomic libcalls in
AtomicExpandPass, before ISel time, because it's important that all
atomic operations for a given size either lower to __atomic_*
libcalls (which may use locks), or native instructions which won't. No
mixing and matching.

At the moment, this code is enabled only for SPARC, as a
demonstration. The next commit will expand support to all of the other
targets.

Differential Revision: http://reviews.llvm.org/D18200

llvm-svn: 266062
2016-04-12 12:30:25 +00:00
Simon Dardis
0af53c5560 Revert "[mips] MIPSR6 Compact branch aliases"
This reverts commit r266055.

ps4-buildslave2 is highlighting a failure.

llvm-svn: 266061
2016-04-12 12:22:45 +00:00
Jonas Paulsson
4156ee11bb [SystemZ] Use LDE32 instead of LE, when Offset is small.
On z13, if eliminateFrameIndex() chooses LE (and not LEY), immediately
transform that LE to LDE32 to avoid partial register dependencies.

LEY should be generally preferred for big offsets over an expansion
into LAY + LDE32.

Reviewed by Ulrich Weigand.

llvm-svn: 266060
2016-04-12 12:07:23 +00:00
Simon Dardis
d847d985b9 [mips] MIPSR6 Compact branch aliases
Summary:
Alias 'jic $reg, 0' to 'jrc $reg' and 'jialc $reg, 0' to 'jalrc $reg' like
binutils.

Reviewers: dsanders

Differential Revision: http://reviews.llvm.org/D18856

llvm-svn: 266055
2016-04-12 10:41:53 +00:00
Stephan Bergmann
e726f0aea9 Avoid GCC -fpermissive error about llvm::Mangler hidden by member named Mangler
llvm-svn: 266049
2016-04-12 08:23:44 +00:00
Mehdi Amini
f1caa14180 Refactor the Internalize stage of libLTO in a separate file (NFC)
This is intended to be shared by the ThinLTOCodeGenerator.

Note that there is a change in the way the verifier is run, previously
it was ran as a Pass on the merged module during internalization.
While now the verifier is called explicitely on the merged module
outside of the internalize "pass pipeline".

What remains strange in the API is the fact that `DisableVerify` in
the API does not disable this initial verifier.

Differential Revision: http://reviews.llvm.org/D19000

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266047
2016-04-12 06:34:10 +00:00
Mehdi Amini
97f744e831 Use StringSet instead of StringMap where it makes sense to in LTOCodeGenerator (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266046
2016-04-12 06:33:44 +00:00
Junmo Park
b9169e3854 Minor code cleanup. NFC.
llvm-svn: 266045
2016-04-12 06:02:11 +00:00
Chuang-Yu Cheng
19e3905d51 [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0
Resolve Bug 27046 (https://llvm.org/bugs/show_bug.cgi?id=27046).
The PPCInstrInfo::optimizeCompareInstr function could create a new use of
CR0, even if CR0 were previously dead. This patch marks CR0 live if a use of
CR0 is created.

Author: Tom Jablin (tjablin)
Reviewers: hfinkel kbarton cycheng

http://reviews.llvm.org/D18884

llvm-svn: 266040
2016-04-12 03:10:52 +00:00
Chuang-Yu Cheng
83dddda4a1 [PPC64] Use mfocrf in prologue when we only need to save 1 nonvolatile CR field
In the ELFv2 ABI, we are not required to save all CR fields. If only one
nonvolatile CR field is clobbered, use mfocrf instead of mfcr to
selectively save the field, because mfocrf has short latency compares to
mfcr.

Thanks Nemanja's invaluable hint!
Reviewers: nemanjai tjablin hfinkel kbarton

http://reviews.llvm.org/D17749

llvm-svn: 266038
2016-04-12 03:04:44 +00:00
Matthias Braun
ca2eebf587 TargetLowering: Add missing doxygen group end.
The missing end was also confusing the '{', '}' matching heuristics in
vim.

llvm-svn: 266036
2016-04-12 02:16:15 +00:00
Matthias Braun
c7cce2e862 AArch64: Drive-by cleanup
llvm-svn: 266035
2016-04-12 02:16:13 +00:00
George Burgess IV
cbf8ff2965 Attempt to make buildbot happier with r266032.
Apparently std::numeric_limits<unsigned>::max() isn't constexpr
everywhere yet.

llvm-svn: 266034
2016-04-12 01:44:13 +00:00
George Burgess IV
4e2d8dca99 Add the allocsize attribute to LLVM.
`allocsize` is a function attribute that allows users to request that
LLVM treat arbitrary functions as allocation functions.

This patch makes LLVM accept the `allocsize` attribute, and makes
`@llvm.objectsize` recognize said attribute.

The review for this was split into two patches for ease of reviewing:
D18974 and D14933. As promised on the revisions, I'm landing both
patches as a single commit.

Differential Revision: http://reviews.llvm.org/D14933

llvm-svn: 266032
2016-04-12 01:05:35 +00:00
Quentin Colombet
c4bc2f5fb2 [AArch64] Add test cases for the repairing of physical registers.
llvm-svn: 266030
2016-04-12 00:43:40 +00:00
Quentin Colombet
ad76f07a25 [RegBankSelect] Teach the repairing code how to handle physical
registers.

llvm-svn: 266029
2016-04-12 00:38:51 +00:00
Quentin Colombet
049dfdbb3c [AArch64] Add a test case for the propagation of register banks through
phis.

llvm-svn: 266028
2016-04-12 00:32:55 +00:00
Quentin Colombet
51b348dd13 [RegisterBankInfo] Do not provide a default mapping for non-reg of phi
operations.

llvm-svn: 266027
2016-04-12 00:30:14 +00:00
Quentin Colombet
5b91aa8e53 [AArch64] Add a test case for the repairing of definitions.
llvm-svn: 266026
2016-04-12 00:25:22 +00:00
Quentin Colombet
312261ffb2 [RegBankSelect] Teach how to repair definitions.
Although repairing definitions is not mandatory for correctness (only
phis would be impacted because of the RPO traversal), not repairing
might go against the cost model. Therefore, just repair when it is
possible.

llvm-svn: 266025
2016-04-12 00:12:59 +00:00
Quentin Colombet
afceaae11d [MachineIRBuilder] Expose the insertion point in the public API.
It may be convenient to know where we are about to insert some code, for
instance to save and then restore this insertion.

llvm-svn: 266024
2016-04-12 00:07:14 +00:00
JF Bastien
457191ce8d MergeFunctions: test alloca better
r237193 fix handling of alloca size / align in MergeFunctions, but only tested one and didn't follow FunctionComparator::cmpOperations's usual comparison pattern. It also didn't update Instruction.cpp:haveSameSpecialState which I'll do separately.

llvm-svn: 266022
2016-04-12 00:03:26 +00:00
Quentin Colombet
df50861994 [AArch64] Test that RegBankSelect inserts the proper copies to fix the
register bank assignments.

llvm-svn: 266021
2016-04-12 00:00:42 +00:00
Derek Schuff
bf676249bc Replace MachineRegisterInfo::TracksLiveness with a MachineFunctionProperty
Use the MachineFunctionProperty mechanism to indicate whether the
liveness info is accurate instead of a bool flag on MRI.
Keeps the MRI accessor function for convenience. NFC

Differential Revision: http://reviews.llvm.org/D18767

llvm-svn: 266020
2016-04-11 23:32:13 +00:00
Adrian Prantl
907584df51 Add a missing DICompileUnit to testcase.
llvm-svn: 266019
2016-04-11 23:30:29 +00:00
Mehdi Amini
bf78d0ed58 ThinLTO renaming: use module hash instead of position in the summary
This is more robust to changes in the link ordering.

Differential Revision: http://reviews.llvm.org/D18946

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266018
2016-04-11 23:26:46 +00:00
Adrian Prantl
d4a72b1280 Legalize the debug info in this testcase in anticipation of future Verifier improvements.
llvm-svn: 266017
2016-04-11 23:26:31 +00:00
JF Bastien
90197fbce1 AtomicExpandPass: mark assert variable as used
Avoid -Wunused-variable

llvm-svn: 266016
2016-04-11 23:03:54 +00:00
James Y Knight
6ff1d98c2b Fix compile with GCC after r266002 (Add __atomic_* lowering to AtomicExpandPass)
It doesn't like implicitly calling the ArrayRef constructor with a
returned array -- it appears to decays the returned value to a pointer,
first, before trying to make an ArrayRef out of it.

llvm-svn: 266011
2016-04-11 22:52:42 +00:00