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Commit Graph

185347 Commits

Author SHA1 Message Date
Craig Topper
d16a5042d5 [X86] Add more tests for commuting evex vcmp instructions during isel to fold a load.
Some of the isel patterns were not updated to check for
TargetConstant instead of Constant in r372338.

llvm-svn: 372522
2019-09-22 19:06:08 +00:00
Simon Pilgrim
d9c4a3a263 [SelectionDAG] computeKnownBits/ComputeNumSignBits - cleanup demanded/unknown paths. NFCI.
Merge the calls, just adjust the demandedelts if we have a valid extract_subvector constant index, else demand all elts.

llvm-svn: 372521
2019-09-22 18:47:12 +00:00
Simon Pilgrim
05ce96d3fa [XRay] Silence static analyzer dyn_cast<BufferExtents> null dereference warning. NFCI.
llvm-svn: 372520
2019-09-22 18:47:00 +00:00
Simon Pilgrim
6fd9cdde6b [LSR] Silence static analyzer null dereference warnings with assertions. NFCI.
Add assertions to make it clear that GenerateIVChain / NarrowSearchSpaceByPickingWinnerRegs should succeed in finding non-null values

llvm-svn: 372518
2019-09-22 17:59:24 +00:00
Simon Pilgrim
322c52a01b ConstantHoisting - Silence static analyzer dyn_cast<PointerType> null dereference warning. NFCI.
llvm-svn: 372517
2019-09-22 17:45:05 +00:00
Nico Weber
9df9caa257 gn build: Friendlier error on invalid entries in llvm_targets_to_build
llvm-svn: 372515
2019-09-22 16:48:20 +00:00
Simon Pilgrim
68b7321f18 [Cost][X86] Add more missing vector truncation costs
The AVX512 cases still need some work to correct recognise the PMOV truncation cases.

llvm-svn: 372514
2019-09-22 16:46:15 +00:00
Nico Weber
59bad4765c gn build: consolidate "Nothing to do" branches in targets.gni
No behavior change.

llvm-svn: 372512
2019-09-22 15:42:40 +00:00
Sanjay Patel
1bf223ad82 [InstCombine] allow icmp+binop folds before min/max bailout (PR43310)
This has the potential to uncover missed analysis/folds as shown in the
min/max code comment/test, but fewer restrictions on icmp folds should
be better in general to solve cases like:
https://bugs.llvm.org/show_bug.cgi?id=43310

llvm-svn: 372510
2019-09-22 14:31:53 +00:00
Sanjay Patel
75f137148f [InstCombine] add tests for icmp fold hindered by min/max; NFC
llvm-svn: 372509
2019-09-22 14:23:22 +00:00
Simon Pilgrim
d5674a64d0 Fix uninitialized variable warning. NFCI.
llvm-svn: 372508
2019-09-22 13:43:21 +00:00
Simon Pilgrim
1d23c266a6 [AArch64] AArch64StackTagging - Silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about potential null dereferences, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 372507
2019-09-22 13:43:12 +00:00
Nico Weber
20005fe441 gn build: Add missing RISCV to llvm_targets_to_build="all"
llvm-svn: 372506
2019-09-22 13:41:38 +00:00
Nico Weber
23f929a310 gn build: Add build files for llvm/lib/Target/AVR
Differential Revision: https://reviews.llvm.org/D67872

llvm-svn: 372505
2019-09-22 13:17:38 +00:00
Simon Pilgrim
29a6f87b20 [NVPTX] NVPTXLowerAggrCopies - Silence static analyzer dyn_cast<StoreInst> null dereference warning. NFCI.
llvm-svn: 372504
2019-09-22 13:14:30 +00:00
Simon Pilgrim
1ff2d7ae8c [Lanai] LanaiAsmParser - Silence static analyzer dyn_cast null dereference warnings. NFCI.
We were already doing this dyn_cast && isa<> && cast<> pattern for some add*Operands methods, just do this more consistently to stop clang static analyzer warning so much.

llvm-svn: 372503
2019-09-22 13:14:21 +00:00
Simon Pilgrim
623f27d1b0 [VPlan] Silence static analyzer dyn_cast null dereference warning. NFCI.
llvm-svn: 372502
2019-09-22 13:02:00 +00:00
Simon Pilgrim
9d8cc3b2a4 AMDGPUPrintfRuntimeBinding - silence static analyzer null dereference warnings. NFCI.
llvm-svn: 372501
2019-09-22 13:01:49 +00:00
Simon Pilgrim
885a74be7b [MIPS] Don't dereference dyn_cast<> Constant results. NFCI.
The static analyzer is warning about potential null dereferences, but we should be able to use cast<> directly and if not assert will fire for us.

llvm-svn: 372500
2019-09-22 12:38:32 +00:00
Simon Pilgrim
6e09dc0c9d [Hexagon] Don't dereference dyn_cast<ConstantFPSDNode> result. NFCI.
The static analyzer is warning about potential null dereference, but we should be able to use cast<ConstantFPSDNode> directly and if not assert will fire for us.

llvm-svn: 372499
2019-09-22 12:38:21 +00:00
Simon Pilgrim
8adc9b60c4 [Cost][X86] Add v2i64 truncation costs
We are missing costs for a lot of truncation cases, I'm hoping to address all the 'zero cost' cases in trunc.ll

I thought this was a vector widening side effect, but even before this we had some interesting LV decisions (notably over indvars) being made due to these zero costs.

llvm-svn: 372498
2019-09-22 12:04:38 +00:00
Benjamin Kramer
1c59dec472 Move classes into anonymous namespaces. NFC.
llvm-svn: 372495
2019-09-22 09:28:47 +00:00
Craig Topper
5d13fbb57e [X86] Add test memset and memcpy testcases for D67874. NFC
llvm-svn: 372494
2019-09-22 06:52:25 +00:00
Roman Lebedev
f2b5e4e785 [InstSimplify] simplifyUnsignedRangeCheck(): X >= Y && Y == 0 --> Y == 0
https://rise4fun.com/Alive/v9Y4

llvm-svn: 372491
2019-09-21 22:27:39 +00:00
Roman Lebedev
fd7d7d4041 [InstSimplify][NFC] Reorganize simplifyUnsignedRangeCheck() to emphasize and/or symmetry
Only a single `X >= Y && Y == 0  -->  Y == 0` fold appears to be missing.

llvm-svn: 372490
2019-09-21 22:27:28 +00:00
Roman Lebedev
a95a2e0ed3 [NFC][InstSimplify] Add exhaustive test coverage for simplifyUnsignedRangeCheck().
One case is not handled.

llvm-svn: 372489
2019-09-21 22:27:18 +00:00
DeForest Richards
2bffc761b0 [Docs] Updates sidebar links
Adds sidebar links to mailing lists, IRC, and meetups and social events.

llvm-svn: 372488
2019-09-21 21:05:20 +00:00
DeForest Richards
636d7ad372 [Docs] Adds new page for Getting Involved articles
Adds a new page for existing Getting Involved, Development Process, and Community Proposals articles. Also moves Mailing Lists, Meetups and social events, and IRC sections.

llvm-svn: 372487
2019-09-21 20:56:40 +00:00
Martin Storsjo
f445330df3 [CodeView] Add pragma push/pop_macro for ARM64_FPSR to enum header
This fixes (one aspect of) compilation of LLDB with MSVC for ARM64.

LLDB source files include intrin.h, and the MSVC intrin.h transitively
includes arm64intr.h, which has an ARM64_FPSR define, which clashes
with the enum declaration.

Differential Revision: https://reviews.llvm.org/D67864

llvm-svn: 372481
2019-09-21 19:09:24 +00:00
Suyog Sarda
af782eed2a SROA: Check Total Bits of vector type
While Promoting alloca instruction of Vector Type, 
Check total size in bits of its slices too.
If they don't match, don't promote the alloca instruction.

Bug : https://bugs.llvm.org/show_bug.cgi?id=42585

llvm-svn: 372480
2019-09-21 18:16:37 +00:00
Suyog Sarda
cb411decd8 Test mail. NFC.
Testing commit acces. NFC.

llvm-svn: 372479
2019-09-21 18:03:30 +00:00
Wei Mi
b265118981 Recommit [SampleFDO] Expose an interface to return the size of a section
or the size of the profile for profile in ExtBinary format.

Fix a test failure on Mac.

[SampleFDO] Expose an interface to return the size of a section or the
size of the profile for profile in ExtBinary format.

Sometimes we want to limit the size of the profile by stripping some functions
with low sample count or by stripping some function names with small text size
from profile symbol list. That requires the profile reader to have the
interfaces returning the size of a section or the size of total profile. The
patch add those interfaces.

At the same time, add some dump facility to show the size of each section.

Differential revision: https://reviews.llvm.org/D67726

llvm-svn: 372478
2019-09-21 17:23:55 +00:00
Hideto Ueno
567fce3ca2 [Attributor] Implement "norecurse" function attribute deduction
Summary:
This patch introduces `norecurse` function attribute deduction.

`norecurse` will be deduced if the following conditions hold:
* The size of SCC in which the function belongs equals to 1.
* The function doesn't have self-recursion.
* We have `norecurse` for all call site.

To avoid a large change, SCC is calculated using scc_iterator in InfoCache initialization for now.

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67751

llvm-svn: 372475
2019-09-21 15:13:19 +00:00
Fangrui Song
9ccaf1473c [Support] Add a DataExtractor constructor that takes ArrayRef<uint8_t>
The new constructor can simplify some llvm-readobj call sites.

Reviewed By: grimar, dblaikie

Differential Revision: https://reviews.llvm.org/D67797

llvm-svn: 372473
2019-09-21 15:05:03 +00:00
DeForest Richards
407a0cb703 [Docs] Bug fix for document not included in toctree
Fixes 'document not included in toctree' bug for FAQ and Lexicon topics.

llvm-svn: 372470
2019-09-21 14:29:19 +00:00
DeForest Richards
9d5f019089 [Docs] Updates sidebar links
Adds additional links to sidebar. Also removes Glossary and FAQ from LLVM Design & Overview section. (These links now reside on the sidebar.)

llvm-svn: 372469
2019-09-21 14:17:09 +00:00
Roman Lebedev
c1a31b1e8e [NFC][X86] Adjust check prefixes in bmi.ll (PR43381)
llvm-svn: 372468
2019-09-21 11:12:55 +00:00
Amara Emerson
32510b606a [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64>
Simple continuation of existing selection support.

llvm-svn: 372467
2019-09-21 09:21:16 +00:00
Amara Emerson
5f6b7279f3 [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64>
Just add an extra case to the existing selection logic.

llvm-svn: 372466
2019-09-21 09:21:13 +00:00
Amara Emerson
a9369d64ec [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal.
llvm-svn: 372465
2019-09-21 09:21:10 +00:00
Amara Emerson
ac22fb5afc Revert "[SampleFDO] Expose an interface to return the size of a section or the size"
This reverts commit f118852046a1d255ed8c65c6b5db320e8cea53a0.

Broke the macOS build/greendragon bots.

llvm-svn: 372464
2019-09-21 09:11:51 +00:00
James Molloy
a040a966a9 [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount
Recommit: fix asan errors.

The way MachinePipeliner uses these target hooks is stateful - we reduce trip
count by one per call to reduceLoopCount. It's a little overfit for hardware
loops, where we don't have to worry about stitching a loop induction variable
across prologs and epilogs (the induction variable is implicit).

This patch introduces a new API:

  /// Analyze loop L, which must be a single-basic-block loop, and if the
  /// conditions can be understood enough produce a PipelinerLoopInfo object.
  virtual std::unique_ptr<PipelinerLoopInfo>
  analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const;

The return value is expected to be an implementation of the abstract class:

  /// Object returned by analyzeLoopForPipelining. Allows software pipelining
  /// implementations to query attributes of the loop being pipelined.
  class PipelinerLoopInfo {
  public:
    virtual ~PipelinerLoopInfo();
    /// Return true if the given instruction should not be pipelined and should
    /// be ignored. An example could be a loop comparison, or induction variable
    /// update with no users being pipelined.
    virtual bool shouldIgnoreForPipelining(const MachineInstr *MI) const = 0;

    /// Create a condition to determine if the trip count of the loop is greater
    /// than TC.
    ///
    /// If the trip count is statically known to be greater than TC, return
    /// true. If the trip count is statically known to be not greater than TC,
    /// return false. Otherwise return nullopt and fill out Cond with the test
    /// condition.
    virtual Optional<bool>
    createTripCountGreaterCondition(int TC, MachineBasicBlock &MBB,
                                 SmallVectorImpl<MachineOperand> &Cond) = 0;

    /// Modify the loop such that the trip count is
    /// OriginalTC + TripCountAdjust.
    virtual void adjustTripCount(int TripCountAdjust) = 0;

    /// Called when the loop's preheader has been modified to NewPreheader.
    virtual void setPreheader(MachineBasicBlock *NewPreheader) = 0;

    /// Called when the loop is being removed.
    virtual void disposed() = 0;
  };

The Pipeliner (ModuloSchedule.cpp) can use this object to modify the loop while
allowing the target to hold its own state across all calls. This API, in
particular the disjunction of creating a trip count check condition and
adjusting the loop, improves the code quality in ModuloSchedule.cpp.

llvm-svn: 372463
2019-09-21 08:19:41 +00:00
Craig Topper
ef72bd9cc3 [X86] Use sse_load_f32/f64 and timm in patterns for memory form of vgetmantss/sd.
Previously we only matched scalar_to_vector and scalar load, but
we should be able to narrow a vector load or match vzload.

Also need to match TargetConstant instead of Constant. The register
patterns were previously updated, but not the memory patterns.

llvm-svn: 372458
2019-09-21 06:44:29 +00:00
Craig Topper
717f1d9695 [X86] Add test case to show failure to fold load with getmantss due to isel pattern looking for Constant instead of TargetConstant
The intrinsic has an immarg so its gets created with a TargetConstant
instead of a Constant after r372338. The isel pattern was only
updated for the register form, but not the memory form.

llvm-svn: 372457
2019-09-21 06:44:24 +00:00
Nico Weber
97767c6eb1 avr targetinfo: remove unneeded dep on MC
llvm-svn: 372451
2019-09-21 02:43:32 +00:00
Matt Arsenault
c078733972 AMDGPU/GlobalISel: Allow selection of scalar min/max
I believe all of the uniform/divergent pattern predicates are
redundant and can be removed. The uniformity bit already influences
the register class, and nothhing has broken when I've removed this and
others.

llvm-svn: 372450
2019-09-21 02:37:33 +00:00
Matt Arsenault
ae65fbf0a9 LiveIntervals: Add missing operator!= for segments
llvm-svn: 372449
2019-09-21 02:37:28 +00:00
Artur Pilipenko
5cc8a158ad Support for 64-bit PC-relative relocations for X86_64
ELF files generated for X86_64 targets may contain 64-bit PC-relative 
relocations. For instance, an exception handler table entry contains the start 
of exception-throwing frame relative to the start of exception handler. As these 
two labels belong to different sections, their difference and so the relocation 
is 64-bit.

An attempt to parse such file, i.e. in DWARFContext::create, results in "failed 
to compute relocation" error.

This fix adds support for such relocations to RelocationResolver.cpp.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D67779

Patch by Oleg Pliss (Oleg.Pliss@azul.com)

llvm-svn: 372447
2019-09-21 01:37:14 +00:00
GN Sync Bot
40ff3514b8 gn build: Merge r372445
llvm-svn: 372446
2019-09-21 01:27:09 +00:00
Amara Emerson
860145b41c [GlobalISel] Defer setting HasCalls on MachineFrameInfo to selection time.
We currently always set the HasCalls on MFI during translation and legalization if
we're handling a call or legalizing to a libcall. However, if that call is later
optimized to a tail call then we don't need the flag. The flag being set to true
causes frame lowering to always save and restore FP/LR, which adds unnecessary code.

This change does the same thing as SelectionDAG and ports over some code that scans
instructions after selection, using TargetInstrInfo to determine if target opcodes
are known calls.

Code size geomean improvements on CTMark:
 -O0 : 0.1%
 -Os : 0.3%

Differential Revision: https://reviews.llvm.org/D67868

llvm-svn: 372443
2019-09-20 23:52:07 +00:00