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Author SHA1 Message Date
Evan Cheng
efcb0061df Mark instructions whose pattern is (store ...) isStore. 
llvm-svn: 28032
 2006-05-01 09:04:20 +00:00
Evan Cheng
94264c7c90 Didn't mean ScheduleDAGList.cpp to make the last checkin. 
llvm-svn: 28030
 2006-05-01 08:56:34 +00:00
Evan Cheng
ef706b77c4 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions. 
llvm-svn: 28029
 2006-05-01 08:54:57 +00:00
Chris Lattner
db3b029ab9 Intel mode no longer uses %'s on registers 
llvm-svn: 28028
 2006-05-01 05:56:51 +00:00
Chris Lattner
fe8f858ec0 Remove %'s from register names when in intel mode. 
llvm-svn: 28027
 2006-05-01 05:53:50 +00:00
Chris Lattner
bce271e829 Format #APP lines a bit nicer 
llvm-svn: 28026
 2006-05-01 04:11:03 +00:00
Evan Cheng
02e72f8f55 Local spiller kills a store if the folded restore is turned into a copy. 
But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.

llvm-svn: 28024
 2006-04-30 08:41:47 +00:00
Jeff Cohen
1b3f7b8b48 Mingw32 patches supplied by Anton Korobeynikov. 
llvm-svn: 28023
 2006-04-29 18:41:44 +00:00
Chris Lattner
6ce6942d21 Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 
with some changes I have to the new CFE.

llvm-svn: 28022
 2006-04-28 23:33:20 +00:00
Evan Cheng
a7ee4891c5 I can't spell: Register, not Regsiter. 
llvm-svn: 28021
 2006-04-28 23:19:39 +00:00
Evan Cheng
516164744a Implemented x86 inline asm b, h, w, k modifiers. 
llvm-svn: 28020
 2006-04-28 23:11:40 +00:00
Chris Lattner
4c79d3b238 Fix InstCombine/2006-04-28-ShiftShiftLongLong.ll 
llvm-svn: 28019
 2006-04-28 22:21:41 +00:00
Chris Lattner
8665f8644d new testcase miscompiled by instcombine 
llvm-svn: 28018
 2006-04-28 22:17:20 +00:00
Chris Lattner
e3de67fae2 Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll 
llvm-svn: 28017
 2006-04-28 21:56:10 +00:00
Chris Lattner
6b7d67bb51 testcase that crashes the ppc backend, which can't sextinreg(i1) 
llvm-svn: 28016
 2006-04-28 21:52:24 +00:00
Evan Cheng
a33feb51db Initial caller side support (for CCC only, not FastCC) of 128-bit vector 
passing by value.

llvm-svn: 28015
 2006-04-28 21:29:37 +00:00
Evan Cheng
a8b295feb2 Bare-bone X86 inline asm printer support. 
llvm-svn: 28014
 2006-04-28 21:19:05 +00:00
Evan Cheng
ba1c03668e Update. It should use two shufps, not three! 
llvm-svn: 28013
 2006-04-28 18:55:34 +00:00
Evan Cheng
9f21c2daf4 Remove the temporary option: -no-isel-fold-inflight 
llvm-svn: 28012
 2006-04-28 18:54:11 +00:00
Evan Cheng
d577ce4c4a Implement four-wide shuffle with 2 shufps if no more than two elements come 
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0

llvm-svn: 28011
 2006-04-28 07:03:38 +00:00
Chris Lattner
a297ad27db Fix PR743: emit -help output of a tool to cout, not cerr. 
llvm-svn: 28010
 2006-04-28 05:36:25 +00:00
Evan Cheng
f843942504 TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.

llvm-svn: 28009
 2006-04-28 05:25:15 +00:00
Chris Lattner
4e783a3101 Mapping of physregs can make it so that the designated and input physregs are 
the same.  In this case, don't emit a noop copy.

llvm-svn: 28008
 2006-04-28 04:43:18 +00:00
Chris Lattner
2118062b9c Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll 
llvm-svn: 28007
 2006-04-28 04:14:49 +00:00
Chris Lattner
c251c24048 new testcase 
llvm-svn: 28006
 2006-04-28 04:14:29 +00:00
Evan Cheng
37af498015 Use movaps instead of movapd for spill / restore. 
llvm-svn: 28005
 2006-04-28 02:23:35 +00:00
Evan Cheng
ff5a88b62e Added a temporary option -no-isel-fold-inflight to control whether a "inflight" 
node can be folded.

llvm-svn: 28003
 2006-04-28 02:09:19 +00:00
Evan Cheng
3466555d87 When isel'ing a node, mark its operands "InFlight" before selecting them. These 
nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.

llvm-svn: 28002
 2006-04-28 02:08:10 +00:00
Chris Lattner
85a24e23a2 When we have a two-address instruction where the input cannot be clobbered 
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy.  This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write.  As one example, this change does:

        pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
        xorps %XMM2, %XMM5
        cmpltps %XMM1, %XMM0
-       movaps XMMWORD PTR [%ESP + 52], %XMM0
-       movapd %XMM6, XMMWORD PTR [%ESP + 52]
+       movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
        movapd XMMWORD PTR [%ESP + 52], %XMM6
        movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
        cmpltps %XMM3, %XMM0
-       movaps XMMWORD PTR [%ESP + 20], %XMM0
-       movapd %XMM7, XMMWORD PTR [%ESP + 20]
+       movaps %XMM7, %XMM0
        cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
        movapd XMMWORD PTR [%ESP + 20], %XMM7
        cmpltps %XMM4, %XMM0

... which is far better than a store followed by a load!

llvm-svn: 28001
 2006-04-28 01:46:50 +00:00
Evan Cheng
b44e984d41 Test case for PR748 
llvm-svn: 28000
 2006-04-28 01:21:37 +00:00
Chris Lattner
65291785c8 Add a note 
llvm-svn: 27999
 2006-04-28 00:04:05 +00:00
Chris Lattner
53275cb616 Add a note 
llvm-svn: 27998
 2006-04-27 21:40:57 +00:00
Chris Lattner
3f6a151e2d Add support for inserting undef into a vector. This implements 
Transforms/InstCombine/vec_insert_to_shuffle.ll

llvm-svn: 27997
 2006-04-27 21:14:21 +00:00
Chris Lattner
7fd4f0d367 This should turn into one vector shuffle instruction. 
llvm-svn: 27996
 2006-04-27 21:13:58 +00:00
Evan Cheng
11e3cec8bd Make x86 isel lowering produce tailcall nodes. They are match to normal calls 
for now.

Patch contributed by Alexander Friedman.

llvm-svn: 27994
 2006-04-27 08:40:39 +00:00
Evan Cheng
efbc112b7c A couple of new entries. 
llvm-svn: 27993
 2006-04-27 08:31:33 +00:00
Evan Cheng
24795120e1 Support for passing 128-bit vector arguments via XMM registers. 
llvm-svn: 27992
 2006-04-27 08:31:10 +00:00
Evan Cheng
a6081bc674 Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses 
(VAND, VADD, etc.). Legalizer will assert otherwise.

llvm-svn: 27991
 2006-04-27 08:29:42 +00:00
Reid Spencer
8332255d07 For PR747: 
If we fail to find a required program, simply set that program to echo
out something that tells the user the situation. That is, instead of just
"true runtest" we now get "echo 'Skipped: runtest not found'".

llvm-svn: 27990
 2006-04-27 07:49:24 +00:00
Evan Cheng
1e065ae594 Oops 
llvm-svn: 27989
 2006-04-27 05:44:50 +00:00
Evan Cheng
a0e0eabc07 Bug fix: not updating NumIntRegs. 
llvm-svn: 27988
 2006-04-27 05:35:28 +00:00
Chris Lattner
3b27c1bd33 Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 
PR748.

llvm-svn: 27987
 2006-04-27 05:01:07 +00:00
Chris Lattner
ad7fe264bd new testcase 
llvm-svn: 27986
 2006-04-27 05:00:43 +00:00
Evan Cheng
a1f9f34f35 - Clean up formal argument lowering code. Prepare for vector pass by value work. 
- Fixed vararg support.

llvm-svn: 27985
 2006-04-27 01:32:22 +00:00
Chris Lattner
be67e21327 Fix some nondeterminstic behavior in the mem2reg pass that (in addition to 
nondeterminism being bad) could cause some trivial missed optimizations (dead
phi nodes being left around for later passes to clean up).

With this, llvm-gcc4 now bootstraps and correctly compares.  I don't know
why I never tried to do it before... :)

llvm-svn: 27984
 2006-04-27 01:14:43 +00:00
Jeff Cohen
8f4ae863ce Actually, semantical doesn't appear to be a word. 
llvm-svn: 27983
 2006-04-26 21:03:17 +00:00
Chris Lattner
b42f17a66a Implement Transforms/IndVarsSimplify/complex-scev.ll, a case where we didn't 
recognize some simple affine IV's.

llvm-svn: 27982
 2006-04-26 18:34:07 +00:00
Chris Lattner
24beb0433f new testcase 
llvm-svn: 27981
 2006-04-26 18:32:59 +00:00
Evan Cheng
3abec16563 Fix fastcc failures. 
llvm-svn: 27980
 2006-04-26 18:21:31 +00:00
Chris Lattner
9d24f6b3f9 Unfortunately this really isn't the place for advertisement. 
llvm-svn: 27979
 2006-04-26 18:10:59 +00:00