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Author SHA1 Message Date
Justin Holewinski
d7f59a21a7 PTX: Use external symbols to keep track of params and locals. This also fixes 
a couple of outstanding issues with frame objects occuring as instruction
operands.

llvm-svn: 140616
 2011-09-27 18:12:55 +00:00
Jakob Stoklund Olesen
08b5751146 Use existing function. 
llvm-svn: 140615
 2011-09-27 17:55:08 +00:00
Akira Hatanaka
33908261c2 Fix function MipsRegisterInfo::getRegisterNumbering. 
Return numbers of 64-bit registers.

llvm-svn: 140609
 2011-09-27 17:15:27 +00:00
Akira Hatanaka
c27a7b0463 Do not add the pass that restores $gp if target is Mips64. 
llvm-svn: 140607
 2011-09-27 16:58:43 +00:00
Duncan Sands
1695ec539b Have the verifier check that all landingpad operands are constants. 
llvm-svn: 140606
 2011-09-27 16:43:19 +00:00
Nadav Rotem
5b6d21503b Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC. 
Add a new method: getAnyExtOrTrunc and use it to replace the manual check.

llvm-svn: 140603
 2011-09-27 11:16:47 +00:00
Nadav Rotem
1d08f41853 Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8, 
while the decision is to bit-pack small values.

llvm-svn: 140601
 2011-09-27 10:48:29 +00:00
Bill Wendling
d5449fa478 Remove some not-really-correct wording. 
llvm-svn: 140600
 2011-09-27 10:37:28 +00:00
Akira Hatanaka
7259090c76 Mark MipsPseudo isPseudo. 
llvm-svn: 140598
 2011-09-27 04:57:54 +00:00
Justin Holewinski
a50e29abd6 PTX: Add support for sitofp in backend 
llvm-svn: 140593
 2011-09-27 01:04:47 +00:00
Bill Wendling
589336d854 Split the landing pad basic block with the correct function. Also merge the 
split landingpad instructions into a PHI node.
PR11016

llvm-svn: 140592
 2011-09-27 00:59:31 +00:00
Andrew Trick
eb2bea7d4a Disable LSR retry by default. 
Disabling aggressive LSR saves compilation time, and with the new
indvars behavior usually improves performance.

llvm-svn: 140590
 2011-09-27 00:44:14 +00:00
Eli Friedman
db69f84663 Last batch of test conversions to new atomic instructions. 
llvm-svn: 140585
 2011-09-27 00:17:29 +00:00
Andrew Trick
9a82406730 LSR, one of the new Cost::isLoser() checks did not get merged in the previous checkin. 
llvm-svn: 140583
 2011-09-26 23:35:25 +00:00
Eli Friedman
3db429c878 Convert a bunch more tests over to the new atomic instructions. 
llvm-svn: 140582
 2011-09-26 23:15:09 +00:00
Owen Anderson
79c9401e0e Remove extraneous commit garbage. 
llvm-svn: 140581
 2011-09-26 23:14:02 +00:00
Andrew Trick
4dfc60fab6 LSR cost metric minor fix and verification. 
The minor bug heuristic was noticed by inspection. I added the
isLoser/isValid helpers because they will become more
important with subsequent checkins.

llvm-svn: 140580
 2011-09-26 23:11:04 +00:00
Owen Anderson
bfb83aae27 Fix an incorrect decoder test. 
llvm-svn: 140579
 2011-09-26 23:08:34 +00:00
Bob Wilson
cf35a852f5 Remove old hack for compiling with gcc-4.0. 
llvm-svn: 140573
 2011-09-26 22:30:57 +00:00
Owen Anderson
c811b1bed2 Remove incorrect testcases. 
llvm-svn: 140572
 2011-09-26 22:13:55 +00:00
Akira Hatanaka
a641d087fc Set register class of a register according to value of HasMips64. 
llvm-svn: 140570
 2011-09-26 21:55:17 +00:00
Akira Hatanaka
37493224a9 Define variable HasMips64 in MipsTargetLowering. 
llvm-svn: 140569
 2011-09-26 21:47:02 +00:00
Akira Hatanaka
9db31c430a In single float mode, double precision FP arguments are passed in integer 
registers, so there is no need to check here.

llvm-svn: 140568
 2011-09-26 21:37:50 +00:00
Eli Friedman
d01fc33809 Convert more tests to new atomic instructions. 
llvm-svn: 140567
 2011-09-26 21:36:10 +00:00
Eli Friedman
6aaaadc188 Convert more tests over to the new atomic instructions. 
I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.

llvm-svn: 140566
 2011-09-26 21:30:17 +00:00
Bill Wendling
25243542da Fix grammar. 
llvm-svn: 140564
 2011-09-26 21:10:31 +00:00
Bill Wendling
8e22ba15b1 Remove dead table entry. 
llvm-svn: 140563
 2011-09-26 21:08:28 +00:00
Bill Wendling
df9218305c Some minor (and more involved) cleanups. No real context changes. 
llvm-svn: 140561
 2011-09-26 21:06:33 +00:00
Owen Anderson
7742c81cde ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. 
llvm-svn: 140560
 2011-09-26 21:06:22 +00:00
Eli Friedman
56e68f7271 Convert more tests over to the new atomic instructions. 
llvm-svn: 140559
 2011-09-26 20:27:49 +00:00
Eli Friedman
ed450a3064 Upgrade a couple more tests to the new atomic instructions. 
llvm-svn: 140558
 2011-09-26 20:15:56 +00:00
Eli Friedman
9c1a430966 Enhance alias analysis for atomic instructions a bit. Upgrade a couple alias-analysis tests to the new atomic instructions. 
llvm-svn: 140557
 2011-09-26 20:15:28 +00:00
Justin Holewinski
c26ed4bf64 PTX: Fix memcpy intrinsic to handle 64-bit pointers 
llvm-svn: 140556
 2011-09-26 19:19:48 +00:00
Eli Friedman
32d22b6d3f Fix this test so it doesn't fail on Mac. 
llvm-svn: 140553
 2011-09-26 19:13:47 +00:00
Justin Holewinski
9954f99c10 PTX: Implement PTXSelectionDAGInfo 
llvm-svn: 140549
 2011-09-26 18:57:27 +00:00
Justin Holewinski
3e9a0bfed0 PTX: Implement ISD::ANY_EXTEND 
llvm-svn: 140548
 2011-09-26 18:57:24 +00:00
Justin Holewinski
52c50104d7 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

llvm-svn: 140547
 2011-09-26 18:57:22 +00:00
James Molloy
d63e75cd59 Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more. 
llvm-svn: 140539
 2011-09-26 17:40:42 +00:00
Justin Holewinski
443a122ac3 PTX: Add .align tests to stack object test file 
llvm-svn: 140537
 2011-09-26 16:20:38 +00:00
Justin Holewinski
c2d7be1dd0 PTX: SM > 2.0 implies +double 
llvm-svn: 140536
 2011-09-26 16:20:36 +00:00
Justin Holewinski
859dd9fa59 PTX: Fix some lingering issues with stack allocation 
llvm-svn: 140535
 2011-09-26 16:20:34 +00:00
Justin Holewinski
848dd4cf7c PTX: Split up the TableGen instruction definitions into logical units 
llvm-svn: 140534
 2011-09-26 16:20:31 +00:00
Justin Holewinski
83ae9143fd PTX: Unify handling of loads/stores 
llvm-svn: 140533
 2011-09-26 16:20:28 +00:00
Justin Holewinski
e79db83e87 PTX: Handle FrameIndex nodes 
llvm-svn: 140532
 2011-09-26 16:20:25 +00:00
David Meyer
90ed5fdd4f Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 
llvm-svn: 140517
 2011-09-26 06:44:27 +00:00
David Meyer
a6e588d80c PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
llvm-svn: 140516
 2011-09-26 06:13:20 +00:00
Craig Topper
a08173e534 Fix VEX decoding in i386 mode. Fixes PR11008. 
llvm-svn: 140515
 2011-09-26 05:12:43 +00:00
Jakob Stoklund Olesen
cbd2c336ab Add target hook for pseudo instruction expansion. 
Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

llvm-svn: 140472
 2011-09-25 19:21:35 +00:00
Nadav Rotem
559e12a58a [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENT 
SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.

Fixes spill-q.ll when running -promote-elements.

llvm-svn: 140471
 2011-09-25 18:59:42 +00:00
Jakob Stoklund Olesen
7e8448c147 Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos. 
No functional change intended.

llvm-svn: 140470
 2011-09-25 16:46:08 +00:00