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Commit Graph

7 Commits

Author SHA1 Message Date
Renato Golin
7e7be050ac [ARM] Check that the thumb COFF segment flag gets set on thumb windows
Patch by Martin Storsjö.

llvm-svn: 276877
2016-07-27 14:37:18 +00:00
Renato Golin
c15ac98803 [ARM] Set a non-conflicting comment character for assembly in MSVC mode
Currently, for ARMCOFFMCAsmInfoMicrosoft, no comment character is set, thus the
idefault, '#', is used.

The hash character doesn't work as comment character in ARM assembly, since '#'
is used for immediate values.

The comment character is set to ';', which is the comment character used by MS
armasm.exe. (The microsoft armasm.exe uses a different directive syntax than
what LLVM currently supports though, similar to ARM's armasm.)

This allows inline assembly with immediate constants to be built (and brings the
assembly output from clang -S closer to being possible to assemble).

A test is added that verifies that ';' is correctly interpreted as comments in
this mode, and verifies that assembling code that includes literal constants
with a '#' works.

Patch by Martin Storsjö.

llvm-svn: 276859
2016-07-27 12:31:58 +00:00
David Majnemer
47d3d1e5ef [MC, COFF] Support link /incremental conditionally
Today, we always take into account the possibility that object files
produced by MC may be consumed by an incremental linker.  This results
in us initialing fields which vary with time (TimeDateStamp) which harms
hermetic builds (e.g. verifying a self-host went well) and produces
sub-optimal code because we cannot assume anything about the relative
position of functions within a section (call sites can get redirected
through incremental linker thunks).

Let's provide an MCTargetOption which controls this behavior so that we
can disable this functionality if we know a-priori that the build will
not rely on /incremental.

llvm-svn: 256203
2015-12-21 22:09:27 +00:00
Saleem Abdulrasool
47bffde92c ARM: fail less catastrophically on invalid Windows input
Windows supports a restricted set of relocations (compared to ARM ELF).  In some
cases, we may end up generating an unsupported relocation.  This can occur with
bad input to the assembler in particular (the frontend should never generate
code that cannot be compiled).  Generate an error rather than just aborting.

The change in the API is driven by the desire to provide a slightly more helpful
message for debugging purposes.

llvm-svn: 226779
2015-01-22 04:03:32 +00:00
Saleem Abdulrasool
d7e194fe98 MC: adjust text section flags for WoA
Correct the section flags for code built for Windows on ARM with
`-ffunction-sections`.  Windows on ARM uses solely Thumb-2 instructions, and
indicates that the function is thumb by placing it in a text section that has
IMAGE_SCN_MEM_16BIT flag set.

When we encounter a .section directive, a new section is constructed.  This may
be a text segment.  In order to identify that we need the additional flag,
expose the target triple through the ObjectFileInfo as this information is lost
otherwise.

Since any modern ARM targeting environment on Windows would be Thumb-2 (Windows
ARM NT or Windows Embedded Compact), introducing a new flag to indicate the
section attribute seems to be a bit overkill.  Simply depend on the target
triple.  Since there is one location that this information is currently needed,
creating a target specific assembly parser and delegating the parsing of section
switches also feels a bit heavy handed.  If it turns out that this information
ends up changing additional behaviour, then it may be worth considering that
alternative.

llvm-svn: 211481
2014-06-22 22:25:01 +00:00
Saleem Abdulrasool
a72e0838ff MC: fix text section characteristics for WoA
link.exe requires that the text section has the IMAGE_SCN_MEM_16BIT flag set.
Otherwise, it will treat the function as ARM.  If this occurs, then jumps to the
function will fail, switching from thumb to ARM mode execution.

With this change, it is possible to link using the MSVC linker as well.

llvm-svn: 210415
2014-06-08 03:57:49 +00:00
Saleem Abdulrasool
b55afc349f MC: correct IMAGE_REL_ARM_MOV32T relocation emission
This corrects the emission of IMAGE_REL_ARM_MOV32T relocations.  Previously, we
were avoiding the high portion of the relocation too early.  If there was a
section-relative relocation with an offset greater than 16-bits (65535), you
would end up truncating the high order bits of the offset.  Allow the current
relocation representation to flow through out the MC layer to the object writer.
Use the new ability to restrict recorded relocations to avoid emitting the
relocation into the final object.

llvm-svn: 209337
2014-05-21 23:17:56 +00:00