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Commit Graph

81862 Commits

Author SHA1 Message Date
Nadav Rotem
f2756d7e7f AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8
immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.

llvm-svn: 155440
2012-04-24 11:27:53 +00:00
Richard Barton
543457a8c8 Refactor Thumb ITState handling in ARM Disassembler to more efficiently use its vector
llvm-svn: 155439
2012-04-24 11:13:20 +00:00
Nadav Rotem
d060c25823 AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructions
using the pattern (vbroadcast (i32load src)). In some cases, after we generate
this pattern new users are added to the load node, which prevent the selection
of the blend pattern. This commit provides fallback patterns which perform
in-vector broadcast (using in-vector vbroadcast in AVX2 and pshufd on AVX1).

llvm-svn: 155437
2012-04-24 11:07:03 +00:00
Bill Wendling
a9402cc275 Look for the 'Is Simulated' module flag. This indicates that the program is compiled to run on a simulator.
llvm-svn: 155435
2012-04-24 11:03:50 +00:00
Bill Wendling
9f736e7c65 FileCheck-ize tests.
llvm-svn: 155434
2012-04-24 10:45:44 +00:00
Bill Wendling
6824095c62 FileCheck-ize these tests.
llvm-svn: 155433
2012-04-24 10:36:42 +00:00
Bill Wendling
b394f59f17 FileCheck-ize these tests. Harden some of them.
llvm-svn: 155432
2012-04-24 09:15:38 +00:00
Craig Topper
dae7196823 Remove dangling spaces. Fix some other formatting.
llvm-svn: 155429
2012-04-24 06:36:35 +00:00
Craig Topper
61065e271e Simplify code a bit and make it compile better. Remove unused parameters.
llvm-svn: 155428
2012-04-24 06:02:29 +00:00
Evan Cheng
addf0dcf31 Add a missing cpu subtype.
llvm-svn: 155402
2012-04-23 22:41:39 +00:00
Jim Grosbach
66edf44403 Tidy up. 80 columns, whitespace, et. al.
llvm-svn: 155399
2012-04-23 22:04:10 +00:00
Nadav Rotem
c60ef21760 Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics).
llvm-svn: 155397
2012-04-23 21:53:37 +00:00
Preston Gurd
0a730de3c3 This patch fixes a problem which arose when using the Post-RA scheduler
on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().  

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.

llvm-svn: 155395
2012-04-23 21:39:35 +00:00
Jim Grosbach
4221412829 ARM: VSLI two-operand assmebly aliases are tblgen'erated.
llvm-svn: 155393
2012-04-23 21:22:04 +00:00
Jim Grosbach
8aac7f6a7c ARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand aliases.
llvm-svn: 155392
2012-04-23 21:00:49 +00:00
Jim Grosbach
649ba20f1a ARM: Add testcases for two-operand variants of VSRA/VRSRA/VSRI.
llvm-svn: 155391
2012-04-23 21:00:47 +00:00
Jim Grosbach
2d1db8e4a5 Add ARM mode tests for the NEON vector shift-accumulate tests.
llvm-svn: 155390
2012-04-23 21:00:44 +00:00
Jim Grosbach
41406f1b7a Tidy up. Reformat for ease of reading.
llvm-svn: 155389
2012-04-23 21:00:42 +00:00
Jim Grosbach
d377bc4e77 ARM: vqdmulh two-operand aliases are tblgen'erated now.
llvm-svn: 155387
2012-04-23 20:37:20 +00:00
Michael J. Spencer
9ddbe009a4 [Support/Unix] Unconditionally include time.h.
When building LLVM on Linux with libc++ with CMake TIME_WITH_SYS_TIME is
undefined, and HAVE_SYS_TIME_H is defined. This ends up including
sys/time.h but not time.h. Unix/TimeValue.inc requires time.h for asctime_r
and localtime. libstdc++ seems to include time.h anyway, but libc++ does
not.

Fix this by always including time.h

llvm-svn: 155382
2012-04-23 19:00:27 +00:00
Eric Christopher
3a0516567a Allow forward declarations to take a context. This helps the debugger
find forward declarations in the context that the actual definition
will occur.

rdar://11291658

llvm-svn: 155380
2012-04-23 19:00:11 +00:00
Chandler Carruth
c442bad8f8 Temporarily revert r155364 until the upstream review can complete, per
the stated developer policy.

llvm-svn: 155373
2012-04-23 18:28:57 +00:00
Chandler Carruth
9460759e4f Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372
2012-04-23 18:25:57 +00:00
Sirish Pande
9f4844f7da Hexagon V5 (floating point) support.
llvm-svn: 155367
2012-04-23 17:49:40 +00:00
Sirish Pande
4bcbe40295 Support for Hexagon architectural feature, new value jump.
llvm-svn: 155366
2012-04-23 17:49:28 +00:00
Sirish Pande
2230f1957e Support for Hexagon VLIW Packetizer.
llvm-svn: 155365
2012-04-23 17:49:20 +00:00
Sirish Pande
85e47a24fe Hexagon Packetizer's target independent fix.
llvm-svn: 155364
2012-04-23 17:49:09 +00:00
Jakob Stoklund Olesen
6c1440cf27 Reapply r155136 after fixing PR12599.
Original commit message:

Defer some shl transforms to DAGCombine.

The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.

Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.

These transformations are deferred:

  (X >>? C) << C   --> X & (-1 << C)  (When X >> C has multiple uses)
  (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2)   (When C2 > C1)
  (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2)  (When C1 > C2)

The corresponding exact transformations are preserved, just like
div-exact + mul:

  (X >>?,exact C) << C   --> X
  (X >>?,exact C1) << C2 --> X << (C2-C1)
  (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)

The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.

llvm-svn: 155362
2012-04-23 17:39:52 +00:00
Sylvestre Ledru
3e90fea8d3 Conflict with st_dev/st_ino identifiers under Debian GNU/Hurd
The problem is that the struct file_status on UNIX systems has two
members called st_dev and st_ino; those are also members of the
struct stat, and they are reserved identifiers which can also be
provided as #define (and this is the case for st_dev on Hurd).
The solution (attached) is to rename them, for example adding a
"fs_" prefix (= file status) to them.

Patch by Pino Toscano

llvm-svn: 155354
2012-04-23 16:37:23 +00:00
Alexander Potapenko
1f7d60fd8a Fix issue 67 by checking that the interface functions weren't redefined in the compiled source file.
llvm-svn: 155346
2012-04-23 10:47:31 +00:00
Kostya Serebryany
67e32a152a [tsan] use llvm/ADT/Statistic.h for tsan stats
llvm-svn: 155341
2012-04-23 08:44:59 +00:00
Craig Topper
95fa5a8765 Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just the switch. Saves a little bit of binary size.
llvm-svn: 155339
2012-04-23 07:36:33 +00:00
Craig Topper
4e6deec5d8 Make getZeroVector and getOnesVector more alike as far as how they detect 128-bit versus 256-bit vectors. Be explicit about both sizes and use llvm_unreachable. Similar changes to getLegalSplat.
llvm-svn: 155337
2012-04-23 07:24:41 +00:00
Craig Topper
f9811e8f28 Tidy up by removing some 'else' after 'return'
llvm-svn: 155336
2012-04-23 06:57:04 +00:00
Craig Topper
c315e7b6db Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if shuffle operand has a different type than the the shuffle result since it can never happen.
llvm-svn: 155333
2012-04-23 06:38:28 +00:00
Craig Topper
f27c3223f7 Add a couple llvm_unreachables.
llvm-svn: 155332
2012-04-23 03:42:40 +00:00
Craig Topper
6c6ee67efe Remove some tab characers.
llvm-svn: 155331
2012-04-23 03:28:34 +00:00
Craig Topper
16829bb004 Remove some 'else' after 'return'. No functional change.
llvm-svn: 155330
2012-04-23 03:26:18 +00:00
Chris Lattner
4c6722a8a7 Don't die with an assertion if the Result bitwidth is already correct. This
fixes an assert reading "1239123123123123" when the result is already 64-bit.

llvm-svn: 155329
2012-04-23 00:27:54 +00:00
Bill Wendling
0f9f58c75a Cleanup whitespace.
llvm-svn: 155328
2012-04-23 00:23:33 +00:00
Bill Wendling
2b77fec649 Limit the number of times we recurse through this algorithm. All of the
intructions are processed. So there's no need to look at them if they're used as
operands of other instructions.

llvm-svn: 155327
2012-04-23 00:22:55 +00:00
Craig Topper
2dedfa7805 Make Extract128BitVector and Insert128BitVector take an unsigned instead of an ConstantNode SDValue. getConstant was almost always called just before only to have the functions take it apart and build a new ConstantSDNode.
llvm-svn: 155325
2012-04-22 20:55:18 +00:00
Craig Topper
5669044c57 Convert getNode(UNDEF) to getUNDEF.
llvm-svn: 155321
2012-04-22 19:29:34 +00:00
Craig Topper
a9994377f2 Make calls to getVectorShuffle more consistent. Use shuffle VT for calls to getUNDEF instead of requerying. Use &Mask[0] instead of Mask.data().
llvm-svn: 155320
2012-04-22 19:17:57 +00:00
Craig Topper
5c4c8b1f81 Tidy up. 80 columns and argument alignment.
llvm-svn: 155319
2012-04-22 18:51:37 +00:00
Craig Topper
58aeb7b7c3 Simplify code by converting multiple places that were manually concatenating 128-bit vectors to use either CONCAT_VECTORS or a helper function. CONCAT_VECTORS will itself be lowered to the same pattern as before. The helper function is needed for concats of BUILD_VECTORs since getNode(CONCAT_VECTORS) will just return a large BUILD_VECTOR and we may be trying to lower large BUILD_VECTORS when this occurs.
llvm-svn: 155318
2012-04-22 18:15:59 +00:00
Elena Demikhovsky
587ea8d3fc cleaned line endings in the newly added test file
llvm-svn: 155315
2012-04-22 13:22:48 +00:00
Benjamin Kramer
76a9040c03 ARM: Initialize the HasRAS bit.
Found by valgrind.

llvm-svn: 155313
2012-04-22 11:52:41 +00:00
Chandler Carruth
a4f8aa5231 Tidy up this test more:
1) Make the checked assertions a bit more precise. We really want the
   canonical forms coming out of reassociate to be exactly what is
   expected.
2) Remove other passes, and switch the test to actually directly check
   that reassociate makes the important transforms and
   canonicalizations.
3) Fold in a related test case now that we're using FileCheck. Make the
   same tidying changes to it.

llvm-svn: 155311
2012-04-22 10:11:26 +00:00
Chandler Carruth
038c36b06c FileCheck-ize a test, and tidy it up a touch.
llvm-svn: 155310
2012-04-22 10:11:23 +00:00