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2036 Commits

Author SHA1 Message Date
Sanjiv Gupta
f39c96217b Test case to check that separate section is created for a global variable specified with section attribute. 
llvm-svn: 77195
 2009-07-27 16:20:41 +00:00
Chris Lattner
19c9914343 update testcase. 
llvm-svn: 77192
 2009-07-27 15:52:58 +00:00
Chris Lattner
5547fd80ad put normal data into .data instead of .data.rel on elf systems. 
llvm-svn: 77116
 2009-07-26 03:06:11 +00:00
Chris Lattner
9cd489c7f1 finish simplifying DarwinTargetAsmInfo::SelectSectionForGlobal 
for now.  Make the section switching directives more consistent
by not including \n and including \t for them all.

llvm-svn: 77107
 2009-07-26 01:24:18 +00:00
Chris Lattner
b95150b65a simplify DarwinTargetAsmInfo::SelectSectionForGlobal a bit 
and make it more aggressive, we now put:

const int G2 __attribute__((weak)) = 42;

into the text (readonly) segment like gcc, previously we put
it into the data (readwrite) segment.

llvm-svn: 77104
 2009-07-26 00:51:36 +00:00
Bob Wilson
ec256c8938 Add support for ARM Neon VREV instructions. 
Patch by Anton Korzh, with some modifications from me.

llvm-svn: 77101
 2009-07-26 00:39:34 +00:00
Chris Lattner
cf7cc0ed7d add the most expedient hack to fix PR4619, along with a testcase. 
Thanks to Rafael for the great example.

llvm-svn: 77083
 2009-07-25 17:57:37 +00:00
Evan Cheng
12dd5c078f I've lost my mind. PR4572 has not been fixed. 
llvm-svn: 77031
 2009-07-25 01:11:46 +00:00
Evan Cheng
d615e606c4 Change Thumb2 jumptable codegen to one that uses two level jumps: 
Before:
      adr r12, #LJTI3_0_0
      ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
      .long    LBB3_24
      .long    LBB3_30
      .long    LBB3_31
      .long    LBB3_32

After:
      adr r12, #LJTI3_0_0
      add pc, r12, +r0, lsl #2
LJTI3_0_0:
      b.w    LBB3_24
      b.w    LBB3_30
      b.w    LBB3_31
      b.w    LBB3_32

This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
   (smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
   into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
   won't have to over-estimate the size.

Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.

llvm-svn: 77024
 2009-07-25 00:33:29 +00:00
Evan Cheng
bddff8fbe0 Remove a duplicated test. 
llvm-svn: 77020
 2009-07-25 00:24:40 +00:00
Evan Cheng
5faed6335e Forgot this test earlier. 
llvm-svn: 77007
 2009-07-24 22:42:45 +00:00
Evan Cheng
b8b61017e8 Fix these tests. 
llvm-svn: 77006
 2009-07-24 22:42:22 +00:00
Eric Christopher
24a620ec3d Move insertps tests to sse41 combo test file, convert to filecheck 
format and add an extract/insert test.

llvm-svn: 76994
 2009-07-24 19:24:26 +00:00
Evan Cheng
bbac2397c5 Convert a test to FileCheck. 
llvm-svn: 76954
 2009-07-24 06:01:46 +00:00
Chris Lattner
09511ed243 Remove SectionKind::Small*. This was only used on mips, and is apparently 
a sad mistake that is regretted. :)

llvm-svn: 76935
 2009-07-24 03:11:51 +00:00
Richard Osborne
19591063fc Add tests for handling of globals and tls on the XCore. These currently fail 
but pass when run against r76652.

llvm-svn: 76923
 2009-07-24 00:38:20 +00:00
Dan Gohman
62c8b40b66 Remove the IA-64 backend. 
llvm-svn: 76920
 2009-07-24 00:30:09 +00:00
Evan Cheng
90f66e1c4e Thumb2 does not allow the use of "pc" register as part of the load / store address. 
llvm-svn: 76909
 2009-07-23 23:09:51 +00:00
Evan Cheng
f6b88eae82 Fix up ARM constant island pass for Thumb2. 
Also fixed up code to fully use the SoImm field for ADR on ARM mode.

llvm-svn: 76890
 2009-07-23 18:27:47 +00:00
Chris Lattner
7fd20e69f1 merge one more sse41 test into sse41.ll 
llvm-svn: 76853
 2009-07-23 04:49:39 +00:00
Chris Lattner
efe5b9aaf8 merge another sse41 test into sse41.ll 
llvm-svn: 76852
 2009-07-23 04:43:48 +00:00
Chris Lattner
c59ca858c8 merge sse41-pmovx.ll into sse41.ll 
llvm-svn: 76850
 2009-07-23 04:39:09 +00:00
Chris Lattner
313c95ea84 change a test to run in filecheck style. Rename it to be a general 
dumping ground of various SSE4.1 tests, since filecheck can reasonably
handle them all in one file.  Generalize it to check x86-64 stuff as
well since it has a different ABI (a convenient way to test both the 
reg and mem forms of these instructions).

llvm-svn: 76848
 2009-07-23 04:33:02 +00:00
Eric Christopher
c9299d5756 Support insertps via the intrinsic and add a couple of simple 
testcases to make sure it's being generated.

llvm-svn: 76843
 2009-07-23 02:22:41 +00:00
Eric Christopher
36eeebc1c4 Add test for pinsrd and pinsrb instructions. 
llvm-svn: 76840
 2009-07-23 01:58:04 +00:00
Dan Gohman
0a0d23a081 Revert r75663 (and r76805), as it is causing regressions on powerpc. 
llvm-svn: 76823
 2009-07-23 00:09:46 +00:00
Dan Gohman
840e7f252e x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2). 
llvm-svn: 76817
 2009-07-22 23:26:55 +00:00
Dan Gohman
f1103cf95b Add -march=ppc32 lines so that this test doesn't ever default to ppc64. 
llvm-svn: 76805
 2009-07-22 22:08:31 +00:00
Evan Cheng
4a77f28c47 Use getTargetConstant instead of getConstant since it's meant as an constant operand. 
llvm-svn: 76803
 2009-07-22 22:03:29 +00:00
Dan Gohman
8b7a539e80 Make the grep line in this test more specific, to avoid 
unintended matches.

llvm-svn: 76802
 2009-07-22 22:02:42 +00:00
Evan Cheng
88dbc00ca7 Ignore undef uses. 
llvm-svn: 76799
 2009-07-22 21:51:42 +00:00
Duncan Sands
2a4535353f Revert commit 76707, it was breaking the llvm-gcc build 
on linux platforms.  The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html 

llvm-svn: 76733
 2009-07-22 10:35:05 +00:00
Chris Lattner
ced616dd50 set the ELF "small" flag on objects that end up in .rodata.cst4 consistently, 
updating a mips testcase to expect it.

llvm-svn: 76707
 2009-07-22 00:41:56 +00:00
Evan Cheng
e0f52b2bf3 Remove a big test case. 
llvm-svn: 76669
 2009-07-21 22:52:04 +00:00
Evan Cheng
192fc19379 Do not select tSXTB / tSXTH in thumb2 mode. 
llvm-svn: 76600
 2009-07-21 18:15:26 +00:00
Chris Lattner
ed8c3ea053 convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin" 
llvm-svn: 76591
 2009-07-21 17:36:24 +00:00
Chris Lattner
788fa56eda add a testcase for the pic16 section handling stuff. 
llvm-svn: 76579
 2009-07-21 16:48:20 +00:00
Evan Cheng
c142755cec Another rewriter bug exposed by recent coalescer changes. ReuseInfo::GetRegForReload() should make sure the "switched" register is in the desired register class. I'm surprised this hasn't caused more failures in the past. 
llvm-svn: 76558
 2009-07-21 09:15:00 +00:00
Chris Lattner
fab15a5571 remove a very large testcase for now. 
llvm-svn: 76537
 2009-07-21 06:28:36 +00:00
Evan Cheng
0cf19155ef Fix a dagga combiner bug: avoid creating illegal constant. 
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or                                                                              
                              (srl (and x, (shl -1, c1)), (sub c1, c2))

llvm-svn: 76535
 2009-07-21 05:40:15 +00:00
Evan Cheng
949c2404a2 Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. 
llvm-svn: 76520
 2009-07-21 00:31:12 +00:00
Evan Cheng
443ae1d494 Cross RC coalescing is now on by default. 
llvm-svn: 76519
 2009-07-21 00:22:59 +00:00
David Greene
1ac6d4ac0e Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes 
next.

llvm-svn: 76486
 2009-07-20 22:02:59 +00:00
Evan Cheng
919f5c5559 Forgot this test earlier. 
llvm-svn: 76485
 2009-07-20 21:46:42 +00:00
Evan Cheng
2bac9b0d83 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing). 
llvm-svn: 76472
 2009-07-20 21:16:08 +00:00
Evan Cheng
0048e876c3 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. 
llvm-svn: 76458
 2009-07-20 19:47:55 +00:00
Dan Gohman
00b05492f1 Revert the addition of hasNoPointerOverflow to GEPOperator. 
Getelementptrs that are defined to wrap are virtually useless to
optimization, and getelementptrs that are undefined on any kind
of overflow are too restrictive -- it's difficult to ensure that
all intermediate addresses are within bounds. I'm going to take
a different approach.

Remove a few optimizations that depended on this flag.

llvm-svn: 76437
 2009-07-20 17:43:30 +00:00
Chris Lattner
eac40b1473 implement a new magic global "llvm.compiler.used" which is like llvm.used, but 
doesn't cause ".no_dead_strip" to be emitted on darwin.

llvm-svn: 76399
 2009-07-20 06:14:25 +00:00
Evan Cheng
7377d0cb7c Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb. 
llvm-svn: 76398
 2009-07-20 06:10:07 +00:00
Jakob Stoklund Olesen
96f9a917c8 Fix http://llvm.org/bugs/show_bug.cgi?id=4583 
Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.

llvm-svn: 76373
 2009-07-19 19:09:59 +00:00