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Commit Graph

99527 Commits

Author SHA1 Message Date
Daniel Sanders
afbb2fa374 [mips][sched] Split IIStore into II_S[BHWD], II_S[WD][LR], and II_SAVE
No functional change since the InstrItinData's have been duplicated.

llvm-svn: 199876
2014-01-23 10:31:31 +00:00
Eric Christopher
4de8f33ce6 Add a variable to track whether or not we've used a unique section,
e.g. linkonce, to TargetMachine and set it when we've done so
for ELF targets currently. This involved making TargetMachine
non-const in a TLOF use and propagating that change around - I'm
open to other ideas.

This will be used in a future commit to handle emitting debug
information with ranges.

llvm-svn: 199871
2014-01-23 06:47:25 +00:00
Hao Liu
80b39e0b02 [AArch64]Add CHECK for two test cases testing scalar_to_vector committed in r199461.
llvm-svn: 199861
2014-01-23 02:09:30 +00:00
Kevin Qin
1961ef36cd fix some spell mistakes around 'ConcatVector' and 'ShuffleVector' in AArch64 backend.
llvm-svn: 199858
2014-01-23 01:35:13 +00:00
NAKAMURA Takumi
d8a2147ac1 X86Disassembler.cpp: Fix @param introduced in r199804. [-Wdocumentation]
llvm-svn: 199855
2014-01-23 00:37:25 +00:00
Jack Carter
fe448ccebc [Mips] formatting through clang-format
llvm-svn: 199853
2014-01-22 23:31:38 +00:00
Jack Carter
710434d0c0 [Mips] TargetStreamer Support for .set mips16.
This patch updates .set mips16 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that the assembler uses for
both ELF and ASCII output for these directives.

llvm-svn: 199851
2014-01-22 23:08:42 +00:00
Owen Anderson
2224c08928 Revert r162101 and replace it with a solution that works for targets where the pointer type is illegal.
This is a horrible bit of code.  We're calling a simplification routine *in the middle* of type legalization.  We tell the
simplification routine that it's running after legalization, but some of the types it will encounter will be illegal!  The
fix is only to invoke the simplification if the types in question were legal, so that none of its invariants will be violated.

llvm-svn: 199847
2014-01-22 22:34:17 +00:00
Matt Arsenault
5eede68ba6 Add CHECK-LABELs
llvm-svn: 199846
2014-01-22 22:32:58 +00:00
Tom Stellard
d5181ee67d Revert "R600: Add work-around for the CF stack entry HW bug"
This reverts commit 35b8331cad6eb512a2506adbc394201181da94ba.

The -debug-only flag for llc doesn't appear to be available in
all build configurations.

llvm-svn: 199845
2014-01-22 22:20:54 +00:00
Alp Toker
03e4f23b0c Tweak r199835 to use can_execute() instead of exists()
The execution code path crashes if it can't execute the binary so we might as
well take precautions here.

llvm-svn: 199844
2014-01-22 22:17:51 +00:00
Rafael Espindola
00a0fd2714 Provide a dummy section to fix a crash with inline assembly in LTO.
Fixes pr18508.

llvm-svn: 199843
2014-01-22 22:11:14 +00:00
Tom Stellard
cd874ab98c R600: Add work-around for the CF stack entry HW bug
The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE,
CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of
sub-entries on the stack is greater than or equal to the stack entry
size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is
present when number of sub-entries module 8 is either 7 or 0)

We choose to be conservative and always apply the work-around when the
number of sub-enries is greater than or equal to the stack entry size,
so that we can safely over-allocate the stack when we are unsure of the
stack allocation rules.

reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199842
2014-01-22 21:55:46 +00:00
Tom Stellard
6cc70339a1 R600: Add some missing CF instruction definitions to the .td files.
reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199841
2014-01-22 21:55:44 +00:00
Tom Stellard
ae477cc774 R600: Refactor stack size calculation
reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199840
2014-01-22 21:55:43 +00:00
Tom Stellard
2569ec88de R600: CF_PUSH is the same on Evergreen and Cayman
reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199839
2014-01-22 21:55:41 +00:00
Tom Stellard
48c31817f8 R600: Add wavefront size property to the subtargets v2
v2:
  - Initialize wavefront size to 0

reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199838
2014-01-22 21:55:40 +00:00
Tom Stellard
5b974310c9 R600: Add stack size to .AMDGPUcsdata section
reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 199837
2014-01-22 21:55:35 +00:00
Matt Arsenault
52e557deb2 Handle an addrspacecast case in memcpyopt
llvm-svn: 199836
2014-01-22 21:53:19 +00:00
Alp Toker
c7f817a228 Eliminate inappropriate use of FindProgramByName() from lli
llvm-svn: 199835
2014-01-22 21:52:35 +00:00
Matt Arsenault
a92412ccb2 Get right cost for addrspacecast in cost model
llvm-svn: 199833
2014-01-22 20:30:16 +00:00
Rafael Espindola
012bf3f3ac Fix pr18515.
My understanding (from reading just the llvm code) is that
* most ppc cpus have a "sync n" instruction and an msync alias that is "sync 0".
* "book e" cpus instead have a msync instruction and not the more
general "sync n"

This patch reflects that in the .td files, allowing a single codepath for
asm ond obj streamer and incidentelly fixes a crash when EmitRawText was
called on a obj streamer.

llvm-svn: 199832
2014-01-22 20:20:52 +00:00
Quentin Colombet
f6ddfeb084 Add a testcase for r199430.
llvm-svn: 199831
2014-01-22 20:11:50 +00:00
Tom Stellard
19af07fe92 R600: MOVA is vector only
llvm-svn: 199827
2014-01-22 19:24:24 +00:00
Tom Stellard
0971c460b5 R600: Take alignment into account when calculating the stack offset
llvm-svn: 199826
2014-01-22 19:24:23 +00:00
Tom Stellard
d424fe57e4 R600: Add support for global addresses with constant initializers
llvm-svn: 199825
2014-01-22 19:24:21 +00:00
Tom Stellard
452996a15e R600: Begin private memory at the second GPR.
This way private memory does not over-write work group information
stored in GPRs 0 and 1.

llvm-svn: 199824
2014-01-22 19:24:19 +00:00
Tom Stellard
369c33de20 R600/SI: Add support for i8 and i16 private loads/stores
llvm-svn: 199823
2014-01-22 19:24:14 +00:00
Matt Arsenault
bd62448a58 Bug 18228 - Fix accepting bitcasts between vectors of pointers with a
different number of elements.

Bitcasts were passing with vectors of pointers with different number of
elements since the number of elements was checking
SrcTy->getVectorNumElements() == SrcTy->getVectorNumElements() which
isn't helpful. The addrspacecast was also wrong, but that case at least
is caught by the verifier. Refactor bitcast and addrspacecast handling
in castIsValid to be more readable and fix this problem.

llvm-svn: 199821
2014-01-22 19:21:33 +00:00
Greg Fitzgerald
d54e246d6a Fix inline assembly that switches between ARM and Thumb modes
This patch restores the ARM mode if the user's inline assembly
does not.  In the object streamer, it ensures that instructions
following the inline assembly are encoded correctly and that
correct mapping symbols are emitted.  For the asm streamer, it
emits a .arm or .thumb directive.

This patch does not ensure that the inline assembly contains
the ADR instruction to switch modes at runtime.

The problem we need to solve is code like this:

  int foo(int a, int b) {
    int r = a + b;
    asm volatile(
        ".align 2     \n"
        ".arm         \n"
        "add r0,r0,r0 \n"
    : : "r"(r));
    return r+1;
  }

If we compile this function in thumb mode then the inline assembly
will switch to arm mode. We need to make sure that we switch back to
thumb mode after emitting the inline assembly or we will incorrectly
encode the instructions that follow (i.e. the assembly instructions
for return r+1).

Based on patch by David Peixotto

Change-Id: Ib57f6d2d78a22afad5de8693fba6230ff56ba48b
llvm-svn: 199818
2014-01-22 18:32:35 +00:00
Rafael Espindola
1968b85973 Don't open or fstat files twice in llvm-ar.
We still read/mmap them twice, but the fix for that is a bit more complex.

llvm-svn: 199815
2014-01-22 16:43:45 +00:00
Benjamin Kramer
6a8f45d87e Remove param doxygen comment for non-existing parameter.
Found by -Wdocumentation.

llvm-svn: 199814
2014-01-22 16:22:17 +00:00
Rafael Espindola
4157b2a6c1 Pass the computed magic to createBinary and createObjectFile if available.
identify_magic is not free, so we should avoid calling it twice. The argument
also makes it cheap for createBinary to just forward to createObjectFile.

llvm-svn: 199813
2014-01-22 16:04:52 +00:00
David Woodhouse
9b60dceb4a [x86] Silence unused diReg variable warning in non-asserting builds
llvm-svn: 199812
2014-01-22 15:31:32 +00:00
David Woodhouse
5b57b19500 [x86] Fix uninitialized variable warning in translate{Src,Dst}Index
llvm-svn: 199811
2014-01-22 15:31:29 +00:00
David Woodhouse
a0afe1dbaf [x86] Remove now-unused isSrcOp() and isDstOp() from X86AsmParser
llvm-svn: 199810
2014-01-22 15:08:58 +00:00
David Woodhouse
fa88b9de95 [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
llvm-svn: 199809
2014-01-22 15:08:55 +00:00
David Woodhouse
b7c155c55a [x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
llvm-svn: 199808
2014-01-22 15:08:49 +00:00
David Woodhouse
39833d37a3 [x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)
llvm-svn: 199807
2014-01-22 15:08:42 +00:00
David Woodhouse
4515fd303f ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
llvm-svn: 199806
2014-01-22 15:08:36 +00:00
David Woodhouse
02c50a95e8 [x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385)
llvm-svn: 199805
2014-01-22 15:08:27 +00:00
David Woodhouse
59ef208820 [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
llvm-svn: 199804
2014-01-22 15:08:21 +00:00
David Woodhouse
e01fc03be8 [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
llvm-svn: 199803
2014-01-22 15:08:08 +00:00
Tim Northover
8a4cb5ce31 Loop strength reduce: fix function name.
llvm-svn: 199801
2014-01-22 13:27:00 +00:00
Elena Demikhovsky
45e0f9e6b6 AVX512: combining setcc and zext is wrong on AVX512
because vector compare instruction puts result in mask register.

llvm-svn: 199798
2014-01-22 12:26:19 +00:00
James Molloy
2e64527bc0 MachineCopyPropagation has special logic for removing COPY instructions. It will remove plain COPYs using eraseFromParent(), but if the COPY has imp-defs/imp-uses it will convert it to a KILL, to keep the imp-def around.
This actually totally breaks and causes the machine verifier to cry in several cases, one of which being:

%RAX<def> = COPY %RCX<kill>
%ECX<def> = COPY %EAX<kill>, %RAX<imp-use,kill>

These subregister copies are together identified as noops, so are both removed. However, the second one as it has an imp-use gets converted into a kill:

%ECX<def> = KILL %EAX<kill>, %RAX<imp-use,kill>

As the original COPY has been removed, the verifier goes into tears at the use of undefined EAX and RAX.

There are several hacky solutions to this hacky problem (which is all to do with imp-use/def weirdnesses), but the least hacky I've come up with is to *always* remove COPYs by converting to KILLs. KILLs are no-ops to the code generator so the generated code doesn't change (which is why they were partially used in the first place), but using them also keeps the def/use and imp-def/imp-use chains alive:

%RAX<def> = KILL %RCX<kill>
%ECX<def> = KILL %EAX<kill>, %RAX<imp-use,kill>

The patch passes all test cases including the ones that check the removal of MOVs in this circumstance, along with an extra test I added to check subregister behaviour (which made the machine verifier fall over before my patch).

The patch also adds some DEBUG() statements because the file hadn't got any.

llvm-svn: 199797
2014-01-22 09:12:27 +00:00
Alp Toker
85514f82fa Add unused result attr to the casting templates
This helped catch a couple of bugs locally.

llvm-svn: 199793
2014-01-22 07:28:49 +00:00
Kevin Qin
9a631f3af4 [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR.
llvm-svn: 199791
2014-01-22 06:11:03 +00:00
Andrew Trick
5515efcba4 Reformat a loop for basic hygeine. Self review.
llvm-svn: 199788
2014-01-22 03:38:55 +00:00
Venkatraman Govindaraju
2dcfaac1b8 [Sparc] Add support for inline assembly constraints which specify registers by their aliases.
llvm-svn: 199786
2014-01-22 03:18:42 +00:00